iio/dac/ad5761.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AD5721, AD5721R, AD5761, AD5761R, Voltage Output Digital to Analog Converter
0004  *
0005  * Copyright 2016 Qtechnology A/S
0006  * 2016 Ricardo Ribalda <ribalda@kernel.org>
0007  */
0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/spi/spi.h>
0011 #include <linux/bitops.h>
0012 #include <linux/iio/iio.h>
0013 #include <linux/iio/sysfs.h>
0014 #include <linux/regulator/consumer.h>
0015 #include <linux/platform_data/ad5761.h>
0016
0017 #define AD5761_ADDR(addr)       ((addr & 0xf) << 16)
0018 #define AD5761_ADDR_NOOP        0x0
0019 #define AD5761_ADDR_DAC_WRITE       0x3
0020 #define AD5761_ADDR_CTRL_WRITE_REG  0x4
0021 #define AD5761_ADDR_SW_DATA_RESET   0x7
0022 #define AD5761_ADDR_DAC_READ        0xb
0023 #define AD5761_ADDR_CTRL_READ_REG   0xc
0024 #define AD5761_ADDR_SW_FULL_RESET   0xf
0025
0026 #define AD5761_CTRL_USE_INTVREF     BIT(5)
0027 #define AD5761_CTRL_ETS         BIT(6)
0028
0029 /**
0030  * struct ad5761_chip_info - chip specific information
0031  * @int_vref:   Value of the internal reference voltage in mV - 0 if external
0032  *      reference voltage is used
0033  * @channel:    channel specification
0034 */
0035
0036 struct ad5761_chip_info {
0037     unsigned long int_vref;
0038     const struct iio_chan_spec channel;
0039 };
0040
0041 struct ad5761_range_params {
0042     int m;
0043     int c;
0044 };
0045
0046 enum ad5761_supported_device_ids {
0047     ID_AD5721,
0048     ID_AD5721R,
0049     ID_AD5761,
0050     ID_AD5761R,
0051 };
0052
0053 /**
0054  * struct ad5761_state - driver instance specific data
0055  * @spi:        spi_device
0056  * @vref_reg:       reference voltage regulator
0057  * @use_intref:     true when the internal voltage reference is used
0058  * @vref:       actual voltage reference in mVolts
0059  * @range:      output range mode used
0060  * @lock:       lock to protect the data buffer during SPI ops
0061  * @data:       cache aligned spi buffer
0062  */
0063 struct ad5761_state {
0064     struct spi_device       *spi;
0065     struct regulator        *vref_reg;
0066     struct mutex            lock;
0067
0068     bool use_intref;
0069     int vref;
0070     enum ad5761_voltage_range range;
0071
0072     /*
0073      * DMA (thus cache coherency maintenance) may require the
0074      * transfer buffers to live in their own cache lines.
0075      */
0076     union {
0077         __be32 d32;
0078         u8 d8[4];
0079     } data[3] __aligned(IIO_DMA_MINALIGN);
0080 };
0081
0082 static const struct ad5761_range_params ad5761_range_params[] = {
0083     [AD5761_VOLTAGE_RANGE_M10V_10V] = {
0084         .m = 80,
0085         .c = 40,
0086     },
0087     [AD5761_VOLTAGE_RANGE_0V_10V] = {
0088         .m = 40,
0089         .c = 0,
0090     },
0091     [AD5761_VOLTAGE_RANGE_M5V_5V] = {
0092         .m = 40,
0093         .c = 20,
0094     },
0095     [AD5761_VOLTAGE_RANGE_0V_5V] = {
0096         .m = 20,
0097         .c = 0,
0098     },
0099     [AD5761_VOLTAGE_RANGE_M2V5_7V5] = {
0100         .m = 40,
0101         .c = 10,
0102     },
0103     [AD5761_VOLTAGE_RANGE_M3V_3V] = {
0104         .m = 24,
0105         .c = 12,
0106     },
0107     [AD5761_VOLTAGE_RANGE_0V_16V] = {
0108         .m = 64,
0109         .c = 0,
0110     },
0111     [AD5761_VOLTAGE_RANGE_0V_20V] = {
0112         .m = 80,
0113         .c = 0,
0114     },
0115 };
0116
0117 static int _ad5761_spi_write(struct ad5761_state *st, u8 addr, u16 val)
0118 {
0119     st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr) | val);
0120
0121     return spi_write(st->spi, &st->data[0].d8[1], 3);
0122 }
0123
0124 static int ad5761_spi_write(struct iio_dev *indio_dev, u8 addr, u16 val)
0125 {
0126     struct ad5761_state *st = iio_priv(indio_dev);
0127     int ret;
0128
0129     mutex_lock(&st->lock);
0130     ret = _ad5761_spi_write(st, addr, val);
0131     mutex_unlock(&st->lock);
0132
0133     return ret;
0134 }
0135
0136 static int _ad5761_spi_read(struct ad5761_state *st, u8 addr, u16 *val)
0137 {
0138     int ret;
0139     struct spi_transfer xfers[] = {
0140         {
0141             .tx_buf = &st->data[0].d8[1],
0142             .bits_per_word = 8,
0143             .len = 3,
0144             .cs_change = true,
0145         }, {
0146             .tx_buf = &st->data[1].d8[1],
0147             .rx_buf = &st->data[2].d8[1],
0148             .bits_per_word = 8,
0149             .len = 3,
0150         },
0151     };
0152
0153     st->data[0].d32 = cpu_to_be32(AD5761_ADDR(addr));
0154     st->data[1].d32 = cpu_to_be32(AD5761_ADDR(AD5761_ADDR_NOOP));
0155
0156     ret = spi_sync_transfer(st->spi, xfers, ARRAY_SIZE(xfers));
0157
0158     *val = be32_to_cpu(st->data[2].d32);
0159
0160     return ret;
0161 }
0162
0163 static int ad5761_spi_read(struct iio_dev *indio_dev, u8 addr, u16 *val)
0164 {
0165     struct ad5761_state *st = iio_priv(indio_dev);
0166     int ret;
0167
0168     mutex_lock(&st->lock);
0169     ret = _ad5761_spi_read(st, addr, val);
0170     mutex_unlock(&st->lock);
0171
0172     return ret;
0173 }
0174
0175 static int ad5761_spi_set_range(struct ad5761_state *st,
0176                 enum ad5761_voltage_range range)
0177 {
0178     u16 aux;
0179     int ret;
0180
0181     aux = (range & 0x7) | AD5761_CTRL_ETS;
0182
0183     if (st->use_intref)
0184         aux |= AD5761_CTRL_USE_INTVREF;
0185
0186     ret = _ad5761_spi_write(st, AD5761_ADDR_SW_FULL_RESET, 0);
0187     if (ret)
0188         return ret;
0189
0190     ret = _ad5761_spi_write(st, AD5761_ADDR_CTRL_WRITE_REG, aux);
0191     if (ret)
0192         return ret;
0193
0194     st->range = range;
0195
0196     return 0;
0197 }
0198
0199 static int ad5761_read_raw(struct iio_dev *indio_dev,
0200                struct iio_chan_spec const *chan,
0201                int *val,
0202                int *val2,
0203                long mask)
0204 {
0205     struct ad5761_state *st;
0206     int ret;
0207     u16 aux;
0208
0209     switch (mask) {
0210     case IIO_CHAN_INFO_RAW:
0211         ret = ad5761_spi_read(indio_dev, AD5761_ADDR_DAC_READ, &aux);
0212         if (ret)
0213             return ret;
0214         *val = aux >> chan->scan_type.shift;
0215         return IIO_VAL_INT;
0216     case IIO_CHAN_INFO_SCALE:
0217         st = iio_priv(indio_dev);
0218         *val = st->vref * ad5761_range_params[st->range].m;
0219         *val /= 10;
0220         *val2 = chan->scan_type.realbits;
0221         return IIO_VAL_FRACTIONAL_LOG2;
0222     case IIO_CHAN_INFO_OFFSET:
0223         st = iio_priv(indio_dev);
0224         *val = -(1 << chan->scan_type.realbits);
0225         *val *= ad5761_range_params[st->range].c;
0226         *val /= ad5761_range_params[st->range].m;
0227         return IIO_VAL_INT;
0228     default:
0229         return -EINVAL;
0230     }
0231 }
0232
0233 static int ad5761_write_raw(struct iio_dev *indio_dev,
0234                 struct iio_chan_spec const *chan,
0235                 int val,
0236                 int val2,
0237                 long mask)
0238 {
0239     u16 aux;
0240
0241     if (mask != IIO_CHAN_INFO_RAW)
0242         return -EINVAL;
0243
0244     if (val2 || (val << chan->scan_type.shift) > 0xffff || val < 0)
0245         return -EINVAL;
0246
0247     aux = val << chan->scan_type.shift;
0248
0249     return ad5761_spi_write(indio_dev, AD5761_ADDR_DAC_WRITE, aux);
0250 }
0251
0252 static const struct iio_info ad5761_info = {
0253     .read_raw = &ad5761_read_raw,
0254     .write_raw = &ad5761_write_raw,
0255 };
0256
0257 #define AD5761_CHAN(_bits) {                \
0258     .type = IIO_VOLTAGE,                \
0259     .output = 1,                    \
0260     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),   \
0261     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |  \
0262         BIT(IIO_CHAN_INFO_OFFSET),      \
0263     .scan_type = {                  \
0264         .sign = 'u',                \
0265         .realbits = (_bits),            \
0266         .storagebits = 16,          \
0267         .shift = 16 - (_bits),          \
0268     },                      \
0269 }
0270
0271 static const struct ad5761_chip_info ad5761_chip_infos[] = {
0272     [ID_AD5721] = {
0273         .int_vref = 0,
0274         .channel = AD5761_CHAN(12),
0275     },
0276     [ID_AD5721R] = {
0277         .int_vref = 2500,
0278         .channel = AD5761_CHAN(12),
0279     },
0280     [ID_AD5761] = {
0281         .int_vref = 0,
0282         .channel = AD5761_CHAN(16),
0283     },
0284     [ID_AD5761R] = {
0285         .int_vref = 2500,
0286         .channel = AD5761_CHAN(16),
0287     },
0288 };
0289
0290 static int ad5761_get_vref(struct ad5761_state *st,
0291                const struct ad5761_chip_info *chip_info)
0292 {
0293     int ret;
0294
0295     st->vref_reg = devm_regulator_get_optional(&st->spi->dev, "vref");
0296     if (PTR_ERR(st->vref_reg) == -ENODEV) {
0297         /* Use Internal regulator */
0298         if (!chip_info->int_vref) {
0299             dev_err(&st->spi->dev,
0300                 "Voltage reference not found\n");
0301             return -EIO;
0302         }
0303
0304         st->use_intref = true;
0305         st->vref = chip_info->int_vref;
0306         return 0;
0307     }
0308
0309     if (IS_ERR(st->vref_reg)) {
0310         dev_err(&st->spi->dev,
0311             "Error getting voltage reference regulator\n");
0312         return PTR_ERR(st->vref_reg);
0313     }
0314
0315     ret = regulator_enable(st->vref_reg);
0316     if (ret) {
0317         dev_err(&st->spi->dev,
0318              "Failed to enable voltage reference\n");
0319         return ret;
0320     }
0321
0322     ret = regulator_get_voltage(st->vref_reg);
0323     if (ret < 0) {
0324         dev_err(&st->spi->dev,
0325              "Failed to get voltage reference value\n");
0326         goto disable_regulator_vref;
0327     }
0328
0329     if (ret < 2000000 || ret > 3000000) {
0330         dev_warn(&st->spi->dev,
0331              "Invalid external voltage ref. value %d uV\n", ret);
0332         ret = -EIO;
0333         goto disable_regulator_vref;
0334     }
0335
0336     st->vref = ret / 1000;
0337     st->use_intref = false;
0338
0339     return 0;
0340
0341 disable_regulator_vref:
0342     regulator_disable(st->vref_reg);
0343     st->vref_reg = NULL;
0344     return ret;
0345 }
0346
0347 static int ad5761_probe(struct spi_device *spi)
0348 {
0349     struct iio_dev *iio_dev;
0350     struct ad5761_state *st;
0351     int ret;
0352     const struct ad5761_chip_info *chip_info =
0353         &ad5761_chip_infos[spi_get_device_id(spi)->driver_data];
0354     enum ad5761_voltage_range voltage_range = AD5761_VOLTAGE_RANGE_0V_5V;
0355     struct ad5761_platform_data *pdata = dev_get_platdata(&spi->dev);
0356
0357     iio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0358     if (!iio_dev)
0359         return -ENOMEM;
0360
0361     st = iio_priv(iio_dev);
0362
0363     st->spi = spi;
0364     spi_set_drvdata(spi, iio_dev);
0365
0366     ret = ad5761_get_vref(st, chip_info);
0367     if (ret)
0368         return ret;
0369
0370     if (pdata)
0371         voltage_range = pdata->voltage_range;
0372
0373     mutex_init(&st->lock);
0374
0375     ret = ad5761_spi_set_range(st, voltage_range);
0376     if (ret)
0377         goto disable_regulator_err;
0378
0379     iio_dev->info = &ad5761_info;
0380     iio_dev->modes = INDIO_DIRECT_MODE;
0381     iio_dev->channels = &chip_info->channel;
0382     iio_dev->num_channels = 1;
0383     iio_dev->name = spi_get_device_id(st->spi)->name;
0384     ret = iio_device_register(iio_dev);
0385     if (ret)
0386         goto disable_regulator_err;
0387
0388     return 0;
0389
0390 disable_regulator_err:
0391     if (!IS_ERR_OR_NULL(st->vref_reg))
0392         regulator_disable(st->vref_reg);
0393
0394     return ret;
0395 }
0396
0397 static void ad5761_remove(struct spi_device *spi)
0398 {
0399     struct iio_dev *iio_dev = spi_get_drvdata(spi);
0400     struct ad5761_state *st = iio_priv(iio_dev);
0401
0402     iio_device_unregister(iio_dev);
0403
0404     if (!IS_ERR_OR_NULL(st->vref_reg))
0405         regulator_disable(st->vref_reg);
0406 }
0407
0408 static const struct spi_device_id ad5761_id[] = {
0409     {"ad5721", ID_AD5721},
0410     {"ad5721r", ID_AD5721R},
0411     {"ad5761", ID_AD5761},
0412     {"ad5761r", ID_AD5761R},
0413     {}
0414 };
0415 MODULE_DEVICE_TABLE(spi, ad5761_id);
0416
0417 static struct spi_driver ad5761_driver = {
0418     .driver = {
0419            .name = "ad5761",
0420            },
0421     .probe = ad5761_probe,
0422     .remove = ad5761_remove,
0423     .id_table = ad5761_id,
0424 };
0425 module_spi_driver(ad5761_driver);
0426
0427 MODULE_AUTHOR("Ricardo Ribalda <ribalda@kernel.org>");
0428 MODULE_DESCRIPTION("Analog Devices AD5721, AD5721R, AD5761, AD5761R driver");
0429 MODULE_LICENSE("GPL v2");