iio/dac/ad5686.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * This file is part of AD5686 DAC driver
0004  *
0005  * Copyright 2018 Analog Devices Inc.
0006  */
0007
0008 #ifndef __DRIVERS_IIO_DAC_AD5686_H__
0009 #define __DRIVERS_IIO_DAC_AD5686_H__
0010
0011 #include <linux/types.h>
0012 #include <linux/cache.h>
0013 #include <linux/mutex.h>
0014 #include <linux/kernel.h>
0015
0016 #include <linux/iio/iio.h>
0017
0018 #define AD5310_CMD(x)               ((x) << 12)
0019
0020 #define AD5683_DATA(x)              ((x) << 4)
0021
0022 #define AD5686_ADDR(x)              ((x) << 16)
0023 #define AD5686_CMD(x)               ((x) << 20)
0024
0025 #define AD5686_ADDR_DAC(chan)           (0x1 << (chan))
0026 #define AD5686_ADDR_ALL_DAC         0xF
0027
0028 #define AD5686_CMD_NOOP             0x0
0029 #define AD5686_CMD_WRITE_INPUT_N        0x1
0030 #define AD5686_CMD_UPDATE_DAC_N         0x2
0031 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N   0x3
0032 #define AD5686_CMD_POWERDOWN_DAC        0x4
0033 #define AD5686_CMD_LDAC_MASK            0x5
0034 #define AD5686_CMD_RESET            0x6
0035 #define AD5686_CMD_INTERNAL_REFER_SETUP     0x7
0036 #define AD5686_CMD_DAISY_CHAIN_ENABLE       0x8
0037 #define AD5686_CMD_READBACK_ENABLE      0x9
0038
0039 #define AD5686_LDAC_PWRDN_NONE          0x0
0040 #define AD5686_LDAC_PWRDN_1K            0x1
0041 #define AD5686_LDAC_PWRDN_100K          0x2
0042 #define AD5686_LDAC_PWRDN_3STATE        0x3
0043
0044 #define AD5686_CMD_CONTROL_REG          0x4
0045 #define AD5686_CMD_READBACK_ENABLE_V2       0x5
0046
0047 #define AD5310_REF_BIT_MSK          BIT(8)
0048 #define AD5683_REF_BIT_MSK          BIT(12)
0049 #define AD5693_REF_BIT_MSK          BIT(12)
0050
0051 /**
0052  * ad5686_supported_device_ids:
0053  */
0054 enum ad5686_supported_device_ids {
0055     ID_AD5310R,
0056     ID_AD5311R,
0057     ID_AD5338R,
0058     ID_AD5671R,
0059     ID_AD5672R,
0060     ID_AD5673R,
0061     ID_AD5674R,
0062     ID_AD5675R,
0063     ID_AD5676,
0064     ID_AD5676R,
0065     ID_AD5677R,
0066     ID_AD5679R,
0067     ID_AD5681R,
0068     ID_AD5682R,
0069     ID_AD5683,
0070     ID_AD5683R,
0071     ID_AD5684,
0072     ID_AD5684R,
0073     ID_AD5685R,
0074     ID_AD5686,
0075     ID_AD5686R,
0076     ID_AD5691R,
0077     ID_AD5692R,
0078     ID_AD5693,
0079     ID_AD5693R,
0080     ID_AD5694,
0081     ID_AD5694R,
0082     ID_AD5695R,
0083     ID_AD5696,
0084     ID_AD5696R,
0085 };
0086
0087 enum ad5686_regmap_type {
0088     AD5310_REGMAP,
0089     AD5683_REGMAP,
0090     AD5686_REGMAP,
0091     AD5693_REGMAP
0092 };
0093
0094 struct ad5686_state;
0095
0096 typedef int (*ad5686_write_func)(struct ad5686_state *st,
0097                  u8 cmd, u8 addr, u16 val);
0098
0099 typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
0100
0101 /**
0102  * struct ad5686_chip_info - chip specific information
0103  * @int_vref_mv:    AD5620/40/60: the internal reference voltage
0104  * @num_channels:   number of channels
0105  * @channel:        channel specification
0106  * @regmap_type:    register map layout variant
0107  */
0108
0109 struct ad5686_chip_info {
0110     u16             int_vref_mv;
0111     unsigned int            num_channels;
0112     const struct iio_chan_spec  *channels;
0113     enum ad5686_regmap_type     regmap_type;
0114 };
0115
0116 /**
0117  * struct ad5446_state - driver instance specific data
0118  * @spi:        spi_device
0119  * @chip_info:      chip model specific constants, available modes etc
0120  * @reg:        supply regulator
0121  * @vref_mv:        actual reference voltage used
0122  * @pwr_down_mask:  power down mask
0123  * @pwr_down_mode:  current power down mode
0124  * @use_internal_vref:  set to true if the internal reference voltage is used
0125  * @lock        lock to protect the data buffer during regmap ops
0126  * @data:       spi transfer buffers
0127  */
0128
0129 struct ad5686_state {
0130     struct device           *dev;
0131     const struct ad5686_chip_info   *chip_info;
0132     struct regulator        *reg;
0133     unsigned short          vref_mv;
0134     unsigned int            pwr_down_mask;
0135     unsigned int            pwr_down_mode;
0136     ad5686_write_func       write;
0137     ad5686_read_func        read;
0138     bool                use_internal_vref;
0139     struct mutex            lock;
0140
0141     /*
0142      * DMA (thus cache coherency maintenance) may require the
0143      * transfer buffers to live in their own cache lines.
0144      */
0145
0146     union {
0147         __be32 d32;
0148         __be16 d16;
0149         u8 d8[4];
0150     } data[3] __aligned(IIO_DMA_MINALIGN);
0151 };
0152
0153
0154 int ad5686_probe(struct device *dev,
0155          enum ad5686_supported_device_ids chip_type,
0156          const char *name, ad5686_write_func write,
0157          ad5686_read_func read);
0158
0159 void ad5686_remove(struct device *dev);
0160
0161
0162 #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */