iio/dac/ad5449.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
0004  * Converter driver.
0005  *
0006  * Copyright 2012 Analog Devices Inc.
0007  *  Author: Lars-Peter Clausen <lars@metafoo.de>
0008  */
0009
0010 #include <linux/device.h>
0011 #include <linux/err.h>
0012 #include <linux/module.h>
0013 #include <linux/kernel.h>
0014 #include <linux/spi/spi.h>
0015 #include <linux/slab.h>
0016 #include <linux/sysfs.h>
0017 #include <linux/regulator/consumer.h>
0018 #include <asm/unaligned.h>
0019
0020 #include <linux/iio/iio.h>
0021 #include <linux/iio/sysfs.h>
0022
0023 #include <linux/platform_data/ad5449.h>
0024
0025 #define AD5449_MAX_CHANNELS     2
0026 #define AD5449_MAX_VREFS        2
0027
0028 #define AD5449_CMD_NOOP         0x0
0029 #define AD5449_CMD_LOAD_AND_UPDATE(x)   (0x1 + (x) * 3)
0030 #define AD5449_CMD_READ(x)      (0x2 + (x) * 3)
0031 #define AD5449_CMD_LOAD(x)      (0x3 + (x) * 3)
0032 #define AD5449_CMD_CTRL         13
0033
0034 #define AD5449_CTRL_SDO_OFFSET      10
0035 #define AD5449_CTRL_DAISY_CHAIN     BIT(9)
0036 #define AD5449_CTRL_HCLR_TO_MIDSCALE    BIT(8)
0037 #define AD5449_CTRL_SAMPLE_RISING   BIT(7)
0038
0039 /**
0040  * struct ad5449_chip_info - chip specific information
0041  * @channels:       Channel specification
0042  * @num_channels:   Number of channels
0043  * @has_ctrl:       Chip has a control register
0044  */
0045 struct ad5449_chip_info {
0046     const struct iio_chan_spec *channels;
0047     unsigned int num_channels;
0048     bool has_ctrl;
0049 };
0050
0051 /**
0052  * struct ad5449 - driver instance specific data
0053  * @spi:        the SPI device for this driver instance
0054  * @chip_info:      chip model specific constants, available modes etc
0055  * @vref_reg:       vref supply regulators
0056  * @has_sdo:        whether the SDO line is connected
0057  * @dac_cache:      Cache for the DAC values
0058  * @data:       spi transfer buffers
0059  * @lock:       lock to protect the data buffer during SPI ops
0060  */
0061 struct ad5449 {
0062     struct spi_device       *spi;
0063     const struct ad5449_chip_info   *chip_info;
0064     struct regulator_bulk_data  vref_reg[AD5449_MAX_VREFS];
0065     struct mutex            lock;
0066
0067     bool has_sdo;
0068     uint16_t dac_cache[AD5449_MAX_CHANNELS];
0069
0070     /*
0071      * DMA (thus cache coherency maintenance) may require the
0072      * transfer buffers to live in their own cache lines.
0073      */
0074     __be16 data[2] __aligned(IIO_DMA_MINALIGN);
0075 };
0076
0077 enum ad5449_type {
0078     ID_AD5426,
0079     ID_AD5429,
0080     ID_AD5432,
0081     ID_AD5439,
0082     ID_AD5443,
0083     ID_AD5449,
0084 };
0085
0086 static int ad5449_write(struct iio_dev *indio_dev, unsigned int addr,
0087     unsigned int val)
0088 {
0089     struct ad5449 *st = iio_priv(indio_dev);
0090     int ret;
0091
0092     mutex_lock(&st->lock);
0093     st->data[0] = cpu_to_be16((addr << 12) | val);
0094     ret = spi_write(st->spi, st->data, 2);
0095     mutex_unlock(&st->lock);
0096
0097     return ret;
0098 }
0099
0100 static int ad5449_read(struct iio_dev *indio_dev, unsigned int addr,
0101     unsigned int *val)
0102 {
0103     struct ad5449 *st = iio_priv(indio_dev);
0104     int ret;
0105     struct spi_transfer t[] = {
0106         {
0107             .tx_buf = &st->data[0],
0108             .len = 2,
0109             .cs_change = 1,
0110         }, {
0111             .tx_buf = &st->data[1],
0112             .rx_buf = &st->data[1],
0113             .len = 2,
0114         },
0115     };
0116
0117     mutex_lock(&st->lock);
0118     st->data[0] = cpu_to_be16(addr << 12);
0119     st->data[1] = cpu_to_be16(AD5449_CMD_NOOP);
0120
0121     ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
0122     if (ret < 0)
0123         goto out_unlock;
0124
0125     *val = be16_to_cpu(st->data[1]);
0126
0127 out_unlock:
0128     mutex_unlock(&st->lock);
0129     return ret;
0130 }
0131
0132 static int ad5449_read_raw(struct iio_dev *indio_dev,
0133     struct iio_chan_spec const *chan, int *val, int *val2, long info)
0134 {
0135     struct ad5449 *st = iio_priv(indio_dev);
0136     struct regulator_bulk_data *reg;
0137     int scale_uv;
0138     int ret;
0139
0140     switch (info) {
0141     case IIO_CHAN_INFO_RAW:
0142         if (st->has_sdo) {
0143             ret = ad5449_read(indio_dev,
0144                 AD5449_CMD_READ(chan->address), val);
0145             if (ret)
0146                 return ret;
0147             *val &= 0xfff;
0148         } else {
0149             *val = st->dac_cache[chan->address];
0150         }
0151
0152         return IIO_VAL_INT;
0153     case IIO_CHAN_INFO_SCALE:
0154         reg = &st->vref_reg[chan->channel];
0155         scale_uv = regulator_get_voltage(reg->consumer);
0156         if (scale_uv < 0)
0157             return scale_uv;
0158
0159         *val = scale_uv / 1000;
0160         *val2 = chan->scan_type.realbits;
0161
0162         return IIO_VAL_FRACTIONAL_LOG2;
0163     default:
0164         break;
0165     }
0166
0167     return -EINVAL;
0168 }
0169
0170 static int ad5449_write_raw(struct iio_dev *indio_dev,
0171     struct iio_chan_spec const *chan, int val, int val2, long info)
0172 {
0173     struct ad5449 *st = iio_priv(indio_dev);
0174     int ret;
0175
0176     switch (info) {
0177     case IIO_CHAN_INFO_RAW:
0178         if (val < 0 || val >= (1 << chan->scan_type.realbits))
0179             return -EINVAL;
0180
0181         ret = ad5449_write(indio_dev,
0182             AD5449_CMD_LOAD_AND_UPDATE(chan->address),
0183             val << chan->scan_type.shift);
0184         if (ret == 0)
0185             st->dac_cache[chan->address] = val;
0186         break;
0187     default:
0188         ret = -EINVAL;
0189     }
0190
0191     return ret;
0192 }
0193
0194 static const struct iio_info ad5449_info = {
0195     .read_raw = ad5449_read_raw,
0196     .write_raw = ad5449_write_raw,
0197 };
0198
0199 #define AD5449_CHANNEL(chan, bits) {                \
0200     .type = IIO_VOLTAGE,                    \
0201     .indexed = 1,                       \
0202     .output = 1,                        \
0203     .channel = (chan),                  \
0204     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |      \
0205         BIT(IIO_CHAN_INFO_SCALE),           \
0206     .address = (chan),                  \
0207     .scan_type = {                      \
0208         .sign = 'u',                    \
0209         .realbits = (bits),             \
0210         .storagebits = 16,              \
0211         .shift = 12 - (bits),               \
0212     },                          \
0213 }
0214
0215 #define DECLARE_AD5449_CHANNELS(name, bits) \
0216 const struct iio_chan_spec name[] = { \
0217     AD5449_CHANNEL(0, bits), \
0218     AD5449_CHANNEL(1, bits), \
0219 }
0220
0221 static DECLARE_AD5449_CHANNELS(ad5429_channels, 8);
0222 static DECLARE_AD5449_CHANNELS(ad5439_channels, 10);
0223 static DECLARE_AD5449_CHANNELS(ad5449_channels, 12);
0224
0225 static const struct ad5449_chip_info ad5449_chip_info[] = {
0226     [ID_AD5426] = {
0227         .channels = ad5429_channels,
0228         .num_channels = 1,
0229         .has_ctrl = false,
0230     },
0231     [ID_AD5429] = {
0232         .channels = ad5429_channels,
0233         .num_channels = 2,
0234         .has_ctrl = true,
0235     },
0236     [ID_AD5432] = {
0237         .channels = ad5439_channels,
0238         .num_channels = 1,
0239         .has_ctrl = false,
0240     },
0241     [ID_AD5439] = {
0242         .channels = ad5439_channels,
0243         .num_channels = 2,
0244         .has_ctrl = true,
0245     },
0246     [ID_AD5443] = {
0247         .channels = ad5449_channels,
0248         .num_channels = 1,
0249         .has_ctrl = false,
0250     },
0251     [ID_AD5449] = {
0252         .channels = ad5449_channels,
0253         .num_channels = 2,
0254         .has_ctrl = true,
0255     },
0256 };
0257
0258 static const char *ad5449_vref_name(struct ad5449 *st, int n)
0259 {
0260     if (st->chip_info->num_channels == 1)
0261         return "VREF";
0262
0263     if (n == 0)
0264         return "VREFA";
0265     else
0266         return "VREFB";
0267 }
0268
0269 static int ad5449_spi_probe(struct spi_device *spi)
0270 {
0271     struct ad5449_platform_data *pdata = spi->dev.platform_data;
0272     const struct spi_device_id *id = spi_get_device_id(spi);
0273     struct iio_dev *indio_dev;
0274     struct ad5449 *st;
0275     unsigned int i;
0276     int ret;
0277
0278     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0279     if (indio_dev == NULL)
0280         return -ENOMEM;
0281
0282     st = iio_priv(indio_dev);
0283     spi_set_drvdata(spi, indio_dev);
0284
0285     st->chip_info = &ad5449_chip_info[id->driver_data];
0286     st->spi = spi;
0287
0288     for (i = 0; i < st->chip_info->num_channels; ++i)
0289         st->vref_reg[i].supply = ad5449_vref_name(st, i);
0290
0291     ret = devm_regulator_bulk_get(&spi->dev, st->chip_info->num_channels,
0292                 st->vref_reg);
0293     if (ret)
0294         return ret;
0295
0296     ret = regulator_bulk_enable(st->chip_info->num_channels, st->vref_reg);
0297     if (ret)
0298         return ret;
0299
0300     indio_dev->name = id->name;
0301     indio_dev->info = &ad5449_info;
0302     indio_dev->modes = INDIO_DIRECT_MODE;
0303     indio_dev->channels = st->chip_info->channels;
0304     indio_dev->num_channels = st->chip_info->num_channels;
0305
0306     mutex_init(&st->lock);
0307
0308     if (st->chip_info->has_ctrl) {
0309         unsigned int ctrl = 0x00;
0310         if (pdata) {
0311             if (pdata->hardware_clear_to_midscale)
0312                 ctrl |= AD5449_CTRL_HCLR_TO_MIDSCALE;
0313             ctrl |= pdata->sdo_mode << AD5449_CTRL_SDO_OFFSET;
0314             st->has_sdo = pdata->sdo_mode != AD5449_SDO_DISABLED;
0315         } else {
0316             st->has_sdo = true;
0317         }
0318         ad5449_write(indio_dev, AD5449_CMD_CTRL, ctrl);
0319     }
0320
0321     ret = iio_device_register(indio_dev);
0322     if (ret)
0323         goto error_disable_reg;
0324
0325     return 0;
0326
0327 error_disable_reg:
0328     regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
0329
0330     return ret;
0331 }
0332
0333 static void ad5449_spi_remove(struct spi_device *spi)
0334 {
0335     struct iio_dev *indio_dev = spi_get_drvdata(spi);
0336     struct ad5449 *st = iio_priv(indio_dev);
0337
0338     iio_device_unregister(indio_dev);
0339
0340     regulator_bulk_disable(st->chip_info->num_channels, st->vref_reg);
0341 }
0342
0343 static const struct spi_device_id ad5449_spi_ids[] = {
0344     { "ad5415", ID_AD5449 },
0345     { "ad5426", ID_AD5426 },
0346     { "ad5429", ID_AD5429 },
0347     { "ad5432", ID_AD5432 },
0348     { "ad5439", ID_AD5439 },
0349     { "ad5443", ID_AD5443 },
0350     { "ad5449", ID_AD5449 },
0351     {}
0352 };
0353 MODULE_DEVICE_TABLE(spi, ad5449_spi_ids);
0354
0355 static struct spi_driver ad5449_spi_driver = {
0356     .driver = {
0357         .name = "ad5449",
0358     },
0359     .probe = ad5449_spi_probe,
0360     .remove = ad5449_spi_remove,
0361     .id_table = ad5449_spi_ids,
0362 };
0363 module_spi_driver(ad5449_spi_driver);
0364
0365 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
0366 MODULE_DESCRIPTION("Analog Devices AD5449 and similar DACs");
0367 MODULE_LICENSE("GPL v2");