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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R,
0004  * AD5627, AD5627R, AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R,
0005  * AD5666, AD5667, AD5667R, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
0006  * LTC2617, LTC2619, LTC2626, LTC2627, LTC2629, LTC2631, LTC2633, LTC2635
0007  * Digital to analog converters driver
0008  *
0009  * Copyright 2011 Analog Devices Inc.
0010  */
0011 
0012 #include <linux/device.h>
0013 #include <linux/err.h>
0014 #include <linux/module.h>
0015 #include <linux/kernel.h>
0016 #include <linux/spi/spi.h>
0017 #include <linux/i2c.h>
0018 #include <linux/slab.h>
0019 #include <linux/sysfs.h>
0020 #include <linux/regulator/consumer.h>
0021 #include <asm/unaligned.h>
0022 
0023 #include <linux/iio/iio.h>
0024 #include <linux/iio/sysfs.h>
0025 
0026 #define AD5064_MAX_DAC_CHANNELS         8
0027 #define AD5064_MAX_VREFS            4
0028 
0029 #define AD5064_ADDR(x)              ((x) << 20)
0030 #define AD5064_CMD(x)               ((x) << 24)
0031 
0032 #define AD5064_ADDR_ALL_DAC         0xF
0033 
0034 #define AD5064_CMD_WRITE_INPUT_N        0x0
0035 #define AD5064_CMD_UPDATE_DAC_N         0x1
0036 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2
0037 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N   0x3
0038 #define AD5064_CMD_POWERDOWN_DAC        0x4
0039 #define AD5064_CMD_CLEAR            0x5
0040 #define AD5064_CMD_LDAC_MASK            0x6
0041 #define AD5064_CMD_RESET            0x7
0042 #define AD5064_CMD_CONFIG           0x8
0043 
0044 #define AD5064_CMD_RESET_V2         0x5
0045 #define AD5064_CMD_CONFIG_V2            0x7
0046 
0047 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE    BIT(1)
0048 #define AD5064_CONFIG_INT_VREF_ENABLE       BIT(0)
0049 
0050 #define AD5064_LDAC_PWRDN_NONE          0x0
0051 #define AD5064_LDAC_PWRDN_1K            0x1
0052 #define AD5064_LDAC_PWRDN_100K          0x2
0053 #define AD5064_LDAC_PWRDN_3STATE        0x3
0054 
0055 /**
0056  * enum ad5064_regmap_type - Register layout variant
0057  * @AD5064_REGMAP_ADI: Old Analog Devices register map layout
0058  * @AD5064_REGMAP_ADI2: New Analog Devices register map layout
0059  * @AD5064_REGMAP_LTC: LTC register map layout
0060  */
0061 enum ad5064_regmap_type {
0062     AD5064_REGMAP_ADI,
0063     AD5064_REGMAP_ADI2,
0064     AD5064_REGMAP_LTC,
0065 };
0066 
0067 /**
0068  * struct ad5064_chip_info - chip specific information
0069  * @shared_vref:    whether the vref supply is shared between channels
0070  * @internal_vref:  internal reference voltage. 0 if the chip has no
0071  *          internal vref.
0072  * @channels:       channel specification
0073  * @num_channels:   number of channels
0074  * @regmap_type:    register map layout variant
0075  */
0076 
0077 struct ad5064_chip_info {
0078     bool shared_vref;
0079     unsigned long internal_vref;
0080     const struct iio_chan_spec *channels;
0081     unsigned int num_channels;
0082     enum ad5064_regmap_type regmap_type;
0083 };
0084 
0085 struct ad5064_state;
0086 
0087 typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
0088         unsigned int addr, unsigned int val);
0089 
0090 /**
0091  * struct ad5064_state - driver instance specific data
0092  * @dev:        the device for this driver instance
0093  * @chip_info:      chip model specific constants, available modes etc
0094  * @vref_reg:       vref supply regulators
0095  * @pwr_down:       whether channel is powered down
0096  * @pwr_down_mode:  channel's current power down mode
0097  * @dac_cache:      current DAC raw value (chip does not support readback)
0098  * @use_internal_vref:  set to true if the internal reference voltage should be
0099  *          used.
0100  * @write:      register write callback
0101  * @lock:       maintain consistency between cached and dev state
0102  * @data:       i2c/spi transfer buffers
0103  */
0104 
0105 struct ad5064_state {
0106     struct device           *dev;
0107     const struct ad5064_chip_info   *chip_info;
0108     struct regulator_bulk_data  vref_reg[AD5064_MAX_VREFS];
0109     bool                pwr_down[AD5064_MAX_DAC_CHANNELS];
0110     u8              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
0111     unsigned int            dac_cache[AD5064_MAX_DAC_CHANNELS];
0112     bool                use_internal_vref;
0113 
0114     ad5064_write_func       write;
0115     struct mutex lock;
0116 
0117     /*
0118      * DMA (thus cache coherency maintenance) may require the
0119      * transfer buffers to live in their own cache lines.
0120      */
0121     union {
0122         u8 i2c[3];
0123         __be32 spi;
0124     } data __aligned(IIO_DMA_MINALIGN);
0125 };
0126 
0127 enum ad5064_type {
0128     ID_AD5024,
0129     ID_AD5025,
0130     ID_AD5044,
0131     ID_AD5045,
0132     ID_AD5064,
0133     ID_AD5064_1,
0134     ID_AD5065,
0135     ID_AD5625,
0136     ID_AD5625R_1V25,
0137     ID_AD5625R_2V5,
0138     ID_AD5627,
0139     ID_AD5627R_1V25,
0140     ID_AD5627R_2V5,
0141     ID_AD5628_1,
0142     ID_AD5628_2,
0143     ID_AD5629_1,
0144     ID_AD5629_2,
0145     ID_AD5645R_1V25,
0146     ID_AD5645R_2V5,
0147     ID_AD5647R_1V25,
0148     ID_AD5647R_2V5,
0149     ID_AD5648_1,
0150     ID_AD5648_2,
0151     ID_AD5665,
0152     ID_AD5665R_1V25,
0153     ID_AD5665R_2V5,
0154     ID_AD5666_1,
0155     ID_AD5666_2,
0156     ID_AD5667,
0157     ID_AD5667R_1V25,
0158     ID_AD5667R_2V5,
0159     ID_AD5668_1,
0160     ID_AD5668_2,
0161     ID_AD5669_1,
0162     ID_AD5669_2,
0163     ID_LTC2606,
0164     ID_LTC2607,
0165     ID_LTC2609,
0166     ID_LTC2616,
0167     ID_LTC2617,
0168     ID_LTC2619,
0169     ID_LTC2626,
0170     ID_LTC2627,
0171     ID_LTC2629,
0172     ID_LTC2631_L12,
0173     ID_LTC2631_H12,
0174     ID_LTC2631_L10,
0175     ID_LTC2631_H10,
0176     ID_LTC2631_L8,
0177     ID_LTC2631_H8,
0178     ID_LTC2633_L12,
0179     ID_LTC2633_H12,
0180     ID_LTC2633_L10,
0181     ID_LTC2633_H10,
0182     ID_LTC2633_L8,
0183     ID_LTC2633_H8,
0184     ID_LTC2635_L12,
0185     ID_LTC2635_H12,
0186     ID_LTC2635_L10,
0187     ID_LTC2635_H10,
0188     ID_LTC2635_L8,
0189     ID_LTC2635_H8,
0190 };
0191 
0192 static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
0193     unsigned int addr, unsigned int val, unsigned int shift)
0194 {
0195     val <<= shift;
0196 
0197     return st->write(st, cmd, addr, val);
0198 }
0199 
0200 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
0201     const struct iio_chan_spec *chan)
0202 {
0203     unsigned int val, address;
0204     unsigned int shift;
0205     int ret;
0206 
0207     if (st->chip_info->regmap_type == AD5064_REGMAP_LTC) {
0208         val = 0;
0209         address = chan->address;
0210     } else {
0211         if (st->chip_info->regmap_type == AD5064_REGMAP_ADI2)
0212             shift = 4;
0213         else
0214             shift = 8;
0215 
0216         val = (0x1 << chan->address);
0217         address = 0;
0218 
0219         if (st->pwr_down[chan->channel])
0220             val |= st->pwr_down_mode[chan->channel] << shift;
0221     }
0222 
0223     ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, address, val, 0);
0224 
0225     return ret;
0226 }
0227 
0228 static const char * const ad5064_powerdown_modes[] = {
0229     "1kohm_to_gnd",
0230     "100kohm_to_gnd",
0231     "three_state",
0232 };
0233 
0234 static const char * const ltc2617_powerdown_modes[] = {
0235     "90kohm_to_gnd",
0236 };
0237 
0238 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
0239     const struct iio_chan_spec *chan)
0240 {
0241     struct ad5064_state *st = iio_priv(indio_dev);
0242 
0243     return st->pwr_down_mode[chan->channel] - 1;
0244 }
0245 
0246 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
0247     const struct iio_chan_spec *chan, unsigned int mode)
0248 {
0249     struct ad5064_state *st = iio_priv(indio_dev);
0250     int ret;
0251 
0252     mutex_lock(&st->lock);
0253     st->pwr_down_mode[chan->channel] = mode + 1;
0254 
0255     ret = ad5064_sync_powerdown_mode(st, chan);
0256     mutex_unlock(&st->lock);
0257 
0258     return ret;
0259 }
0260 
0261 static const struct iio_enum ad5064_powerdown_mode_enum = {
0262     .items = ad5064_powerdown_modes,
0263     .num_items = ARRAY_SIZE(ad5064_powerdown_modes),
0264     .get = ad5064_get_powerdown_mode,
0265     .set = ad5064_set_powerdown_mode,
0266 };
0267 
0268 static const struct iio_enum ltc2617_powerdown_mode_enum = {
0269     .items = ltc2617_powerdown_modes,
0270     .num_items = ARRAY_SIZE(ltc2617_powerdown_modes),
0271     .get = ad5064_get_powerdown_mode,
0272     .set = ad5064_set_powerdown_mode,
0273 };
0274 
0275 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
0276     uintptr_t private, const struct iio_chan_spec *chan, char *buf)
0277 {
0278     struct ad5064_state *st = iio_priv(indio_dev);
0279 
0280     return sysfs_emit(buf, "%d\n", st->pwr_down[chan->channel]);
0281 }
0282 
0283 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
0284      uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
0285      size_t len)
0286 {
0287     struct ad5064_state *st = iio_priv(indio_dev);
0288     bool pwr_down;
0289     int ret;
0290 
0291     ret = kstrtobool(buf, &pwr_down);
0292     if (ret)
0293         return ret;
0294 
0295     mutex_lock(&st->lock);
0296     st->pwr_down[chan->channel] = pwr_down;
0297 
0298     ret = ad5064_sync_powerdown_mode(st, chan);
0299     mutex_unlock(&st->lock);
0300     return ret ? ret : len;
0301 }
0302 
0303 static int ad5064_get_vref(struct ad5064_state *st,
0304     struct iio_chan_spec const *chan)
0305 {
0306     unsigned int i;
0307 
0308     if (st->use_internal_vref)
0309         return st->chip_info->internal_vref;
0310 
0311     i = st->chip_info->shared_vref ? 0 : chan->channel;
0312     return regulator_get_voltage(st->vref_reg[i].consumer);
0313 }
0314 
0315 static int ad5064_read_raw(struct iio_dev *indio_dev,
0316                struct iio_chan_spec const *chan,
0317                int *val,
0318                int *val2,
0319                long m)
0320 {
0321     struct ad5064_state *st = iio_priv(indio_dev);
0322     int scale_uv;
0323 
0324     switch (m) {
0325     case IIO_CHAN_INFO_RAW:
0326         *val = st->dac_cache[chan->channel];
0327         return IIO_VAL_INT;
0328     case IIO_CHAN_INFO_SCALE:
0329         scale_uv = ad5064_get_vref(st, chan);
0330         if (scale_uv < 0)
0331             return scale_uv;
0332 
0333         *val = scale_uv / 1000;
0334         *val2 = chan->scan_type.realbits;
0335         return IIO_VAL_FRACTIONAL_LOG2;
0336     default:
0337         break;
0338     }
0339     return -EINVAL;
0340 }
0341 
0342 static int ad5064_write_raw(struct iio_dev *indio_dev,
0343     struct iio_chan_spec const *chan, int val, int val2, long mask)
0344 {
0345     struct ad5064_state *st = iio_priv(indio_dev);
0346     int ret;
0347 
0348     switch (mask) {
0349     case IIO_CHAN_INFO_RAW:
0350         if (val >= (1 << chan->scan_type.realbits) || val < 0)
0351             return -EINVAL;
0352 
0353         mutex_lock(&st->lock);
0354         ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
0355                 chan->address, val, chan->scan_type.shift);
0356         if (ret == 0)
0357             st->dac_cache[chan->channel] = val;
0358         mutex_unlock(&st->lock);
0359         break;
0360     default:
0361         ret = -EINVAL;
0362     }
0363 
0364     return ret;
0365 }
0366 
0367 static const struct iio_info ad5064_info = {
0368     .read_raw = ad5064_read_raw,
0369     .write_raw = ad5064_write_raw,
0370 };
0371 
0372 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
0373     {
0374         .name = "powerdown",
0375         .read = ad5064_read_dac_powerdown,
0376         .write = ad5064_write_dac_powerdown,
0377         .shared = IIO_SEPARATE,
0378     },
0379     IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum),
0380     IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ad5064_powerdown_mode_enum),
0381     { },
0382 };
0383 
0384 static const struct iio_chan_spec_ext_info ltc2617_ext_info[] = {
0385     {
0386         .name = "powerdown",
0387         .read = ad5064_read_dac_powerdown,
0388         .write = ad5064_write_dac_powerdown,
0389         .shared = IIO_SEPARATE,
0390     },
0391     IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ltc2617_powerdown_mode_enum),
0392     IIO_ENUM_AVAILABLE("powerdown_mode", IIO_SHARED_BY_TYPE, &ltc2617_powerdown_mode_enum),
0393     { },
0394 };
0395 
0396 #define AD5064_CHANNEL(chan, addr, bits, _shift, _ext_info) {       \
0397     .type = IIO_VOLTAGE,                    \
0398     .indexed = 1,                       \
0399     .output = 1,                        \
0400     .channel = (chan),                  \
0401     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |      \
0402     BIT(IIO_CHAN_INFO_SCALE),                   \
0403     .address = addr,                    \
0404     .scan_type = {                      \
0405         .sign = 'u',                    \
0406         .realbits = (bits),             \
0407         .storagebits = 16,              \
0408         .shift = (_shift),              \
0409     },                          \
0410     .ext_info = (_ext_info),                \
0411 }
0412 
0413 #define DECLARE_AD5064_CHANNELS(name, bits, shift, ext_info) \
0414 const struct iio_chan_spec name[] = { \
0415     AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
0416     AD5064_CHANNEL(1, 1, bits, shift, ext_info), \
0417     AD5064_CHANNEL(2, 2, bits, shift, ext_info), \
0418     AD5064_CHANNEL(3, 3, bits, shift, ext_info), \
0419     AD5064_CHANNEL(4, 4, bits, shift, ext_info), \
0420     AD5064_CHANNEL(5, 5, bits, shift, ext_info), \
0421     AD5064_CHANNEL(6, 6, bits, shift, ext_info), \
0422     AD5064_CHANNEL(7, 7, bits, shift, ext_info), \
0423 }
0424 
0425 #define DECLARE_AD5065_CHANNELS(name, bits, shift, ext_info) \
0426 const struct iio_chan_spec name[] = { \
0427     AD5064_CHANNEL(0, 0, bits, shift, ext_info), \
0428     AD5064_CHANNEL(1, 3, bits, shift, ext_info), \
0429 }
0430 
0431 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8, ad5064_ext_info);
0432 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6, ad5064_ext_info);
0433 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4, ad5064_ext_info);
0434 
0435 static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8, ad5064_ext_info);
0436 static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6, ad5064_ext_info);
0437 static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4, ad5064_ext_info);
0438 
0439 static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4, ad5064_ext_info);
0440 static DECLARE_AD5064_CHANNELS(ad5645_channels, 14, 2, ad5064_ext_info);
0441 static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0, ad5064_ext_info);
0442 
0443 static DECLARE_AD5064_CHANNELS(ltc2607_channels, 16, 0, ltc2617_ext_info);
0444 static DECLARE_AD5064_CHANNELS(ltc2617_channels, 14, 2, ltc2617_ext_info);
0445 static DECLARE_AD5064_CHANNELS(ltc2627_channels, 12, 4, ltc2617_ext_info);
0446 #define ltc2631_12_channels ltc2627_channels
0447 static DECLARE_AD5064_CHANNELS(ltc2631_10_channels, 10, 6, ltc2617_ext_info);
0448 static DECLARE_AD5064_CHANNELS(ltc2631_8_channels, 8, 8, ltc2617_ext_info);
0449 
0450 #define LTC2631_INFO(vref, pchannels, nchannels)    \
0451     {                       \
0452         .shared_vref = true,            \
0453         .internal_vref = vref,          \
0454         .channels = pchannels,          \
0455         .num_channels = nchannels,      \
0456         .regmap_type = AD5064_REGMAP_LTC,   \
0457     }
0458 
0459 
0460 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
0461     [ID_AD5024] = {
0462         .shared_vref = false,
0463         .channels = ad5024_channels,
0464         .num_channels = 4,
0465         .regmap_type = AD5064_REGMAP_ADI,
0466     },
0467     [ID_AD5025] = {
0468         .shared_vref = false,
0469         .channels = ad5025_channels,
0470         .num_channels = 2,
0471         .regmap_type = AD5064_REGMAP_ADI,
0472     },
0473     [ID_AD5044] = {
0474         .shared_vref = false,
0475         .channels = ad5044_channels,
0476         .num_channels = 4,
0477         .regmap_type = AD5064_REGMAP_ADI,
0478     },
0479     [ID_AD5045] = {
0480         .shared_vref = false,
0481         .channels = ad5045_channels,
0482         .num_channels = 2,
0483         .regmap_type = AD5064_REGMAP_ADI,
0484     },
0485     [ID_AD5064] = {
0486         .shared_vref = false,
0487         .channels = ad5064_channels,
0488         .num_channels = 4,
0489         .regmap_type = AD5064_REGMAP_ADI,
0490     },
0491     [ID_AD5064_1] = {
0492         .shared_vref = true,
0493         .channels = ad5064_channels,
0494         .num_channels = 4,
0495         .regmap_type = AD5064_REGMAP_ADI,
0496     },
0497     [ID_AD5065] = {
0498         .shared_vref = false,
0499         .channels = ad5065_channels,
0500         .num_channels = 2,
0501         .regmap_type = AD5064_REGMAP_ADI,
0502     },
0503     [ID_AD5625] = {
0504         .shared_vref = true,
0505         .channels = ad5629_channels,
0506         .num_channels = 4,
0507         .regmap_type = AD5064_REGMAP_ADI2
0508     },
0509     [ID_AD5625R_1V25] = {
0510         .shared_vref = true,
0511         .internal_vref = 1250000,
0512         .channels = ad5629_channels,
0513         .num_channels = 4,
0514         .regmap_type = AD5064_REGMAP_ADI2
0515     },
0516     [ID_AD5625R_2V5] = {
0517         .shared_vref = true,
0518         .internal_vref = 2500000,
0519         .channels = ad5629_channels,
0520         .num_channels = 4,
0521         .regmap_type = AD5064_REGMAP_ADI2
0522     },
0523     [ID_AD5627] = {
0524         .shared_vref = true,
0525         .channels = ad5629_channels,
0526         .num_channels = 2,
0527         .regmap_type = AD5064_REGMAP_ADI2
0528     },
0529     [ID_AD5627R_1V25] = {
0530         .shared_vref = true,
0531         .internal_vref = 1250000,
0532         .channels = ad5629_channels,
0533         .num_channels = 2,
0534         .regmap_type = AD5064_REGMAP_ADI2
0535     },
0536     [ID_AD5627R_2V5] = {
0537         .shared_vref = true,
0538         .internal_vref = 2500000,
0539         .channels = ad5629_channels,
0540         .num_channels = 2,
0541         .regmap_type = AD5064_REGMAP_ADI2
0542     },
0543     [ID_AD5628_1] = {
0544         .shared_vref = true,
0545         .internal_vref = 2500000,
0546         .channels = ad5024_channels,
0547         .num_channels = 8,
0548         .regmap_type = AD5064_REGMAP_ADI,
0549     },
0550     [ID_AD5628_2] = {
0551         .shared_vref = true,
0552         .internal_vref = 5000000,
0553         .channels = ad5024_channels,
0554         .num_channels = 8,
0555         .regmap_type = AD5064_REGMAP_ADI,
0556     },
0557     [ID_AD5629_1] = {
0558         .shared_vref = true,
0559         .internal_vref = 2500000,
0560         .channels = ad5629_channels,
0561         .num_channels = 8,
0562         .regmap_type = AD5064_REGMAP_ADI,
0563     },
0564     [ID_AD5629_2] = {
0565         .shared_vref = true,
0566         .internal_vref = 5000000,
0567         .channels = ad5629_channels,
0568         .num_channels = 8,
0569         .regmap_type = AD5064_REGMAP_ADI,
0570     },
0571     [ID_AD5645R_1V25] = {
0572         .shared_vref = true,
0573         .internal_vref = 1250000,
0574         .channels = ad5645_channels,
0575         .num_channels = 4,
0576         .regmap_type = AD5064_REGMAP_ADI2
0577     },
0578     [ID_AD5645R_2V5] = {
0579         .shared_vref = true,
0580         .internal_vref = 2500000,
0581         .channels = ad5645_channels,
0582         .num_channels = 4,
0583         .regmap_type = AD5064_REGMAP_ADI2
0584     },
0585     [ID_AD5647R_1V25] = {
0586         .shared_vref = true,
0587         .internal_vref = 1250000,
0588         .channels = ad5645_channels,
0589         .num_channels = 2,
0590         .regmap_type = AD5064_REGMAP_ADI2
0591     },
0592     [ID_AD5647R_2V5] = {
0593         .shared_vref = true,
0594         .internal_vref = 2500000,
0595         .channels = ad5645_channels,
0596         .num_channels = 2,
0597         .regmap_type = AD5064_REGMAP_ADI2
0598     },
0599     [ID_AD5648_1] = {
0600         .shared_vref = true,
0601         .internal_vref = 2500000,
0602         .channels = ad5044_channels,
0603         .num_channels = 8,
0604         .regmap_type = AD5064_REGMAP_ADI,
0605     },
0606     [ID_AD5648_2] = {
0607         .shared_vref = true,
0608         .internal_vref = 5000000,
0609         .channels = ad5044_channels,
0610         .num_channels = 8,
0611         .regmap_type = AD5064_REGMAP_ADI,
0612     },
0613     [ID_AD5665] = {
0614         .shared_vref = true,
0615         .channels = ad5669_channels,
0616         .num_channels = 4,
0617         .regmap_type = AD5064_REGMAP_ADI2
0618     },
0619     [ID_AD5665R_1V25] = {
0620         .shared_vref = true,
0621         .internal_vref = 1250000,
0622         .channels = ad5669_channels,
0623         .num_channels = 4,
0624         .regmap_type = AD5064_REGMAP_ADI2
0625     },
0626     [ID_AD5665R_2V5] = {
0627         .shared_vref = true,
0628         .internal_vref = 2500000,
0629         .channels = ad5669_channels,
0630         .num_channels = 4,
0631         .regmap_type = AD5064_REGMAP_ADI2
0632     },
0633     [ID_AD5666_1] = {
0634         .shared_vref = true,
0635         .internal_vref = 2500000,
0636         .channels = ad5064_channels,
0637         .num_channels = 4,
0638         .regmap_type = AD5064_REGMAP_ADI,
0639     },
0640     [ID_AD5666_2] = {
0641         .shared_vref = true,
0642         .internal_vref = 5000000,
0643         .channels = ad5064_channels,
0644         .num_channels = 4,
0645         .regmap_type = AD5064_REGMAP_ADI,
0646     },
0647     [ID_AD5667] = {
0648         .shared_vref = true,
0649         .channels = ad5669_channels,
0650         .num_channels = 2,
0651         .regmap_type = AD5064_REGMAP_ADI2
0652     },
0653     [ID_AD5667R_1V25] = {
0654         .shared_vref = true,
0655         .internal_vref = 1250000,
0656         .channels = ad5669_channels,
0657         .num_channels = 2,
0658         .regmap_type = AD5064_REGMAP_ADI2
0659     },
0660     [ID_AD5667R_2V5] = {
0661         .shared_vref = true,
0662         .internal_vref = 2500000,
0663         .channels = ad5669_channels,
0664         .num_channels = 2,
0665         .regmap_type = AD5064_REGMAP_ADI2
0666     },
0667     [ID_AD5668_1] = {
0668         .shared_vref = true,
0669         .internal_vref = 2500000,
0670         .channels = ad5064_channels,
0671         .num_channels = 8,
0672         .regmap_type = AD5064_REGMAP_ADI,
0673     },
0674     [ID_AD5668_2] = {
0675         .shared_vref = true,
0676         .internal_vref = 5000000,
0677         .channels = ad5064_channels,
0678         .num_channels = 8,
0679         .regmap_type = AD5064_REGMAP_ADI,
0680     },
0681     [ID_AD5669_1] = {
0682         .shared_vref = true,
0683         .internal_vref = 2500000,
0684         .channels = ad5669_channels,
0685         .num_channels = 8,
0686         .regmap_type = AD5064_REGMAP_ADI,
0687     },
0688     [ID_AD5669_2] = {
0689         .shared_vref = true,
0690         .internal_vref = 5000000,
0691         .channels = ad5669_channels,
0692         .num_channels = 8,
0693         .regmap_type = AD5064_REGMAP_ADI,
0694     },
0695     [ID_LTC2606] = {
0696         .shared_vref = true,
0697         .internal_vref = 0,
0698         .channels = ltc2607_channels,
0699         .num_channels = 1,
0700         .regmap_type = AD5064_REGMAP_LTC,
0701     },
0702     [ID_LTC2607] = {
0703         .shared_vref = true,
0704         .internal_vref = 0,
0705         .channels = ltc2607_channels,
0706         .num_channels = 2,
0707         .regmap_type = AD5064_REGMAP_LTC,
0708     },
0709     [ID_LTC2609] = {
0710         .shared_vref = false,
0711         .internal_vref = 0,
0712         .channels = ltc2607_channels,
0713         .num_channels = 4,
0714         .regmap_type = AD5064_REGMAP_LTC,
0715     },
0716     [ID_LTC2616] = {
0717         .shared_vref = true,
0718         .internal_vref = 0,
0719         .channels = ltc2617_channels,
0720         .num_channels = 1,
0721         .regmap_type = AD5064_REGMAP_LTC,
0722     },
0723     [ID_LTC2617] = {
0724         .shared_vref = true,
0725         .internal_vref = 0,
0726         .channels = ltc2617_channels,
0727         .num_channels = 2,
0728         .regmap_type = AD5064_REGMAP_LTC,
0729     },
0730     [ID_LTC2619] = {
0731         .shared_vref = false,
0732         .internal_vref = 0,
0733         .channels = ltc2617_channels,
0734         .num_channels = 4,
0735         .regmap_type = AD5064_REGMAP_LTC,
0736     },
0737     [ID_LTC2626] = {
0738         .shared_vref = true,
0739         .internal_vref = 0,
0740         .channels = ltc2627_channels,
0741         .num_channels = 1,
0742         .regmap_type = AD5064_REGMAP_LTC,
0743     },
0744     [ID_LTC2627] = {
0745         .shared_vref = true,
0746         .internal_vref = 0,
0747         .channels = ltc2627_channels,
0748         .num_channels = 2,
0749         .regmap_type = AD5064_REGMAP_LTC,
0750     },
0751     [ID_LTC2629] = {
0752         .shared_vref = false,
0753         .internal_vref = 0,
0754         .channels = ltc2627_channels,
0755         .num_channels = 4,
0756         .regmap_type = AD5064_REGMAP_LTC,
0757     },
0758     [ID_LTC2631_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 1),
0759     [ID_LTC2631_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 1),
0760     [ID_LTC2631_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 1),
0761     [ID_LTC2631_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 1),
0762     [ID_LTC2631_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 1),
0763     [ID_LTC2631_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 1),
0764     [ID_LTC2633_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 2),
0765     [ID_LTC2633_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 2),
0766     [ID_LTC2633_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 2),
0767     [ID_LTC2633_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 2),
0768     [ID_LTC2633_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 2),
0769     [ID_LTC2633_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 2),
0770     [ID_LTC2635_L12] = LTC2631_INFO(2500000, ltc2631_12_channels, 4),
0771     [ID_LTC2635_H12] = LTC2631_INFO(4096000, ltc2631_12_channels, 4),
0772     [ID_LTC2635_L10] = LTC2631_INFO(2500000, ltc2631_10_channels, 4),
0773     [ID_LTC2635_H10] = LTC2631_INFO(4096000, ltc2631_10_channels, 4),
0774     [ID_LTC2635_L8] = LTC2631_INFO(2500000, ltc2631_8_channels, 4),
0775     [ID_LTC2635_H8] = LTC2631_INFO(4096000, ltc2631_8_channels, 4),
0776 };
0777 
0778 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
0779 {
0780     return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
0781 }
0782 
0783 static const char * const ad5064_vref_names[] = {
0784     "vrefA",
0785     "vrefB",
0786     "vrefC",
0787     "vrefD",
0788 };
0789 
0790 static const char *ad5064_vref_name(struct ad5064_state *st,
0791     unsigned int vref)
0792 {
0793     return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
0794 }
0795 
0796 static int ad5064_set_config(struct ad5064_state *st, unsigned int val)
0797 {
0798     unsigned int cmd;
0799 
0800     switch (st->chip_info->regmap_type) {
0801     case AD5064_REGMAP_ADI2:
0802         cmd = AD5064_CMD_CONFIG_V2;
0803         break;
0804     default:
0805         cmd = AD5064_CMD_CONFIG;
0806         break;
0807     }
0808 
0809     return ad5064_write(st, cmd, 0, val, 0);
0810 }
0811 
0812 static int ad5064_request_vref(struct ad5064_state *st, struct device *dev)
0813 {
0814     unsigned int i;
0815     int ret;
0816 
0817     for (i = 0; i < ad5064_num_vref(st); ++i)
0818         st->vref_reg[i].supply = ad5064_vref_name(st, i);
0819 
0820     if (!st->chip_info->internal_vref)
0821         return devm_regulator_bulk_get(dev, ad5064_num_vref(st),
0822                            st->vref_reg);
0823 
0824     /*
0825      * This assumes that when the regulator has an internal VREF
0826      * there is only one external VREF connection, which is
0827      * currently the case for all supported devices.
0828      */
0829     st->vref_reg[0].consumer = devm_regulator_get_optional(dev, "vref");
0830     if (!IS_ERR(st->vref_reg[0].consumer))
0831         return 0;
0832 
0833     ret = PTR_ERR(st->vref_reg[0].consumer);
0834     if (ret != -ENODEV)
0835         return ret;
0836 
0837     /* If no external regulator was supplied use the internal VREF */
0838     st->use_internal_vref = true;
0839     ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE);
0840     if (ret)
0841         dev_err(dev, "Failed to enable internal vref: %d\n", ret);
0842 
0843     return ret;
0844 }
0845 
0846 static void ad5064_bulk_reg_disable(void *data)
0847 {
0848     struct ad5064_state *st = data;
0849 
0850     regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
0851 }
0852 
0853 static int ad5064_probe(struct device *dev, enum ad5064_type type,
0854             const char *name, ad5064_write_func write)
0855 {
0856     struct iio_dev *indio_dev;
0857     struct ad5064_state *st;
0858     unsigned int midscale;
0859     unsigned int i;
0860     int ret;
0861 
0862     indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
0863     if (indio_dev == NULL)
0864         return  -ENOMEM;
0865 
0866     st = iio_priv(indio_dev);
0867     mutex_init(&st->lock);
0868 
0869     st->chip_info = &ad5064_chip_info_tbl[type];
0870     st->dev = dev;
0871     st->write = write;
0872 
0873     ret = ad5064_request_vref(st, dev);
0874     if (ret)
0875         return ret;
0876 
0877     if (!st->use_internal_vref) {
0878         ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
0879         if (ret)
0880             return ret;
0881 
0882         ret = devm_add_action_or_reset(dev, ad5064_bulk_reg_disable, st);
0883         if (ret)
0884             return ret;
0885     }
0886 
0887     indio_dev->name = name;
0888     indio_dev->info = &ad5064_info;
0889     indio_dev->modes = INDIO_DIRECT_MODE;
0890     indio_dev->channels = st->chip_info->channels;
0891     indio_dev->num_channels = st->chip_info->num_channels;
0892 
0893     midscale = (1 << indio_dev->channels[0].scan_type.realbits) /  2;
0894 
0895     for (i = 0; i < st->chip_info->num_channels; ++i) {
0896         st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
0897         st->dac_cache[i] = midscale;
0898     }
0899 
0900     return devm_iio_device_register(dev, indio_dev);
0901 }
0902 
0903 #if IS_ENABLED(CONFIG_SPI_MASTER)
0904 
0905 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
0906     unsigned int addr, unsigned int val)
0907 {
0908     struct spi_device *spi = to_spi_device(st->dev);
0909 
0910     st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
0911     return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
0912 }
0913 
0914 static int ad5064_spi_probe(struct spi_device *spi)
0915 {
0916     const struct spi_device_id *id = spi_get_device_id(spi);
0917 
0918     return ad5064_probe(&spi->dev, id->driver_data, id->name,
0919                 ad5064_spi_write);
0920 }
0921 
0922 static const struct spi_device_id ad5064_spi_ids[] = {
0923     {"ad5024", ID_AD5024},
0924     {"ad5025", ID_AD5025},
0925     {"ad5044", ID_AD5044},
0926     {"ad5045", ID_AD5045},
0927     {"ad5064", ID_AD5064},
0928     {"ad5064-1", ID_AD5064_1},
0929     {"ad5065", ID_AD5065},
0930     {"ad5628-1", ID_AD5628_1},
0931     {"ad5628-2", ID_AD5628_2},
0932     {"ad5648-1", ID_AD5648_1},
0933     {"ad5648-2", ID_AD5648_2},
0934     {"ad5666-1", ID_AD5666_1},
0935     {"ad5666-2", ID_AD5666_2},
0936     {"ad5668-1", ID_AD5668_1},
0937     {"ad5668-2", ID_AD5668_2},
0938     {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
0939     {}
0940 };
0941 MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
0942 
0943 static struct spi_driver ad5064_spi_driver = {
0944     .driver = {
0945            .name = "ad5064",
0946     },
0947     .probe = ad5064_spi_probe,
0948     .id_table = ad5064_spi_ids,
0949 };
0950 
0951 static int __init ad5064_spi_register_driver(void)
0952 {
0953     return spi_register_driver(&ad5064_spi_driver);
0954 }
0955 
0956 static void ad5064_spi_unregister_driver(void)
0957 {
0958     spi_unregister_driver(&ad5064_spi_driver);
0959 }
0960 
0961 #else
0962 
0963 static inline int ad5064_spi_register_driver(void) { return 0; }
0964 static inline void ad5064_spi_unregister_driver(void) { }
0965 
0966 #endif
0967 
0968 #if IS_ENABLED(CONFIG_I2C)
0969 
0970 static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
0971     unsigned int addr, unsigned int val)
0972 {
0973     struct i2c_client *i2c = to_i2c_client(st->dev);
0974     unsigned int cmd_shift;
0975     int ret;
0976 
0977     switch (st->chip_info->regmap_type) {
0978     case AD5064_REGMAP_ADI2:
0979         cmd_shift = 3;
0980         break;
0981     default:
0982         cmd_shift = 4;
0983         break;
0984     }
0985 
0986     st->data.i2c[0] = (cmd << cmd_shift) | addr;
0987     put_unaligned_be16(val, &st->data.i2c[1]);
0988 
0989     ret = i2c_master_send(i2c, st->data.i2c, 3);
0990     if (ret < 0)
0991         return ret;
0992 
0993     return 0;
0994 }
0995 
0996 static int ad5064_i2c_probe(struct i2c_client *i2c,
0997     const struct i2c_device_id *id)
0998 {
0999     return ad5064_probe(&i2c->dev, id->driver_data, id->name,
1000                         ad5064_i2c_write);
1001 }
1002 
1003 static const struct i2c_device_id ad5064_i2c_ids[] = {
1004     {"ad5625", ID_AD5625 },
1005     {"ad5625r-1v25", ID_AD5625R_1V25 },
1006     {"ad5625r-2v5", ID_AD5625R_2V5 },
1007     {"ad5627", ID_AD5627 },
1008     {"ad5627r-1v25", ID_AD5627R_1V25 },
1009     {"ad5627r-2v5", ID_AD5627R_2V5 },
1010     {"ad5629-1", ID_AD5629_1},
1011     {"ad5629-2", ID_AD5629_2},
1012     {"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
1013     {"ad5645r-1v25", ID_AD5645R_1V25 },
1014     {"ad5645r-2v5", ID_AD5645R_2V5 },
1015     {"ad5665", ID_AD5665 },
1016     {"ad5665r-1v25", ID_AD5665R_1V25 },
1017     {"ad5665r-2v5", ID_AD5665R_2V5 },
1018     {"ad5667", ID_AD5667 },
1019     {"ad5667r-1v25", ID_AD5667R_1V25 },
1020     {"ad5667r-2v5", ID_AD5667R_2V5 },
1021     {"ad5669-1", ID_AD5669_1},
1022     {"ad5669-2", ID_AD5669_2},
1023     {"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
1024     {"ltc2606", ID_LTC2606},
1025     {"ltc2607", ID_LTC2607},
1026     {"ltc2609", ID_LTC2609},
1027     {"ltc2616", ID_LTC2616},
1028     {"ltc2617", ID_LTC2617},
1029     {"ltc2619", ID_LTC2619},
1030     {"ltc2626", ID_LTC2626},
1031     {"ltc2627", ID_LTC2627},
1032     {"ltc2629", ID_LTC2629},
1033     {"ltc2631-l12", ID_LTC2631_L12},
1034     {"ltc2631-h12", ID_LTC2631_H12},
1035     {"ltc2631-l10", ID_LTC2631_L10},
1036     {"ltc2631-h10", ID_LTC2631_H10},
1037     {"ltc2631-l8", ID_LTC2631_L8},
1038     {"ltc2631-h8", ID_LTC2631_H8},
1039     {"ltc2633-l12", ID_LTC2633_L12},
1040     {"ltc2633-h12", ID_LTC2633_H12},
1041     {"ltc2633-l10", ID_LTC2633_L10},
1042     {"ltc2633-h10", ID_LTC2633_H10},
1043     {"ltc2633-l8", ID_LTC2633_L8},
1044     {"ltc2633-h8", ID_LTC2633_H8},
1045     {"ltc2635-l12", ID_LTC2635_L12},
1046     {"ltc2635-h12", ID_LTC2635_H12},
1047     {"ltc2635-l10", ID_LTC2635_L10},
1048     {"ltc2635-h10", ID_LTC2635_H10},
1049     {"ltc2635-l8", ID_LTC2635_L8},
1050     {"ltc2635-h8", ID_LTC2635_H8},
1051     {}
1052 };
1053 MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
1054 
1055 static struct i2c_driver ad5064_i2c_driver = {
1056     .driver = {
1057            .name = "ad5064",
1058     },
1059     .probe = ad5064_i2c_probe,
1060     .id_table = ad5064_i2c_ids,
1061 };
1062 
1063 static int __init ad5064_i2c_register_driver(void)
1064 {
1065     return i2c_add_driver(&ad5064_i2c_driver);
1066 }
1067 
1068 static void __exit ad5064_i2c_unregister_driver(void)
1069 {
1070     i2c_del_driver(&ad5064_i2c_driver);
1071 }
1072 
1073 #else
1074 
1075 static inline int ad5064_i2c_register_driver(void) { return 0; }
1076 static inline void ad5064_i2c_unregister_driver(void) { }
1077 
1078 #endif
1079 
1080 static int __init ad5064_init(void)
1081 {
1082     int ret;
1083 
1084     ret = ad5064_spi_register_driver();
1085     if (ret)
1086         return ret;
1087 
1088     ret = ad5064_i2c_register_driver();
1089     if (ret) {
1090         ad5064_spi_unregister_driver();
1091         return ret;
1092     }
1093 
1094     return 0;
1095 }
1096 module_init(ad5064_init);
1097 
1098 static void __exit ad5064_exit(void)
1099 {
1100     ad5064_i2c_unregister_driver();
1101     ad5064_spi_unregister_driver();
1102 }
1103 module_exit(ad5064_exit);
1104 
1105 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
1106 MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
1107 MODULE_LICENSE("GPL v2");
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