Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * AD8366 and similar Gain Amplifiers
0004  * This driver supports the following gain amplifiers:
0005  *   AD8366 Dual-Digital Variable Gain Amplifier (VGA)
0006  *   ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
0007  *   ADL5240 Digitally controlled variable gain amplifier (VGA)
0008  *   HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator
0009  *
0010  * Copyright 2012-2019 Analog Devices Inc.
0011  */
0012 
0013 #include <linux/device.h>
0014 #include <linux/kernel.h>
0015 #include <linux/slab.h>
0016 #include <linux/sysfs.h>
0017 #include <linux/spi/spi.h>
0018 #include <linux/regulator/consumer.h>
0019 #include <linux/gpio/consumer.h>
0020 #include <linux/err.h>
0021 #include <linux/module.h>
0022 #include <linux/bitrev.h>
0023 
0024 #include <linux/iio/iio.h>
0025 #include <linux/iio/sysfs.h>
0026 
0027 enum ad8366_type {
0028     ID_AD8366,
0029     ID_ADA4961,
0030     ID_ADL5240,
0031     ID_HMC1119,
0032 };
0033 
0034 struct ad8366_info {
0035     int gain_min;
0036     int gain_max;
0037 };
0038 
0039 struct ad8366_state {
0040     struct spi_device   *spi;
0041     struct regulator    *reg;
0042     struct mutex            lock; /* protect sensor state */
0043     struct gpio_desc    *reset_gpio;
0044     unsigned char       ch[2];
0045     enum ad8366_type    type;
0046     struct ad8366_info  *info;
0047     /*
0048      * DMA (thus cache coherency maintenance) may require the
0049      * transfer buffers to live in their own cache lines.
0050      */
0051     unsigned char       data[2] __aligned(IIO_DMA_MINALIGN);
0052 };
0053 
0054 static struct ad8366_info ad8366_infos[] = {
0055     [ID_AD8366] = {
0056         .gain_min = 4500,
0057         .gain_max = 20500,
0058     },
0059     [ID_ADA4961] = {
0060         .gain_min = -6000,
0061         .gain_max = 15000,
0062     },
0063     [ID_ADL5240] = {
0064         .gain_min = -11500,
0065         .gain_max = 20000,
0066     },
0067     [ID_HMC1119] = {
0068         .gain_min = -31750,
0069         .gain_max = 0,
0070     },
0071 };
0072 
0073 static int ad8366_write(struct iio_dev *indio_dev,
0074             unsigned char ch_a, unsigned char ch_b)
0075 {
0076     struct ad8366_state *st = iio_priv(indio_dev);
0077     int ret;
0078 
0079     switch (st->type) {
0080     case ID_AD8366:
0081         ch_a = bitrev8(ch_a & 0x3F);
0082         ch_b = bitrev8(ch_b & 0x3F);
0083 
0084         st->data[0] = ch_b >> 4;
0085         st->data[1] = (ch_b << 4) | (ch_a >> 2);
0086         break;
0087     case ID_ADA4961:
0088         st->data[0] = ch_a & 0x1F;
0089         break;
0090     case ID_ADL5240:
0091         st->data[0] = (ch_a & 0x3F);
0092         break;
0093     case ID_HMC1119:
0094         st->data[0] = ch_a;
0095         break;
0096     }
0097 
0098     ret = spi_write(st->spi, st->data, indio_dev->num_channels);
0099     if (ret < 0)
0100         dev_err(&indio_dev->dev, "write failed (%d)", ret);
0101 
0102     return ret;
0103 }
0104 
0105 static int ad8366_read_raw(struct iio_dev *indio_dev,
0106                struct iio_chan_spec const *chan,
0107                int *val,
0108                int *val2,
0109                long m)
0110 {
0111     struct ad8366_state *st = iio_priv(indio_dev);
0112     int ret;
0113     int code, gain = 0;
0114 
0115     mutex_lock(&st->lock);
0116     switch (m) {
0117     case IIO_CHAN_INFO_HARDWAREGAIN:
0118         code = st->ch[chan->channel];
0119 
0120         switch (st->type) {
0121         case ID_AD8366:
0122             gain = code * 253 + 4500;
0123             break;
0124         case ID_ADA4961:
0125             gain = 15000 - code * 1000;
0126             break;
0127         case ID_ADL5240:
0128             gain = 20000 - 31500 + code * 500;
0129             break;
0130         case ID_HMC1119:
0131             gain = -1 * code * 250;
0132             break;
0133         }
0134 
0135         /* Values in dB */
0136         *val = gain / 1000;
0137         *val2 = (gain % 1000) * 1000;
0138 
0139         ret = IIO_VAL_INT_PLUS_MICRO_DB;
0140         break;
0141     default:
0142         ret = -EINVAL;
0143     }
0144     mutex_unlock(&st->lock);
0145 
0146     return ret;
0147 };
0148 
0149 static int ad8366_write_raw(struct iio_dev *indio_dev,
0150                 struct iio_chan_spec const *chan,
0151                 int val,
0152                 int val2,
0153                 long mask)
0154 {
0155     struct ad8366_state *st = iio_priv(indio_dev);
0156     struct ad8366_info *inf = st->info;
0157     int code = 0, gain;
0158     int ret;
0159 
0160     /* Values in dB */
0161     if (val < 0)
0162         gain = (val * 1000) - (val2 / 1000);
0163     else
0164         gain = (val * 1000) + (val2 / 1000);
0165 
0166     if (gain > inf->gain_max || gain < inf->gain_min)
0167         return -EINVAL;
0168 
0169     switch (st->type) {
0170     case ID_AD8366:
0171         code = (gain - 4500) / 253;
0172         break;
0173     case ID_ADA4961:
0174         code = (15000 - gain) / 1000;
0175         break;
0176     case ID_ADL5240:
0177         code = ((gain - 500 - 20000) / 500) & 0x3F;
0178         break;
0179     case ID_HMC1119:
0180         code = (abs(gain) / 250) & 0x7F;
0181         break;
0182     }
0183 
0184     mutex_lock(&st->lock);
0185     switch (mask) {
0186     case IIO_CHAN_INFO_HARDWAREGAIN:
0187         st->ch[chan->channel] = code;
0188         ret = ad8366_write(indio_dev, st->ch[0], st->ch[1]);
0189         break;
0190     default:
0191         ret = -EINVAL;
0192     }
0193     mutex_unlock(&st->lock);
0194 
0195     return ret;
0196 }
0197 
0198 static int ad8366_write_raw_get_fmt(struct iio_dev *indio_dev,
0199                     struct iio_chan_spec const *chan,
0200                     long mask)
0201 {
0202     switch (mask) {
0203     case IIO_CHAN_INFO_HARDWAREGAIN:
0204         return IIO_VAL_INT_PLUS_MICRO_DB;
0205     default:
0206         return -EINVAL;
0207     }
0208 }
0209 
0210 static const struct iio_info ad8366_info = {
0211     .read_raw = &ad8366_read_raw,
0212     .write_raw = &ad8366_write_raw,
0213     .write_raw_get_fmt = &ad8366_write_raw_get_fmt,
0214 };
0215 
0216 #define AD8366_CHAN(_channel) {             \
0217     .type = IIO_VOLTAGE,                \
0218     .output = 1,                    \
0219     .indexed = 1,                   \
0220     .channel = _channel,                \
0221     .info_mask_separate = BIT(IIO_CHAN_INFO_HARDWAREGAIN),\
0222 }
0223 
0224 static const struct iio_chan_spec ad8366_channels[] = {
0225     AD8366_CHAN(0),
0226     AD8366_CHAN(1),
0227 };
0228 
0229 static const struct iio_chan_spec ada4961_channels[] = {
0230     AD8366_CHAN(0),
0231 };
0232 
0233 static int ad8366_probe(struct spi_device *spi)
0234 {
0235     struct iio_dev *indio_dev;
0236     struct ad8366_state *st;
0237     int ret;
0238 
0239     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0240     if (indio_dev == NULL)
0241         return -ENOMEM;
0242 
0243     st = iio_priv(indio_dev);
0244 
0245     st->reg = devm_regulator_get(&spi->dev, "vcc");
0246     if (!IS_ERR(st->reg)) {
0247         ret = regulator_enable(st->reg);
0248         if (ret)
0249             return ret;
0250     }
0251 
0252     spi_set_drvdata(spi, indio_dev);
0253     mutex_init(&st->lock);
0254     st->spi = spi;
0255     st->type = spi_get_device_id(spi)->driver_data;
0256 
0257     switch (st->type) {
0258     case ID_AD8366:
0259         indio_dev->channels = ad8366_channels;
0260         indio_dev->num_channels = ARRAY_SIZE(ad8366_channels);
0261         break;
0262     case ID_ADA4961:
0263     case ID_ADL5240:
0264     case ID_HMC1119:
0265         st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_HIGH);
0266         if (IS_ERR(st->reset_gpio)) {
0267             ret = PTR_ERR(st->reset_gpio);
0268             goto error_disable_reg;
0269         }
0270         indio_dev->channels = ada4961_channels;
0271         indio_dev->num_channels = ARRAY_SIZE(ada4961_channels);
0272         break;
0273     default:
0274         dev_err(&spi->dev, "Invalid device ID\n");
0275         ret = -EINVAL;
0276         goto error_disable_reg;
0277     }
0278 
0279     st->info = &ad8366_infos[st->type];
0280     indio_dev->name = spi_get_device_id(spi)->name;
0281     indio_dev->info = &ad8366_info;
0282     indio_dev->modes = INDIO_DIRECT_MODE;
0283 
0284     ret = ad8366_write(indio_dev, 0 , 0);
0285     if (ret < 0)
0286         goto error_disable_reg;
0287 
0288     ret = iio_device_register(indio_dev);
0289     if (ret)
0290         goto error_disable_reg;
0291 
0292     return 0;
0293 
0294 error_disable_reg:
0295     if (!IS_ERR(st->reg))
0296         regulator_disable(st->reg);
0297 
0298     return ret;
0299 }
0300 
0301 static void ad8366_remove(struct spi_device *spi)
0302 {
0303     struct iio_dev *indio_dev = spi_get_drvdata(spi);
0304     struct ad8366_state *st = iio_priv(indio_dev);
0305     struct regulator *reg = st->reg;
0306 
0307     iio_device_unregister(indio_dev);
0308 
0309     if (!IS_ERR(reg))
0310         regulator_disable(reg);
0311 }
0312 
0313 static const struct spi_device_id ad8366_id[] = {
0314     {"ad8366",  ID_AD8366},
0315     {"ada4961", ID_ADA4961},
0316     {"adl5240", ID_ADL5240},
0317     {"hmc1119", ID_HMC1119},
0318     {}
0319 };
0320 MODULE_DEVICE_TABLE(spi, ad8366_id);
0321 
0322 static struct spi_driver ad8366_driver = {
0323     .driver = {
0324         .name   = KBUILD_MODNAME,
0325     },
0326     .probe      = ad8366_probe,
0327     .remove     = ad8366_remove,
0328     .id_table   = ad8366_id,
0329 };
0330 
0331 module_spi_driver(ad8366_driver);
0332 
0333 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0334 MODULE_DESCRIPTION("Analog Devices AD8366 and similar Gain Amplifiers");
0335 MODULE_LICENSE("GPL v2");