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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *
0004  * TWL4030 MADC module driver-This driver monitors the real time
0005  * conversion of analog signals like battery temperature,
0006  * battery type, battery level etc.
0007  *
0008  * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
0009  * J Keerthy <j-keerthy@ti.com>
0010  *
0011  * Based on twl4030-madc.c
0012  * Copyright (C) 2008 Nokia Corporation
0013  * Mikko Ylinen <mikko.k.ylinen@nokia.com>
0014  *
0015  * Amit Kucheria <amit.kucheria@canonical.com>
0016  */
0017 
0018 #include <linux/device.h>
0019 #include <linux/interrupt.h>
0020 #include <linux/kernel.h>
0021 #include <linux/delay.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/slab.h>
0024 #include <linux/mfd/twl.h>
0025 #include <linux/module.h>
0026 #include <linux/stddef.h>
0027 #include <linux/mutex.h>
0028 #include <linux/bitops.h>
0029 #include <linux/jiffies.h>
0030 #include <linux/types.h>
0031 #include <linux/gfp.h>
0032 #include <linux/err.h>
0033 #include <linux/regulator/consumer.h>
0034 
0035 #include <linux/iio/iio.h>
0036 
0037 #define TWL4030_MADC_MAX_CHANNELS 16
0038 
0039 #define TWL4030_MADC_CTRL1      0x00
0040 #define TWL4030_MADC_CTRL2      0x01
0041 
0042 #define TWL4030_MADC_RTSELECT_LSB   0x02
0043 #define TWL4030_MADC_SW1SELECT_LSB  0x06
0044 #define TWL4030_MADC_SW2SELECT_LSB  0x0A
0045 
0046 #define TWL4030_MADC_RTAVERAGE_LSB  0x04
0047 #define TWL4030_MADC_SW1AVERAGE_LSB 0x08
0048 #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
0049 
0050 #define TWL4030_MADC_CTRL_SW1       0x12
0051 #define TWL4030_MADC_CTRL_SW2       0x13
0052 
0053 #define TWL4030_MADC_RTCH0_LSB      0x17
0054 #define TWL4030_MADC_GPCH0_LSB      0x37
0055 
0056 #define TWL4030_MADC_MADCON (1 << 0)    /* MADC power on */
0057 #define TWL4030_MADC_BUSY   (1 << 0)    /* MADC busy */
0058 /* MADC conversion completion */
0059 #define TWL4030_MADC_EOC_SW (1 << 1)
0060 /* MADC SWx start conversion */
0061 #define TWL4030_MADC_SW_START   (1 << 5)
0062 #define TWL4030_MADC_ADCIN0 (1 << 0)
0063 #define TWL4030_MADC_ADCIN1 (1 << 1)
0064 #define TWL4030_MADC_ADCIN2 (1 << 2)
0065 #define TWL4030_MADC_ADCIN3 (1 << 3)
0066 #define TWL4030_MADC_ADCIN4 (1 << 4)
0067 #define TWL4030_MADC_ADCIN5 (1 << 5)
0068 #define TWL4030_MADC_ADCIN6 (1 << 6)
0069 #define TWL4030_MADC_ADCIN7 (1 << 7)
0070 #define TWL4030_MADC_ADCIN8 (1 << 8)
0071 #define TWL4030_MADC_ADCIN9 (1 << 9)
0072 #define TWL4030_MADC_ADCIN10    (1 << 10)
0073 #define TWL4030_MADC_ADCIN11    (1 << 11)
0074 #define TWL4030_MADC_ADCIN12    (1 << 12)
0075 #define TWL4030_MADC_ADCIN13    (1 << 13)
0076 #define TWL4030_MADC_ADCIN14    (1 << 14)
0077 #define TWL4030_MADC_ADCIN15    (1 << 15)
0078 
0079 /* Fixed channels */
0080 #define TWL4030_MADC_BTEMP  TWL4030_MADC_ADCIN1
0081 #define TWL4030_MADC_VBUS   TWL4030_MADC_ADCIN8
0082 #define TWL4030_MADC_VBKB   TWL4030_MADC_ADCIN9
0083 #define TWL4030_MADC_ICHG   TWL4030_MADC_ADCIN10
0084 #define TWL4030_MADC_VCHG   TWL4030_MADC_ADCIN11
0085 #define TWL4030_MADC_VBAT   TWL4030_MADC_ADCIN12
0086 
0087 /* Step size and prescaler ratio */
0088 #define TEMP_STEP_SIZE          147
0089 #define TEMP_PSR_R              100
0090 #define CURR_STEP_SIZE      147
0091 #define CURR_PSR_R1     44
0092 #define CURR_PSR_R2     88
0093 
0094 #define TWL4030_BCI_BCICTL1 0x23
0095 #define TWL4030_BCI_CGAIN   0x020
0096 #define TWL4030_BCI_MESBAT  (1 << 1)
0097 #define TWL4030_BCI_TYPEN   (1 << 4)
0098 #define TWL4030_BCI_ITHEN   (1 << 3)
0099 
0100 #define REG_BCICTL2             0x024
0101 #define TWL4030_BCI_ITHSENS 0x007
0102 
0103 /* Register and bits for GPBR1 register */
0104 #define TWL4030_REG_GPBR1       0x0c
0105 #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
0106 
0107 #define TWL4030_USB_SEL_MADC_MCPC   (1<<3)
0108 #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
0109 
0110 struct twl4030_madc_conversion_method {
0111     u8 sel;
0112     u8 avg;
0113     u8 rbase;
0114     u8 ctrl;
0115 };
0116 
0117 /**
0118  * struct twl4030_madc_request - madc request packet for channel conversion
0119  * @channels:   16 bit bitmap for individual channels
0120  * @do_avg: sample the input channel for 4 consecutive cycles
0121  * @method: RT, SW1, SW2
0122  * @type:   Polling or interrupt based method
0123  * @active: Flag if request is active
0124  * @result_pending: Flag from irq handler, that result is ready
0125  * @raw:    Return raw value, do not convert it
0126  * @rbuf:   Result buffer
0127  */
0128 struct twl4030_madc_request {
0129     unsigned long channels;
0130     bool do_avg;
0131     u16 method;
0132     u16 type;
0133     bool active;
0134     bool result_pending;
0135     bool raw;
0136     int rbuf[TWL4030_MADC_MAX_CHANNELS];
0137 };
0138 
0139 enum conversion_methods {
0140     TWL4030_MADC_RT,
0141     TWL4030_MADC_SW1,
0142     TWL4030_MADC_SW2,
0143     TWL4030_MADC_NUM_METHODS
0144 };
0145 
0146 enum sample_type {
0147     TWL4030_MADC_WAIT,
0148     TWL4030_MADC_IRQ_ONESHOT,
0149     TWL4030_MADC_IRQ_REARM
0150 };
0151 
0152 /**
0153  * struct twl4030_madc_data - a container for madc info
0154  * @dev:        Pointer to device structure for madc
0155  * @lock:       Mutex protecting this data structure
0156  * @usb3v1:     Pointer to bias regulator for madc
0157  * @requests:       Array of request struct corresponding to SW1, SW2 and RT
0158  * @use_second_irq: IRQ selection (main or co-processor)
0159  * @imr:        Interrupt mask register of MADC
0160  * @isr:        Interrupt status register of MADC
0161  */
0162 struct twl4030_madc_data {
0163     struct device *dev;
0164     struct mutex lock;
0165     struct regulator *usb3v1;
0166     struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
0167     bool use_second_irq;
0168     u8 imr;
0169     u8 isr;
0170 };
0171 
0172 static int twl4030_madc_conversion(struct twl4030_madc_request *req);
0173 
0174 static int twl4030_madc_read(struct iio_dev *iio_dev,
0175                  const struct iio_chan_spec *chan,
0176                  int *val, int *val2, long mask)
0177 {
0178     struct twl4030_madc_data *madc = iio_priv(iio_dev);
0179     struct twl4030_madc_request req;
0180     int ret;
0181 
0182     req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1;
0183 
0184     req.channels = BIT(chan->channel);
0185     req.active = false;
0186     req.type = TWL4030_MADC_WAIT;
0187     req.raw = !(mask == IIO_CHAN_INFO_PROCESSED);
0188     req.do_avg = (mask == IIO_CHAN_INFO_AVERAGE_RAW);
0189 
0190     ret = twl4030_madc_conversion(&req);
0191     if (ret < 0)
0192         return ret;
0193 
0194     *val = req.rbuf[chan->channel];
0195 
0196     return IIO_VAL_INT;
0197 }
0198 
0199 static const struct iio_info twl4030_madc_iio_info = {
0200     .read_raw = &twl4030_madc_read,
0201 };
0202 
0203 #define TWL4030_ADC_CHANNEL(_channel, _type, _name) {   \
0204     .type = _type,                  \
0205     .channel = _channel,                \
0206     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |  \
0207                   BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \
0208                   BIT(IIO_CHAN_INFO_PROCESSED), \
0209     .datasheet_name = _name,            \
0210     .indexed = 1,                   \
0211 }
0212 
0213 static const struct iio_chan_spec twl4030_madc_iio_channels[] = {
0214     TWL4030_ADC_CHANNEL(0, IIO_VOLTAGE, "ADCIN0"),
0215     TWL4030_ADC_CHANNEL(1, IIO_TEMP, "ADCIN1"),
0216     TWL4030_ADC_CHANNEL(2, IIO_VOLTAGE, "ADCIN2"),
0217     TWL4030_ADC_CHANNEL(3, IIO_VOLTAGE, "ADCIN3"),
0218     TWL4030_ADC_CHANNEL(4, IIO_VOLTAGE, "ADCIN4"),
0219     TWL4030_ADC_CHANNEL(5, IIO_VOLTAGE, "ADCIN5"),
0220     TWL4030_ADC_CHANNEL(6, IIO_VOLTAGE, "ADCIN6"),
0221     TWL4030_ADC_CHANNEL(7, IIO_VOLTAGE, "ADCIN7"),
0222     TWL4030_ADC_CHANNEL(8, IIO_VOLTAGE, "ADCIN8"),
0223     TWL4030_ADC_CHANNEL(9, IIO_VOLTAGE, "ADCIN9"),
0224     TWL4030_ADC_CHANNEL(10, IIO_CURRENT, "ADCIN10"),
0225     TWL4030_ADC_CHANNEL(11, IIO_VOLTAGE, "ADCIN11"),
0226     TWL4030_ADC_CHANNEL(12, IIO_VOLTAGE, "ADCIN12"),
0227     TWL4030_ADC_CHANNEL(13, IIO_VOLTAGE, "ADCIN13"),
0228     TWL4030_ADC_CHANNEL(14, IIO_VOLTAGE, "ADCIN14"),
0229     TWL4030_ADC_CHANNEL(15, IIO_VOLTAGE, "ADCIN15"),
0230 };
0231 
0232 static struct twl4030_madc_data *twl4030_madc;
0233 
0234 static const struct s16_fract twl4030_divider_ratios[16] = {
0235     {1, 1},     /* CHANNEL 0 No Prescaler */
0236     {1, 1},     /* CHANNEL 1 No Prescaler */
0237     {6, 10},    /* CHANNEL 2 */
0238     {6, 10},    /* CHANNEL 3 */
0239     {6, 10},    /* CHANNEL 4 */
0240     {6, 10},    /* CHANNEL 5 */
0241     {6, 10},    /* CHANNEL 6 */
0242     {6, 10},    /* CHANNEL 7 */
0243     {3, 14},    /* CHANNEL 8 */
0244     {1, 3},     /* CHANNEL 9 */
0245     {1, 1},     /* CHANNEL 10 No Prescaler */
0246     {15, 100},  /* CHANNEL 11 */
0247     {1, 4},     /* CHANNEL 12 */
0248     {1, 1},     /* CHANNEL 13 Reserved channels */
0249     {1, 1},     /* CHANNEL 14 Reseved channels */
0250     {5, 11},    /* CHANNEL 15 */
0251 };
0252 
0253 /* Conversion table from -3 to 55 degrees Celcius */
0254 static int twl4030_therm_tbl[] = {
0255     30800,  29500,  28300,  27100,
0256     26000,  24900,  23900,  22900,  22000,  21100,  20300,  19400,  18700,
0257     17900,  17200,  16500,  15900,  15300,  14700,  14100,  13600,  13100,
0258     12600,  12100,  11600,  11200,  10800,  10400,  10000,  9630,   9280,
0259     8950,   8620,   8310,   8020,   7730,   7460,   7200,   6950,   6710,
0260     6470,   6250,   6040,   5830,   5640,   5450,   5260,   5090,   4920,
0261     4760,   4600,   4450,   4310,   4170,   4040,   3910,   3790,   3670,
0262     3550
0263 };
0264 
0265 /*
0266  * Structure containing the registers
0267  * of different conversion methods supported by MADC.
0268  * Hardware or RT real time conversion request initiated by external host
0269  * processor for RT Signal conversions.
0270  * External host processors can also request for non RT conversions
0271  * SW1 and SW2 software conversions also called asynchronous or GPC request.
0272  */
0273 static
0274 const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = {
0275     [TWL4030_MADC_RT] = {
0276                  .sel = TWL4030_MADC_RTSELECT_LSB,
0277                  .avg = TWL4030_MADC_RTAVERAGE_LSB,
0278                  .rbase = TWL4030_MADC_RTCH0_LSB,
0279                  },
0280     [TWL4030_MADC_SW1] = {
0281                   .sel = TWL4030_MADC_SW1SELECT_LSB,
0282                   .avg = TWL4030_MADC_SW1AVERAGE_LSB,
0283                   .rbase = TWL4030_MADC_GPCH0_LSB,
0284                   .ctrl = TWL4030_MADC_CTRL_SW1,
0285                   },
0286     [TWL4030_MADC_SW2] = {
0287                   .sel = TWL4030_MADC_SW2SELECT_LSB,
0288                   .avg = TWL4030_MADC_SW2AVERAGE_LSB,
0289                   .rbase = TWL4030_MADC_GPCH0_LSB,
0290                   .ctrl = TWL4030_MADC_CTRL_SW2,
0291                   },
0292 };
0293 
0294 /**
0295  * twl4030_madc_channel_raw_read() - Function to read a particular channel value
0296  * @madc:   pointer to struct twl4030_madc_data
0297  * @reg:    lsb of ADC Channel
0298  *
0299  * Return: 0 on success, an error code otherwise.
0300  */
0301 static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg)
0302 {
0303     u16 val;
0304     int ret;
0305     /*
0306      * For each ADC channel, we have MSB and LSB register pair. MSB address
0307      * is always LSB address+1. reg parameter is the address of LSB register
0308      */
0309     ret = twl_i2c_read_u16(TWL4030_MODULE_MADC, &val, reg);
0310     if (ret) {
0311         dev_err(madc->dev, "unable to read register 0x%X\n", reg);
0312         return ret;
0313     }
0314 
0315     return (int)(val >> 6);
0316 }
0317 
0318 /*
0319  * Return battery temperature in degrees Celsius
0320  * Or < 0 on failure.
0321  */
0322 static int twl4030battery_temperature(int raw_volt)
0323 {
0324     u8 val;
0325     int temp, curr, volt, res, ret;
0326 
0327     volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R;
0328     /* Getting and calculating the supply current in micro amperes */
0329     ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
0330         REG_BCICTL2);
0331     if (ret < 0)
0332         return ret;
0333 
0334     curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10;
0335     /* Getting and calculating the thermistor resistance in ohms */
0336     res = volt * 1000 / curr;
0337     /* calculating temperature */
0338     for (temp = 58; temp >= 0; temp--) {
0339         int actual = twl4030_therm_tbl[temp];
0340         if ((actual - res) >= 0)
0341             break;
0342     }
0343 
0344     return temp + 1;
0345 }
0346 
0347 static int twl4030battery_current(int raw_volt)
0348 {
0349     int ret;
0350     u8 val;
0351 
0352     ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
0353         TWL4030_BCI_BCICTL1);
0354     if (ret)
0355         return ret;
0356     if (val & TWL4030_BCI_CGAIN) /* slope of 0.44 mV/mA */
0357         return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R1;
0358     else /* slope of 0.88 mV/mA */
0359         return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R2;
0360 }
0361 
0362 /*
0363  * Function to read channel values
0364  * @madc - pointer to twl4030_madc_data struct
0365  * @reg_base - Base address of the first channel
0366  * @Channels - 16 bit bitmap. If the bit is set, channel's value is read
0367  * @buf - The channel values are stored here. if read fails error
0368  * @raw - Return raw values without conversion
0369  * value is stored
0370  * Returns the number of successfully read channels.
0371  */
0372 static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
0373                       u8 reg_base, unsigned
0374                       long channels, int *buf,
0375                       bool raw)
0376 {
0377     int count = 0;
0378     int i;
0379     u8 reg;
0380 
0381     for_each_set_bit(i, &channels, TWL4030_MADC_MAX_CHANNELS) {
0382         reg = reg_base + (2 * i);
0383         buf[i] = twl4030_madc_channel_raw_read(madc, reg);
0384         if (buf[i] < 0) {
0385             dev_err(madc->dev, "Unable to read register 0x%X\n",
0386                 reg);
0387             return buf[i];
0388         }
0389         if (raw) {
0390             count++;
0391             continue;
0392         }
0393         switch (i) {
0394         case 10:
0395             buf[i] = twl4030battery_current(buf[i]);
0396             if (buf[i] < 0) {
0397                 dev_err(madc->dev, "err reading current\n");
0398                 return buf[i];
0399             } else {
0400                 count++;
0401                 buf[i] = buf[i] - 750;
0402             }
0403             break;
0404         case 1:
0405             buf[i] = twl4030battery_temperature(buf[i]);
0406             if (buf[i] < 0) {
0407                 dev_err(madc->dev, "err reading temperature\n");
0408                 return buf[i];
0409             } else {
0410                 buf[i] -= 3;
0411                 count++;
0412             }
0413             break;
0414         default:
0415             count++;
0416             /* Analog Input (V) = conv_result * step_size / R
0417              * conv_result = decimal value of 10-bit conversion
0418              *       result
0419              * step size = 1.5 / (2 ^ 10 -1)
0420              * R = Prescaler ratio for input channels.
0421              * Result given in mV hence multiplied by 1000.
0422              */
0423             buf[i] = (buf[i] * 3 * 1000 *
0424                  twl4030_divider_ratios[i].denominator)
0425                 / (2 * 1023 *
0426                 twl4030_divider_ratios[i].numerator);
0427         }
0428     }
0429 
0430     return count;
0431 }
0432 
0433 /*
0434  * Disables irq.
0435  * @madc - pointer to twl4030_madc_data struct
0436  * @id - irq number to be disabled
0437  * can take one of TWL4030_MADC_RT, TWL4030_MADC_SW1, TWL4030_MADC_SW2
0438  * corresponding to RT, SW1, SW2 conversion requests.
0439  * Returns error if i2c read/write fails.
0440  */
0441 static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id)
0442 {
0443     u8 val;
0444     int ret;
0445 
0446     ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr);
0447     if (ret) {
0448         dev_err(madc->dev, "unable to read imr register 0x%X\n",
0449             madc->imr);
0450         return ret;
0451     }
0452     val |= (1 << id);
0453     ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr);
0454     if (ret) {
0455         dev_err(madc->dev,
0456             "unable to write imr register 0x%X\n", madc->imr);
0457         return ret;
0458     }
0459 
0460     return 0;
0461 }
0462 
0463 static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
0464 {
0465     struct twl4030_madc_data *madc = _madc;
0466     const struct twl4030_madc_conversion_method *method;
0467     u8 isr_val, imr_val;
0468     int i, ret;
0469     struct twl4030_madc_request *r;
0470 
0471     mutex_lock(&madc->lock);
0472     ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &isr_val, madc->isr);
0473     if (ret) {
0474         dev_err(madc->dev, "unable to read isr register 0x%X\n",
0475             madc->isr);
0476         goto err_i2c;
0477     }
0478     ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr);
0479     if (ret) {
0480         dev_err(madc->dev, "unable to read imr register 0x%X\n",
0481             madc->imr);
0482         goto err_i2c;
0483     }
0484     isr_val &= ~imr_val;
0485     for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
0486         if (!(isr_val & (1 << i)))
0487             continue;
0488         ret = twl4030_madc_disable_irq(madc, i);
0489         if (ret < 0)
0490             dev_dbg(madc->dev, "Disable interrupt failed %d\n", i);
0491         madc->requests[i].result_pending = true;
0492     }
0493     for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
0494         r = &madc->requests[i];
0495         /* No pending results for this method, move to next one */
0496         if (!r->result_pending)
0497             continue;
0498         method = &twl4030_conversion_methods[r->method];
0499         /* Read results */
0500         twl4030_madc_read_channels(madc, method->rbase,
0501                        r->channels, r->rbuf, r->raw);
0502         /* Free request */
0503         r->result_pending = false;
0504         r->active = false;
0505     }
0506     mutex_unlock(&madc->lock);
0507 
0508     return IRQ_HANDLED;
0509 
0510 err_i2c:
0511     /*
0512      * In case of error check whichever request is active
0513      * and service the same.
0514      */
0515     for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
0516         r = &madc->requests[i];
0517         if (!r->active)
0518             continue;
0519         method = &twl4030_conversion_methods[r->method];
0520         /* Read results */
0521         twl4030_madc_read_channels(madc, method->rbase,
0522                        r->channels, r->rbuf, r->raw);
0523         /* Free request */
0524         r->result_pending = false;
0525         r->active = false;
0526     }
0527     mutex_unlock(&madc->lock);
0528 
0529     return IRQ_HANDLED;
0530 }
0531 
0532 /*
0533  * Function which enables the madc conversion
0534  * by writing to the control register.
0535  * @madc - pointer to twl4030_madc_data struct
0536  * @conv_method - can be TWL4030_MADC_RT, TWL4030_MADC_SW2, TWL4030_MADC_SW1
0537  * corresponding to RT SW1 or SW2 conversion methods.
0538  * Returns 0 if succeeds else a negative error value
0539  */
0540 static int twl4030_madc_start_conversion(struct twl4030_madc_data *madc,
0541                      int conv_method)
0542 {
0543     const struct twl4030_madc_conversion_method *method;
0544     int ret = 0;
0545 
0546     if (conv_method != TWL4030_MADC_SW1 && conv_method != TWL4030_MADC_SW2)
0547         return -ENOTSUPP;
0548 
0549     method = &twl4030_conversion_methods[conv_method];
0550     ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, TWL4030_MADC_SW_START,
0551                    method->ctrl);
0552     if (ret) {
0553         dev_err(madc->dev, "unable to write ctrl register 0x%X\n",
0554             method->ctrl);
0555         return ret;
0556     }
0557 
0558     return 0;
0559 }
0560 
0561 /*
0562  * Function that waits for conversion to be ready
0563  * @madc - pointer to twl4030_madc_data struct
0564  * @timeout_ms - timeout value in milliseconds
0565  * @status_reg - ctrl register
0566  * returns 0 if succeeds else a negative error value
0567  */
0568 static int twl4030_madc_wait_conversion_ready(struct twl4030_madc_data *madc,
0569                           unsigned int timeout_ms,
0570                           u8 status_reg)
0571 {
0572     unsigned long timeout;
0573     int ret;
0574 
0575     timeout = jiffies + msecs_to_jiffies(timeout_ms);
0576     do {
0577         u8 reg;
0578 
0579         ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &reg, status_reg);
0580         if (ret) {
0581             dev_err(madc->dev,
0582                 "unable to read status register 0x%X\n",
0583                 status_reg);
0584             return ret;
0585         }
0586         if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW))
0587             return 0;
0588         usleep_range(500, 2000);
0589     } while (!time_after(jiffies, timeout));
0590     dev_err(madc->dev, "conversion timeout!\n");
0591 
0592     return -EAGAIN;
0593 }
0594 
0595 /*
0596  * An exported function which can be called from other kernel drivers.
0597  * @req twl4030_madc_request structure
0598  * req->rbuf will be filled with read values of channels based on the
0599  * channel index. If a particular channel reading fails there will
0600  * be a negative error value in the corresponding array element.
0601  * returns 0 if succeeds else error value
0602  */
0603 static int twl4030_madc_conversion(struct twl4030_madc_request *req)
0604 {
0605     const struct twl4030_madc_conversion_method *method;
0606     int ret;
0607 
0608     if (!req || !twl4030_madc)
0609         return -EINVAL;
0610 
0611     mutex_lock(&twl4030_madc->lock);
0612     if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) {
0613         ret = -EINVAL;
0614         goto out;
0615     }
0616     /* Do we have a conversion request ongoing */
0617     if (twl4030_madc->requests[req->method].active) {
0618         ret = -EBUSY;
0619         goto out;
0620     }
0621     method = &twl4030_conversion_methods[req->method];
0622     /* Select channels to be converted */
0623     ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, method->sel);
0624     if (ret) {
0625         dev_err(twl4030_madc->dev,
0626             "unable to write sel register 0x%X\n", method->sel);
0627         goto out;
0628     }
0629     /* Select averaging for all channels if do_avg is set */
0630     if (req->do_avg) {
0631         ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels,
0632                        method->avg);
0633         if (ret) {
0634             dev_err(twl4030_madc->dev,
0635                 "unable to write avg register 0x%X\n",
0636                 method->avg);
0637             goto out;
0638         }
0639     }
0640     /* With RT method we should not be here anymore */
0641     if (req->method == TWL4030_MADC_RT) {
0642         ret = -EINVAL;
0643         goto out;
0644     }
0645     ret = twl4030_madc_start_conversion(twl4030_madc, req->method);
0646     if (ret < 0)
0647         goto out;
0648     twl4030_madc->requests[req->method].active = true;
0649     /* Wait until conversion is ready (ctrl register returns EOC) */
0650     ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl);
0651     if (ret) {
0652         twl4030_madc->requests[req->method].active = false;
0653         goto out;
0654     }
0655     ret = twl4030_madc_read_channels(twl4030_madc, method->rbase,
0656                      req->channels, req->rbuf, req->raw);
0657     twl4030_madc->requests[req->method].active = false;
0658 
0659 out:
0660     mutex_unlock(&twl4030_madc->lock);
0661 
0662     return ret;
0663 }
0664 
0665 /**
0666  * twl4030_madc_set_current_generator() - setup bias current
0667  *
0668  * @madc:   pointer to twl4030_madc_data struct
0669  * @chan:   can be one of the two values:
0670  *      0 - Enables bias current for main battery type reading
0671  *      1 - Enables bias current for main battery temperature sensing
0672  * @on:     enable or disable chan.
0673  *
0674  * Function to enable or disable bias current for
0675  * main battery type reading or temperature sensing
0676  */
0677 static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
0678                           int chan, int on)
0679 {
0680     int ret;
0681     int regmask;
0682     u8 regval;
0683 
0684     ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
0685                   &regval, TWL4030_BCI_BCICTL1);
0686     if (ret) {
0687         dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X",
0688             TWL4030_BCI_BCICTL1);
0689         return ret;
0690     }
0691 
0692     regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
0693     if (on)
0694         regval |= regmask;
0695     else
0696         regval &= ~regmask;
0697 
0698     ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
0699                    regval, TWL4030_BCI_BCICTL1);
0700     if (ret) {
0701         dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n",
0702             TWL4030_BCI_BCICTL1);
0703         return ret;
0704     }
0705 
0706     return 0;
0707 }
0708 
0709 /*
0710  * Function that sets MADC software power on bit to enable MADC
0711  * @madc - pointer to twl4030_madc_data struct
0712  * @on - Enable or disable MADC software power on bit.
0713  * returns error if i2c read/write fails else 0
0714  */
0715 static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
0716 {
0717     u8 regval;
0718     int ret;
0719 
0720     ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
0721                   &regval, TWL4030_MADC_CTRL1);
0722     if (ret) {
0723         dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n",
0724             TWL4030_MADC_CTRL1);
0725         return ret;
0726     }
0727     if (on)
0728         regval |= TWL4030_MADC_MADCON;
0729     else
0730         regval &= ~TWL4030_MADC_MADCON;
0731     ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1);
0732     if (ret) {
0733         dev_err(madc->dev, "unable to write madc ctrl1 reg 0x%X\n",
0734             TWL4030_MADC_CTRL1);
0735         return ret;
0736     }
0737 
0738     return 0;
0739 }
0740 
0741 /*
0742  * Initialize MADC and request for threaded irq
0743  */
0744 static int twl4030_madc_probe(struct platform_device *pdev)
0745 {
0746     struct twl4030_madc_data *madc;
0747     struct twl4030_madc_platform_data *pdata = dev_get_platdata(&pdev->dev);
0748     struct device_node *np = pdev->dev.of_node;
0749     int irq, ret;
0750     u8 regval;
0751     struct iio_dev *iio_dev = NULL;
0752 
0753     if (!pdata && !np) {
0754         dev_err(&pdev->dev, "neither platform data nor Device Tree node available\n");
0755         return -EINVAL;
0756     }
0757 
0758     iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*madc));
0759     if (!iio_dev) {
0760         dev_err(&pdev->dev, "failed allocating iio device\n");
0761         return -ENOMEM;
0762     }
0763 
0764     madc = iio_priv(iio_dev);
0765     madc->dev = &pdev->dev;
0766 
0767     iio_dev->name = dev_name(&pdev->dev);
0768     iio_dev->info = &twl4030_madc_iio_info;
0769     iio_dev->modes = INDIO_DIRECT_MODE;
0770     iio_dev->channels = twl4030_madc_iio_channels;
0771     iio_dev->num_channels = ARRAY_SIZE(twl4030_madc_iio_channels);
0772 
0773     /*
0774      * Phoenix provides 2 interrupt lines. The first one is connected to
0775      * the OMAP. The other one can be connected to the other processor such
0776      * as modem. Hence two separate ISR and IMR registers.
0777      */
0778     if (pdata)
0779         madc->use_second_irq = (pdata->irq_line != 1);
0780     else
0781         madc->use_second_irq = of_property_read_bool(np,
0782                        "ti,system-uses-second-madc-irq");
0783 
0784     madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 :
0785                        TWL4030_MADC_IMR1;
0786     madc->isr = madc->use_second_irq ? TWL4030_MADC_ISR2 :
0787                        TWL4030_MADC_ISR1;
0788 
0789     ret = twl4030_madc_set_power(madc, 1);
0790     if (ret < 0)
0791         return ret;
0792     ret = twl4030_madc_set_current_generator(madc, 0, 1);
0793     if (ret < 0)
0794         goto err_current_generator;
0795 
0796     ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
0797                   &regval, TWL4030_BCI_BCICTL1);
0798     if (ret) {
0799         dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n",
0800             TWL4030_BCI_BCICTL1);
0801         goto err_i2c;
0802     }
0803     regval |= TWL4030_BCI_MESBAT;
0804     ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
0805                    regval, TWL4030_BCI_BCICTL1);
0806     if (ret) {
0807         dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n",
0808             TWL4030_BCI_BCICTL1);
0809         goto err_i2c;
0810     }
0811 
0812     /* Check that MADC clock is on */
0813     ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, &regval, TWL4030_REG_GPBR1);
0814     if (ret) {
0815         dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
0816                 TWL4030_REG_GPBR1);
0817         goto err_i2c;
0818     }
0819 
0820     /* If MADC clk is not on, turn it on */
0821     if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
0822         dev_info(&pdev->dev, "clk disabled, enabling\n");
0823         regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
0824         ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
0825                        TWL4030_REG_GPBR1);
0826         if (ret) {
0827             dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
0828                     TWL4030_REG_GPBR1);
0829             goto err_i2c;
0830         }
0831     }
0832 
0833     platform_set_drvdata(pdev, iio_dev);
0834     mutex_init(&madc->lock);
0835 
0836     irq = platform_get_irq(pdev, 0);
0837     ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
0838                    twl4030_madc_threaded_irq_handler,
0839                    IRQF_TRIGGER_RISING | IRQF_ONESHOT,
0840                    "twl4030_madc", madc);
0841     if (ret) {
0842         dev_err(&pdev->dev, "could not request irq\n");
0843         goto err_i2c;
0844     }
0845     twl4030_madc = madc;
0846 
0847     /* Configure MADC[3:6] */
0848     ret = twl_i2c_read_u8(TWL_MODULE_USB, &regval,
0849             TWL4030_USB_CARKIT_ANA_CTRL);
0850     if (ret) {
0851         dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL  0x%X\n",
0852                 TWL4030_USB_CARKIT_ANA_CTRL);
0853         goto err_i2c;
0854     }
0855     regval |= TWL4030_USB_SEL_MADC_MCPC;
0856     ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
0857                  TWL4030_USB_CARKIT_ANA_CTRL);
0858     if (ret) {
0859         dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n",
0860                 TWL4030_USB_CARKIT_ANA_CTRL);
0861         goto err_i2c;
0862     }
0863 
0864     /* Enable 3v1 bias regulator for MADC[3:6] */
0865     madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
0866     if (IS_ERR(madc->usb3v1)) {
0867         ret = -ENODEV;
0868         goto err_i2c;
0869     }
0870 
0871     ret = regulator_enable(madc->usb3v1);
0872     if (ret) {
0873         dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
0874         goto err_i2c;
0875     }
0876 
0877     ret = iio_device_register(iio_dev);
0878     if (ret) {
0879         dev_err(&pdev->dev, "could not register iio device\n");
0880         goto err_usb3v1;
0881     }
0882 
0883     return 0;
0884 
0885 err_usb3v1:
0886     regulator_disable(madc->usb3v1);
0887 err_i2c:
0888     twl4030_madc_set_current_generator(madc, 0, 0);
0889 err_current_generator:
0890     twl4030_madc_set_power(madc, 0);
0891     return ret;
0892 }
0893 
0894 static int twl4030_madc_remove(struct platform_device *pdev)
0895 {
0896     struct iio_dev *iio_dev = platform_get_drvdata(pdev);
0897     struct twl4030_madc_data *madc = iio_priv(iio_dev);
0898 
0899     iio_device_unregister(iio_dev);
0900 
0901     twl4030_madc_set_current_generator(madc, 0, 0);
0902     twl4030_madc_set_power(madc, 0);
0903 
0904     regulator_disable(madc->usb3v1);
0905 
0906     return 0;
0907 }
0908 
0909 #ifdef CONFIG_OF
0910 static const struct of_device_id twl_madc_of_match[] = {
0911     { .compatible = "ti,twl4030-madc", },
0912     { },
0913 };
0914 MODULE_DEVICE_TABLE(of, twl_madc_of_match);
0915 #endif
0916 
0917 static struct platform_driver twl4030_madc_driver = {
0918     .probe = twl4030_madc_probe,
0919     .remove = twl4030_madc_remove,
0920     .driver = {
0921            .name = "twl4030_madc",
0922            .of_match_table = of_match_ptr(twl_madc_of_match),
0923     },
0924 };
0925 
0926 module_platform_driver(twl4030_madc_driver);
0927 
0928 MODULE_DESCRIPTION("TWL4030 ADC driver");
0929 MODULE_LICENSE("GPL");
0930 MODULE_AUTHOR("J Keerthy");
0931 MODULE_ALIAS("platform:twl4030_madc");
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