iio/adc/ti-adc12138.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
0004  *
0005  * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com>
0006  *
0007  * Datasheet: http://www.ti.com/lit/ds/symlink/adc12138.pdf
0008  */
0009
0010 #include <linux/module.h>
0011 #include <linux/interrupt.h>
0012 #include <linux/completion.h>
0013 #include <linux/clk.h>
0014 #include <linux/property.h>
0015 #include <linux/spi/spi.h>
0016 #include <linux/iio/iio.h>
0017 #include <linux/iio/buffer.h>
0018 #include <linux/iio/trigger.h>
0019 #include <linux/iio/triggered_buffer.h>
0020 #include <linux/iio/trigger_consumer.h>
0021 #include <linux/regulator/consumer.h>
0022
0023 #define ADC12138_MODE_AUTO_CAL          0x08
0024 #define ADC12138_MODE_READ_STATUS       0x0c
0025 #define ADC12138_MODE_ACQUISITION_TIME_6    0x0e
0026 #define ADC12138_MODE_ACQUISITION_TIME_10   0x4e
0027 #define ADC12138_MODE_ACQUISITION_TIME_18   0x8e
0028 #define ADC12138_MODE_ACQUISITION_TIME_34   0xce
0029
0030 #define ADC12138_STATUS_CAL         BIT(6)
0031
0032 enum {
0033     adc12130,
0034     adc12132,
0035     adc12138,
0036 };
0037
0038 struct adc12138 {
0039     struct spi_device *spi;
0040     unsigned int id;
0041     /* conversion clock */
0042     struct clk *cclk;
0043     /* positive analog voltage reference */
0044     struct regulator *vref_p;
0045     /* negative analog voltage reference */
0046     struct regulator *vref_n;
0047     struct mutex lock;
0048     struct completion complete;
0049     /* The number of cclk periods for the S/H's acquisition time */
0050     unsigned int acquisition_time;
0051     /*
0052      * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
0053      * Less may be need if not all channels are enabled, as long as
0054      * the 8 byte alignment of the timestamp is maintained.
0055      */
0056     __be16 data[20] __aligned(8);
0057
0058     u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN);
0059     u8 rx_buf[2];
0060 };
0061
0062 #define ADC12138_VOLTAGE_CHANNEL(chan)                  \
0063     {                               \
0064         .type = IIO_VOLTAGE,                    \
0065         .indexed = 1,                       \
0066         .channel = chan,                    \
0067         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),       \
0068         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)    \
0069                     | BIT(IIO_CHAN_INFO_OFFSET),    \
0070         .scan_index = chan,                 \
0071         .scan_type = {                      \
0072             .sign = 's',                    \
0073             .realbits = 13,                 \
0074             .storagebits = 16,              \
0075             .shift = 3,                 \
0076             .endianness = IIO_BE,               \
0077         },                          \
0078     }
0079
0080 #define ADC12138_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si)         \
0081     {                               \
0082         .type = IIO_VOLTAGE,                    \
0083         .indexed = 1,                       \
0084         .channel = (chan1),                 \
0085         .channel2 = (chan2),                    \
0086         .differential = 1,                  \
0087         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),       \
0088         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)    \
0089                     | BIT(IIO_CHAN_INFO_OFFSET),    \
0090         .scan_index = si,                   \
0091         .scan_type = {                      \
0092             .sign = 's',                    \
0093             .realbits = 13,                 \
0094             .storagebits = 16,              \
0095             .shift = 3,                 \
0096             .endianness = IIO_BE,               \
0097         },                          \
0098     }
0099
0100 static const struct iio_chan_spec adc12132_channels[] = {
0101     ADC12138_VOLTAGE_CHANNEL(0),
0102     ADC12138_VOLTAGE_CHANNEL(1),
0103     ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 2),
0104     ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 3),
0105     IIO_CHAN_SOFT_TIMESTAMP(4),
0106 };
0107
0108 static const struct iio_chan_spec adc12138_channels[] = {
0109     ADC12138_VOLTAGE_CHANNEL(0),
0110     ADC12138_VOLTAGE_CHANNEL(1),
0111     ADC12138_VOLTAGE_CHANNEL(2),
0112     ADC12138_VOLTAGE_CHANNEL(3),
0113     ADC12138_VOLTAGE_CHANNEL(4),
0114     ADC12138_VOLTAGE_CHANNEL(5),
0115     ADC12138_VOLTAGE_CHANNEL(6),
0116     ADC12138_VOLTAGE_CHANNEL(7),
0117     ADC12138_VOLTAGE_CHANNEL_DIFF(0, 1, 8),
0118     ADC12138_VOLTAGE_CHANNEL_DIFF(1, 0, 9),
0119     ADC12138_VOLTAGE_CHANNEL_DIFF(2, 3, 10),
0120     ADC12138_VOLTAGE_CHANNEL_DIFF(3, 2, 11),
0121     ADC12138_VOLTAGE_CHANNEL_DIFF(4, 5, 12),
0122     ADC12138_VOLTAGE_CHANNEL_DIFF(5, 4, 13),
0123     ADC12138_VOLTAGE_CHANNEL_DIFF(6, 7, 14),
0124     ADC12138_VOLTAGE_CHANNEL_DIFF(7, 6, 15),
0125     IIO_CHAN_SOFT_TIMESTAMP(16),
0126 };
0127
0128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode,
0129                      void *rx_buf, int len)
0130 {
0131     struct spi_transfer xfer = {
0132         .tx_buf = adc->tx_buf,
0133         .rx_buf = adc->rx_buf,
0134         .len = len,
0135     };
0136     int ret;
0137
0138     /* Skip unused bits for ADC12130 and ADC12132 */
0139     if (adc->id != adc12138)
0140         mode = (mode & 0xc0) | ((mode & 0x0f) << 2);
0141
0142     adc->tx_buf[0] = mode;
0143
0144     ret = spi_sync_transfer(adc->spi, &xfer, 1);
0145     if (ret)
0146         return ret;
0147
0148     memcpy(rx_buf, adc->rx_buf, len);
0149
0150     return 0;
0151 }
0152
0153 static int adc12138_read_status(struct adc12138 *adc)
0154 {
0155     u8 rx_buf[2];
0156     int ret;
0157
0158     ret = adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
0159                     rx_buf, 2);
0160     if (ret)
0161         return ret;
0162
0163     return (rx_buf[0] << 1) | (rx_buf[1] >> 7);
0164 }
0165
0166 static int __adc12138_start_conv(struct adc12138 *adc,
0167                  struct iio_chan_spec const *channel,
0168                  void *data, int len)
0169
0170 {
0171     static const u8 ch_to_mux[] = { 0, 4, 1, 5, 2, 6, 3, 7 };
0172     u8 mode = (ch_to_mux[channel->channel] << 4) |
0173           (channel->differential ? 0 : 0x80);
0174
0175     return adc12138_mode_programming(adc, mode, data, len);
0176 }
0177
0178 static int adc12138_start_conv(struct adc12138 *adc,
0179                    struct iio_chan_spec const *channel)
0180 {
0181     u8 trash;
0182
0183     return __adc12138_start_conv(adc, channel, &trash, 1);
0184 }
0185
0186 static int adc12138_start_and_read_conv(struct adc12138 *adc,
0187                     struct iio_chan_spec const *channel,
0188                     __be16 *data)
0189 {
0190     return __adc12138_start_conv(adc, channel, data, 2);
0191 }
0192
0193 static int adc12138_read_conv_data(struct adc12138 *adc, __be16 *value)
0194 {
0195     /* Issue a read status instruction and read previous conversion data */
0196     return adc12138_mode_programming(adc, ADC12138_MODE_READ_STATUS,
0197                      value, sizeof(*value));
0198 }
0199
0200 static int adc12138_wait_eoc(struct adc12138 *adc, unsigned long timeout)
0201 {
0202     if (!wait_for_completion_timeout(&adc->complete, timeout))
0203         return -ETIMEDOUT;
0204
0205     return 0;
0206 }
0207
0208 static int adc12138_adc_conversion(struct adc12138 *adc,
0209                    struct iio_chan_spec const *channel,
0210                    __be16 *value)
0211 {
0212     int ret;
0213
0214     reinit_completion(&adc->complete);
0215
0216     ret = adc12138_start_conv(adc, channel);
0217     if (ret)
0218         return ret;
0219
0220     ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
0221     if (ret)
0222         return ret;
0223
0224     return adc12138_read_conv_data(adc, value);
0225 }
0226
0227 static int adc12138_read_raw(struct iio_dev *iio,
0228                  struct iio_chan_spec const *channel, int *value,
0229                  int *shift, long mask)
0230 {
0231     struct adc12138 *adc = iio_priv(iio);
0232     int ret;
0233     __be16 data;
0234
0235     switch (mask) {
0236     case IIO_CHAN_INFO_RAW:
0237         mutex_lock(&adc->lock);
0238         ret = adc12138_adc_conversion(adc, channel, &data);
0239         mutex_unlock(&adc->lock);
0240         if (ret)
0241             return ret;
0242
0243         *value = sign_extend32(be16_to_cpu(data) >> channel->scan_type.shift,
0244                        channel->scan_type.realbits - 1);
0245
0246         return IIO_VAL_INT;
0247     case IIO_CHAN_INFO_SCALE:
0248         ret = regulator_get_voltage(adc->vref_p);
0249         if (ret < 0)
0250             return ret;
0251         *value = ret;
0252
0253         if (!IS_ERR(adc->vref_n)) {
0254             ret = regulator_get_voltage(adc->vref_n);
0255             if (ret < 0)
0256                 return ret;
0257             *value -= ret;
0258         }
0259
0260         /* convert regulator output voltage to mV */
0261         *value /= 1000;
0262         *shift = channel->scan_type.realbits - 1;
0263
0264         return IIO_VAL_FRACTIONAL_LOG2;
0265     case IIO_CHAN_INFO_OFFSET:
0266         if (!IS_ERR(adc->vref_n)) {
0267             *value = regulator_get_voltage(adc->vref_n);
0268             if (*value < 0)
0269                 return *value;
0270         } else {
0271             *value = 0;
0272         }
0273
0274         /* convert regulator output voltage to mV */
0275         *value /= 1000;
0276
0277         return IIO_VAL_INT;
0278     }
0279
0280     return -EINVAL;
0281 }
0282
0283 static const struct iio_info adc12138_info = {
0284     .read_raw = adc12138_read_raw,
0285 };
0286
0287 static int adc12138_init(struct adc12138 *adc)
0288 {
0289     int ret;
0290     int status;
0291     u8 mode;
0292     u8 trash;
0293
0294     reinit_completion(&adc->complete);
0295
0296     ret = adc12138_mode_programming(adc, ADC12138_MODE_AUTO_CAL, &trash, 1);
0297     if (ret)
0298         return ret;
0299
0300     /* data output at this time has no significance */
0301     status = adc12138_read_status(adc);
0302     if (status < 0)
0303         return status;
0304
0305     adc12138_wait_eoc(adc, msecs_to_jiffies(100));
0306
0307     status = adc12138_read_status(adc);
0308     if (status & ADC12138_STATUS_CAL) {
0309         dev_warn(&adc->spi->dev,
0310             "Auto Cal sequence is still in progress: %#x\n",
0311             status);
0312         return -EIO;
0313     }
0314
0315     switch (adc->acquisition_time) {
0316     case 6:
0317         mode = ADC12138_MODE_ACQUISITION_TIME_6;
0318         break;
0319     case 10:
0320         mode = ADC12138_MODE_ACQUISITION_TIME_10;
0321         break;
0322     case 18:
0323         mode = ADC12138_MODE_ACQUISITION_TIME_18;
0324         break;
0325     case 34:
0326         mode = ADC12138_MODE_ACQUISITION_TIME_34;
0327         break;
0328     default:
0329         return -EINVAL;
0330     }
0331
0332     return adc12138_mode_programming(adc, mode, &trash, 1);
0333 }
0334
0335 static irqreturn_t adc12138_trigger_handler(int irq, void *p)
0336 {
0337     struct iio_poll_func *pf = p;
0338     struct iio_dev *indio_dev = pf->indio_dev;
0339     struct adc12138 *adc = iio_priv(indio_dev);
0340     __be16 trash;
0341     int ret;
0342     int scan_index;
0343     int i = 0;
0344
0345     mutex_lock(&adc->lock);
0346
0347     for_each_set_bit(scan_index, indio_dev->active_scan_mask,
0348              indio_dev->masklength) {
0349         const struct iio_chan_spec *scan_chan =
0350                 &indio_dev->channels[scan_index];
0351
0352         reinit_completion(&adc->complete);
0353
0354         ret = adc12138_start_and_read_conv(adc, scan_chan,
0355                     i ? &adc->data[i - 1] : &trash);
0356         if (ret) {
0357             dev_warn(&adc->spi->dev,
0358                  "failed to start conversion\n");
0359             goto out;
0360         }
0361
0362         ret = adc12138_wait_eoc(adc, msecs_to_jiffies(100));
0363         if (ret) {
0364             dev_warn(&adc->spi->dev, "wait eoc timeout\n");
0365             goto out;
0366         }
0367
0368         i++;
0369     }
0370
0371     if (i) {
0372         ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
0373         if (ret) {
0374             dev_warn(&adc->spi->dev,
0375                  "failed to get conversion data\n");
0376             goto out;
0377         }
0378     }
0379
0380     iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
0381                        iio_get_time_ns(indio_dev));
0382 out:
0383     mutex_unlock(&adc->lock);
0384
0385     iio_trigger_notify_done(indio_dev->trig);
0386
0387     return IRQ_HANDLED;
0388 }
0389
0390 static irqreturn_t adc12138_eoc_handler(int irq, void *p)
0391 {
0392     struct iio_dev *indio_dev = p;
0393     struct adc12138 *adc = iio_priv(indio_dev);
0394
0395     complete(&adc->complete);
0396
0397     return IRQ_HANDLED;
0398 }
0399
0400 static int adc12138_probe(struct spi_device *spi)
0401 {
0402     struct iio_dev *indio_dev;
0403     struct adc12138 *adc;
0404     int ret;
0405
0406     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
0407     if (!indio_dev)
0408         return -ENOMEM;
0409
0410     adc = iio_priv(indio_dev);
0411     adc->spi = spi;
0412     adc->id = spi_get_device_id(spi)->driver_data;
0413     mutex_init(&adc->lock);
0414     init_completion(&adc->complete);
0415
0416     indio_dev->name = spi_get_device_id(spi)->name;
0417     indio_dev->info = &adc12138_info;
0418     indio_dev->modes = INDIO_DIRECT_MODE;
0419
0420     switch (adc->id) {
0421     case adc12130:
0422     case adc12132:
0423         indio_dev->channels = adc12132_channels;
0424         indio_dev->num_channels = ARRAY_SIZE(adc12132_channels);
0425         break;
0426     case adc12138:
0427         indio_dev->channels = adc12138_channels;
0428         indio_dev->num_channels = ARRAY_SIZE(adc12138_channels);
0429         break;
0430     default:
0431         return -EINVAL;
0432     }
0433
0434     ret = device_property_read_u32(&spi->dev, "ti,acquisition-time",
0435                        &adc->acquisition_time);
0436     if (ret)
0437         adc->acquisition_time = 10;
0438
0439     adc->cclk = devm_clk_get(&spi->dev, NULL);
0440     if (IS_ERR(adc->cclk))
0441         return PTR_ERR(adc->cclk);
0442
0443     adc->vref_p = devm_regulator_get(&spi->dev, "vref-p");
0444     if (IS_ERR(adc->vref_p))
0445         return PTR_ERR(adc->vref_p);
0446
0447     adc->vref_n = devm_regulator_get_optional(&spi->dev, "vref-n");
0448     if (IS_ERR(adc->vref_n)) {
0449         /*
0450          * Assume vref_n is 0V if an optional regulator is not
0451          * specified, otherwise return the error code.
0452          */
0453         ret = PTR_ERR(adc->vref_n);
0454         if (ret != -ENODEV)
0455             return ret;
0456     }
0457
0458     ret = devm_request_irq(&spi->dev, spi->irq, adc12138_eoc_handler,
0459                    IRQF_TRIGGER_RISING, indio_dev->name, indio_dev);
0460     if (ret)
0461         return ret;
0462
0463     ret = clk_prepare_enable(adc->cclk);
0464     if (ret)
0465         return ret;
0466
0467     ret = regulator_enable(adc->vref_p);
0468     if (ret)
0469         goto err_clk_disable;
0470
0471     if (!IS_ERR(adc->vref_n)) {
0472         ret = regulator_enable(adc->vref_n);
0473         if (ret)
0474             goto err_vref_p_disable;
0475     }
0476
0477     ret = adc12138_init(adc);
0478     if (ret)
0479         goto err_vref_n_disable;
0480
0481     spi_set_drvdata(spi, indio_dev);
0482
0483     ret = iio_triggered_buffer_setup(indio_dev, NULL,
0484                      adc12138_trigger_handler, NULL);
0485     if (ret)
0486         goto err_vref_n_disable;
0487
0488     ret = iio_device_register(indio_dev);
0489     if (ret)
0490         goto err_buffer_cleanup;
0491
0492     return 0;
0493 err_buffer_cleanup:
0494     iio_triggered_buffer_cleanup(indio_dev);
0495 err_vref_n_disable:
0496     if (!IS_ERR(adc->vref_n))
0497         regulator_disable(adc->vref_n);
0498 err_vref_p_disable:
0499     regulator_disable(adc->vref_p);
0500 err_clk_disable:
0501     clk_disable_unprepare(adc->cclk);
0502
0503     return ret;
0504 }
0505
0506 static void adc12138_remove(struct spi_device *spi)
0507 {
0508     struct iio_dev *indio_dev = spi_get_drvdata(spi);
0509     struct adc12138 *adc = iio_priv(indio_dev);
0510
0511     iio_device_unregister(indio_dev);
0512     iio_triggered_buffer_cleanup(indio_dev);
0513     if (!IS_ERR(adc->vref_n))
0514         regulator_disable(adc->vref_n);
0515     regulator_disable(adc->vref_p);
0516     clk_disable_unprepare(adc->cclk);
0517 }
0518
0519 static const struct of_device_id adc12138_dt_ids[] = {
0520     { .compatible = "ti,adc12130", },
0521     { .compatible = "ti,adc12132", },
0522     { .compatible = "ti,adc12138", },
0523     {}
0524 };
0525 MODULE_DEVICE_TABLE(of, adc12138_dt_ids);
0526
0527 static const struct spi_device_id adc12138_id[] = {
0528     { "adc12130", adc12130 },
0529     { "adc12132", adc12132 },
0530     { "adc12138", adc12138 },
0531     {}
0532 };
0533 MODULE_DEVICE_TABLE(spi, adc12138_id);
0534
0535 static struct spi_driver adc12138_driver = {
0536     .driver = {
0537         .name = "adc12138",
0538         .of_match_table = adc12138_dt_ids,
0539     },
0540     .probe = adc12138_probe,
0541     .remove = adc12138_remove,
0542     .id_table = adc12138_id,
0543 };
0544 module_spi_driver(adc12138_driver);
0545
0546 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
0547 MODULE_DESCRIPTION("ADC12130/ADC12132/ADC12138 driver");
0548 MODULE_LICENSE("GPL v2");