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0015 #include <linux/acpi.h>
0016 #include <linux/iio/iio.h>
0017 #include <linux/iio/buffer.h>
0018 #include <linux/iio/types.h>
0019 #include <linux/iio/triggered_buffer.h>
0020 #include <linux/iio/trigger_consumer.h>
0021 #include <linux/interrupt.h>
0022 #include <linux/module.h>
0023 #include <linux/mod_devicetable.h>
0024 #include <linux/property.h>
0025 #include <linux/regulator/consumer.h>
0026 #include <linux/spi/spi.h>
0027
0028
0029
0030
0031
0032
0033 #define ADC108S102_VA_MV_ACPI_DEFAULT 5000
0034
0035
0036
0037
0038
0039
0040
0041 #define ADC108S102_BITS 12
0042 #define ADC108S102_MAX_CHANNELS 8
0043
0044
0045
0046
0047
0048
0049
0050 #define ADC108S102_CMD(ch) ((u16)(ch) << 11)
0051
0052
0053
0054
0055
0056
0057 #define ADC108S102_RES_DATA(res) ((u16)res & GENMASK(11, 0))
0058
0059 struct adc108s102_state {
0060 struct spi_device *spi;
0061 struct regulator *reg;
0062 u32 va_millivolt;
0063
0064 struct spi_transfer ring_xfer;
0065
0066 struct spi_transfer scan_single_xfer;
0067
0068 struct spi_message ring_msg;
0069
0070 struct spi_message scan_single_msg;
0071
0072
0073
0074
0075
0076
0077
0078
0079
0080 __be16 rx_buf[9] __aligned(IIO_DMA_MINALIGN);
0081 __be16 tx_buf[9] __aligned(IIO_DMA_MINALIGN);
0082 };
0083
0084 #define ADC108S102_V_CHAN(index) \
0085 { \
0086 .type = IIO_VOLTAGE, \
0087 .indexed = 1, \
0088 .channel = index, \
0089 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0090 BIT(IIO_CHAN_INFO_SCALE), \
0091 .address = index, \
0092 .scan_index = index, \
0093 .scan_type = { \
0094 .sign = 'u', \
0095 .realbits = ADC108S102_BITS, \
0096 .storagebits = 16, \
0097 .endianness = IIO_BE, \
0098 }, \
0099 }
0100
0101 static const struct iio_chan_spec adc108s102_channels[] = {
0102 ADC108S102_V_CHAN(0),
0103 ADC108S102_V_CHAN(1),
0104 ADC108S102_V_CHAN(2),
0105 ADC108S102_V_CHAN(3),
0106 ADC108S102_V_CHAN(4),
0107 ADC108S102_V_CHAN(5),
0108 ADC108S102_V_CHAN(6),
0109 ADC108S102_V_CHAN(7),
0110 IIO_CHAN_SOFT_TIMESTAMP(8),
0111 };
0112
0113 static int adc108s102_update_scan_mode(struct iio_dev *indio_dev,
0114 unsigned long const *active_scan_mask)
0115 {
0116 struct adc108s102_state *st = iio_priv(indio_dev);
0117 unsigned int bit, cmds;
0118
0119
0120
0121
0122
0123 cmds = 0;
0124 for_each_set_bit(bit, active_scan_mask, ADC108S102_MAX_CHANNELS)
0125 st->tx_buf[cmds++] = cpu_to_be16(ADC108S102_CMD(bit));
0126
0127
0128 st->tx_buf[cmds++] = 0x00;
0129
0130
0131 st->ring_xfer.tx_buf = &st->tx_buf[0];
0132 st->ring_xfer.rx_buf = &st->rx_buf[0];
0133 st->ring_xfer.len = cmds * sizeof(st->tx_buf[0]);
0134
0135 spi_message_init_with_transfers(&st->ring_msg, &st->ring_xfer, 1);
0136
0137 return 0;
0138 }
0139
0140 static irqreturn_t adc108s102_trigger_handler(int irq, void *p)
0141 {
0142 struct iio_poll_func *pf = p;
0143 struct iio_dev *indio_dev = pf->indio_dev;
0144 struct adc108s102_state *st = iio_priv(indio_dev);
0145 int ret;
0146
0147 ret = spi_sync(st->spi, &st->ring_msg);
0148 if (ret < 0)
0149 goto out_notify;
0150
0151
0152 iio_push_to_buffers_with_ts_unaligned(indio_dev,
0153 &st->rx_buf[1],
0154 st->ring_xfer.len - sizeof(st->rx_buf[1]),
0155 iio_get_time_ns(indio_dev));
0156
0157 out_notify:
0158 iio_trigger_notify_done(indio_dev->trig);
0159
0160 return IRQ_HANDLED;
0161 }
0162
0163 static int adc108s102_scan_direct(struct adc108s102_state *st, unsigned int ch)
0164 {
0165 int ret;
0166
0167 st->tx_buf[0] = cpu_to_be16(ADC108S102_CMD(ch));
0168 ret = spi_sync(st->spi, &st->scan_single_msg);
0169 if (ret)
0170 return ret;
0171
0172
0173 return be16_to_cpu(st->rx_buf[1]);
0174 }
0175
0176 static int adc108s102_read_raw(struct iio_dev *indio_dev,
0177 struct iio_chan_spec const *chan,
0178 int *val, int *val2, long m)
0179 {
0180 struct adc108s102_state *st = iio_priv(indio_dev);
0181 int ret;
0182
0183 switch (m) {
0184 case IIO_CHAN_INFO_RAW:
0185 ret = iio_device_claim_direct_mode(indio_dev);
0186 if (ret)
0187 return ret;
0188
0189 ret = adc108s102_scan_direct(st, chan->address);
0190
0191 iio_device_release_direct_mode(indio_dev);
0192
0193 if (ret < 0)
0194 return ret;
0195
0196 *val = ADC108S102_RES_DATA(ret);
0197
0198 return IIO_VAL_INT;
0199 case IIO_CHAN_INFO_SCALE:
0200 if (chan->type != IIO_VOLTAGE)
0201 break;
0202
0203 *val = st->va_millivolt;
0204 *val2 = chan->scan_type.realbits;
0205
0206 return IIO_VAL_FRACTIONAL_LOG2;
0207 default:
0208 break;
0209 }
0210
0211 return -EINVAL;
0212 }
0213
0214 static const struct iio_info adc108s102_info = {
0215 .read_raw = &adc108s102_read_raw,
0216 .update_scan_mode = &adc108s102_update_scan_mode,
0217 };
0218
0219 static void adc108s102_reg_disable(void *reg)
0220 {
0221 regulator_disable(reg);
0222 }
0223
0224 static int adc108s102_probe(struct spi_device *spi)
0225 {
0226 struct adc108s102_state *st;
0227 struct iio_dev *indio_dev;
0228 int ret;
0229
0230 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0231 if (!indio_dev)
0232 return -ENOMEM;
0233
0234 st = iio_priv(indio_dev);
0235
0236 if (ACPI_COMPANION(&spi->dev)) {
0237 st->va_millivolt = ADC108S102_VA_MV_ACPI_DEFAULT;
0238 } else {
0239 st->reg = devm_regulator_get(&spi->dev, "vref");
0240 if (IS_ERR(st->reg))
0241 return PTR_ERR(st->reg);
0242
0243 ret = regulator_enable(st->reg);
0244 if (ret < 0) {
0245 dev_err(&spi->dev, "Cannot enable vref regulator\n");
0246 return ret;
0247 }
0248 ret = devm_add_action_or_reset(&spi->dev, adc108s102_reg_disable,
0249 st->reg);
0250 if (ret)
0251 return ret;
0252
0253 ret = regulator_get_voltage(st->reg);
0254 if (ret < 0) {
0255 dev_err(&spi->dev, "vref get voltage failed\n");
0256 return ret;
0257 }
0258
0259 st->va_millivolt = ret / 1000;
0260 }
0261
0262 st->spi = spi;
0263
0264 indio_dev->name = spi->modalias;
0265 indio_dev->modes = INDIO_DIRECT_MODE;
0266 indio_dev->channels = adc108s102_channels;
0267 indio_dev->num_channels = ARRAY_SIZE(adc108s102_channels);
0268 indio_dev->info = &adc108s102_info;
0269
0270
0271 st->scan_single_xfer.tx_buf = st->tx_buf;
0272 st->scan_single_xfer.rx_buf = st->rx_buf;
0273 st->scan_single_xfer.len = 2 * sizeof(st->tx_buf[0]);
0274
0275 spi_message_init_with_transfers(&st->scan_single_msg,
0276 &st->scan_single_xfer, 1);
0277
0278 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
0279 &adc108s102_trigger_handler,
0280 NULL);
0281 if (ret)
0282 return ret;
0283
0284 ret = devm_iio_device_register(&spi->dev, indio_dev);
0285 if (ret)
0286 dev_err(&spi->dev, "Failed to register IIO device\n");
0287 return ret;
0288 }
0289
0290 static const struct of_device_id adc108s102_of_match[] = {
0291 { .compatible = "ti,adc108s102" },
0292 { }
0293 };
0294 MODULE_DEVICE_TABLE(of, adc108s102_of_match);
0295
0296 #ifdef CONFIG_ACPI
0297 static const struct acpi_device_id adc108s102_acpi_ids[] = {
0298 { "INT3495", 0 },
0299 { }
0300 };
0301 MODULE_DEVICE_TABLE(acpi, adc108s102_acpi_ids);
0302 #endif
0303
0304 static const struct spi_device_id adc108s102_id[] = {
0305 { "adc108s102", 0 },
0306 { }
0307 };
0308 MODULE_DEVICE_TABLE(spi, adc108s102_id);
0309
0310 static struct spi_driver adc108s102_driver = {
0311 .driver = {
0312 .name = "adc108s102",
0313 .of_match_table = adc108s102_of_match,
0314 .acpi_match_table = ACPI_PTR(adc108s102_acpi_ids),
0315 },
0316 .probe = adc108s102_probe,
0317 .id_table = adc108s102_id,
0318 };
0319 module_spi_driver(adc108s102_driver);
0320
0321 MODULE_AUTHOR("Bogdan Pricop <bogdan.pricop@emutex.com>");
0322 MODULE_DESCRIPTION("Texas Instruments ADC108S102 and ADC128S102 driver");
0323 MODULE_LICENSE("GPL v2");