Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * TI ADC081C/ADC101C/ADC121C 8/10/12-bit ADC driver
0004  *
0005  * Copyright (C) 2012 Avionic Design GmbH
0006  * Copyright (C) 2016 Intel
0007  *
0008  * Datasheets:
0009  *  https://www.ti.com/lit/ds/symlink/adc081c021.pdf
0010  *  https://www.ti.com/lit/ds/symlink/adc101c021.pdf
0011  *  https://www.ti.com/lit/ds/symlink/adc121c021.pdf
0012  *
0013  * The devices have a very similar interface and differ mostly in the number of
0014  * bits handled. For the 8-bit and 10-bit models the least-significant 4 or 2
0015  * bits of value registers are reserved.
0016  */
0017 
0018 #include <linux/err.h>
0019 #include <linux/i2c.h>
0020 #include <linux/module.h>
0021 #include <linux/mod_devicetable.h>
0022 #include <linux/property.h>
0023 
0024 #include <linux/iio/iio.h>
0025 #include <linux/iio/buffer.h>
0026 #include <linux/iio/trigger_consumer.h>
0027 #include <linux/iio/triggered_buffer.h>
0028 #include <linux/regulator/consumer.h>
0029 
0030 struct adc081c {
0031     struct i2c_client *i2c;
0032     struct regulator *ref;
0033 
0034     /* 8, 10 or 12 */
0035     int bits;
0036 
0037     /* Ensure natural alignment of buffer elements */
0038     struct {
0039         u16 channel;
0040         s64 ts __aligned(8);
0041     } scan;
0042 };
0043 
0044 #define REG_CONV_RES 0x00
0045 
0046 static int adc081c_read_raw(struct iio_dev *iio,
0047                 struct iio_chan_spec const *channel, int *value,
0048                 int *shift, long mask)
0049 {
0050     struct adc081c *adc = iio_priv(iio);
0051     int err;
0052 
0053     switch (mask) {
0054     case IIO_CHAN_INFO_RAW:
0055         err = i2c_smbus_read_word_swapped(adc->i2c, REG_CONV_RES);
0056         if (err < 0)
0057             return err;
0058 
0059         *value = (err & 0xFFF) >> (12 - adc->bits);
0060         return IIO_VAL_INT;
0061 
0062     case IIO_CHAN_INFO_SCALE:
0063         err = regulator_get_voltage(adc->ref);
0064         if (err < 0)
0065             return err;
0066 
0067         *value = err / 1000;
0068         *shift = adc->bits;
0069 
0070         return IIO_VAL_FRACTIONAL_LOG2;
0071 
0072     default:
0073         break;
0074     }
0075 
0076     return -EINVAL;
0077 }
0078 
0079 #define ADCxx1C_CHAN(_bits) {                   \
0080     .type = IIO_VOLTAGE,                    \
0081     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
0082     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),       \
0083     .scan_type = {                      \
0084         .sign = 'u',                    \
0085         .realbits = (_bits),                \
0086         .storagebits = 16,              \
0087         .shift = 12 - (_bits),              \
0088         .endianness = IIO_CPU,              \
0089     },                          \
0090 }
0091 
0092 #define DEFINE_ADCxx1C_CHANNELS(_name, _bits)               \
0093     static const struct iio_chan_spec _name ## _channels[] = {  \
0094         ADCxx1C_CHAN((_bits)),                  \
0095         IIO_CHAN_SOFT_TIMESTAMP(1),             \
0096     };                              \
0097 
0098 #define ADC081C_NUM_CHANNELS 2
0099 
0100 struct adcxx1c_model {
0101     const struct iio_chan_spec* channels;
0102     int bits;
0103 };
0104 
0105 #define ADCxx1C_MODEL(_name, _bits)                 \
0106     {                               \
0107         .channels = _name ## _channels,             \
0108         .bits = (_bits),                    \
0109     }
0110 
0111 DEFINE_ADCxx1C_CHANNELS(adc081c,  8);
0112 DEFINE_ADCxx1C_CHANNELS(adc101c, 10);
0113 DEFINE_ADCxx1C_CHANNELS(adc121c, 12);
0114 
0115 /* Model ids are indexes in _models array */
0116 enum adcxx1c_model_id {
0117     ADC081C = 0,
0118     ADC101C = 1,
0119     ADC121C = 2,
0120 };
0121 
0122 static struct adcxx1c_model adcxx1c_models[] = {
0123     ADCxx1C_MODEL(adc081c,  8),
0124     ADCxx1C_MODEL(adc101c, 10),
0125     ADCxx1C_MODEL(adc121c, 12),
0126 };
0127 
0128 static const struct iio_info adc081c_info = {
0129     .read_raw = adc081c_read_raw,
0130 };
0131 
0132 static irqreturn_t adc081c_trigger_handler(int irq, void *p)
0133 {
0134     struct iio_poll_func *pf = p;
0135     struct iio_dev *indio_dev = pf->indio_dev;
0136     struct adc081c *data = iio_priv(indio_dev);
0137     int ret;
0138 
0139     ret = i2c_smbus_read_word_swapped(data->i2c, REG_CONV_RES);
0140     if (ret < 0)
0141         goto out;
0142     data->scan.channel = ret;
0143     iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
0144                        iio_get_time_ns(indio_dev));
0145 out:
0146     iio_trigger_notify_done(indio_dev->trig);
0147     return IRQ_HANDLED;
0148 }
0149 
0150 static void adc081c_reg_disable(void *reg)
0151 {
0152     regulator_disable(reg);
0153 }
0154 
0155 static int adc081c_probe(struct i2c_client *client,
0156              const struct i2c_device_id *id)
0157 {
0158     struct iio_dev *iio;
0159     struct adc081c *adc;
0160     const struct adcxx1c_model *model;
0161     int err;
0162 
0163     if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
0164         return -EOPNOTSUPP;
0165 
0166     if (dev_fwnode(&client->dev))
0167         model = device_get_match_data(&client->dev);
0168     else
0169         model = &adcxx1c_models[id->driver_data];
0170 
0171     iio = devm_iio_device_alloc(&client->dev, sizeof(*adc));
0172     if (!iio)
0173         return -ENOMEM;
0174 
0175     adc = iio_priv(iio);
0176     adc->i2c = client;
0177     adc->bits = model->bits;
0178 
0179     adc->ref = devm_regulator_get(&client->dev, "vref");
0180     if (IS_ERR(adc->ref))
0181         return PTR_ERR(adc->ref);
0182 
0183     err = regulator_enable(adc->ref);
0184     if (err < 0)
0185         return err;
0186 
0187     err = devm_add_action_or_reset(&client->dev, adc081c_reg_disable,
0188                        adc->ref);
0189     if (err)
0190         return err;
0191 
0192     iio->name = dev_name(&client->dev);
0193     iio->modes = INDIO_DIRECT_MODE;
0194     iio->info = &adc081c_info;
0195 
0196     iio->channels = model->channels;
0197     iio->num_channels = ADC081C_NUM_CHANNELS;
0198 
0199     err = devm_iio_triggered_buffer_setup(&client->dev, iio, NULL,
0200                           adc081c_trigger_handler, NULL);
0201     if (err < 0) {
0202         dev_err(&client->dev, "iio triggered buffer setup failed\n");
0203         return err;
0204     }
0205 
0206     return devm_iio_device_register(&client->dev, iio);
0207 }
0208 
0209 static const struct i2c_device_id adc081c_id[] = {
0210     { "adc081c", ADC081C },
0211     { "adc101c", ADC101C },
0212     { "adc121c", ADC121C },
0213     { }
0214 };
0215 MODULE_DEVICE_TABLE(i2c, adc081c_id);
0216 
0217 static const struct acpi_device_id adc081c_acpi_match[] = {
0218     /* Used on some AAEON boards */
0219     { "ADC081C", (kernel_ulong_t)&adcxx1c_models[ADC081C] },
0220     { }
0221 };
0222 MODULE_DEVICE_TABLE(acpi, adc081c_acpi_match);
0223 
0224 static const struct of_device_id adc081c_of_match[] = {
0225     { .compatible = "ti,adc081c", .data = &adcxx1c_models[ADC081C] },
0226     { .compatible = "ti,adc101c", .data = &adcxx1c_models[ADC101C] },
0227     { .compatible = "ti,adc121c", .data = &adcxx1c_models[ADC121C] },
0228     { }
0229 };
0230 MODULE_DEVICE_TABLE(of, adc081c_of_match);
0231 
0232 static struct i2c_driver adc081c_driver = {
0233     .driver = {
0234         .name = "adc081c",
0235         .of_match_table = adc081c_of_match,
0236         .acpi_match_table = adc081c_acpi_match,
0237     },
0238     .probe = adc081c_probe,
0239     .id_table = adc081c_id,
0240 };
0241 module_i2c_driver(adc081c_driver);
0242 
0243 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
0244 MODULE_DESCRIPTION("Texas Instruments ADC081C/ADC101C/ADC121C driver");
0245 MODULE_LICENSE("GPL v2");