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0001 // SPDX-License-Identifier: GPL-2.0
0002 /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
0003  *
0004  * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
0005  *
0006  * The Allwinner SoCs all have an ADC that can also act as a touchscreen
0007  * controller and a thermal sensor.
0008  * The thermal sensor works only when the ADC acts as a touchscreen controller
0009  * and is configured to throw an interrupt every fixed periods of time (let say
0010  * every X seconds).
0011  * One would be tempted to disable the IP on the hardware side rather than
0012  * disabling interrupts to save some power but that resets the internal clock of
0013  * the IP, resulting in having to wait X seconds every time we want to read the
0014  * value of the thermal sensor.
0015  * This is also the reason of using autosuspend in pm_runtime. If there was no
0016  * autosuspend, the thermal sensor would need X seconds after every
0017  * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
0018  * thermal sensor to be requested again in a certain time span before it gets
0019  * shutdown for not being used.
0020  */
0021 
0022 #include <linux/completion.h>
0023 #include <linux/interrupt.h>
0024 #include <linux/io.h>
0025 #include <linux/module.h>
0026 #include <linux/of.h>
0027 #include <linux/of_device.h>
0028 #include <linux/platform_device.h>
0029 #include <linux/pm_runtime.h>
0030 #include <linux/regmap.h>
0031 #include <linux/thermal.h>
0032 #include <linux/delay.h>
0033 
0034 #include <linux/iio/iio.h>
0035 #include <linux/iio/driver.h>
0036 #include <linux/iio/machine.h>
0037 #include <linux/mfd/sun4i-gpadc.h>
0038 
0039 static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
0040 {
0041     return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
0042 }
0043 
0044 static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
0045 {
0046     return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
0047 }
0048 
0049 struct gpadc_data {
0050     int     temp_offset;
0051     int     temp_scale;
0052     unsigned int    tp_mode_en;
0053     unsigned int    tp_adc_select;
0054     unsigned int    (*adc_chan_select)(unsigned int chan);
0055     unsigned int    adc_chan_mask;
0056 };
0057 
0058 static const struct gpadc_data sun4i_gpadc_data = {
0059     .temp_offset = -1932,
0060     .temp_scale = 133,
0061     .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
0062     .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
0063     .adc_chan_select = &sun4i_gpadc_chan_select,
0064     .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
0065 };
0066 
0067 static const struct gpadc_data sun5i_gpadc_data = {
0068     .temp_offset = -1447,
0069     .temp_scale = 100,
0070     .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
0071     .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
0072     .adc_chan_select = &sun4i_gpadc_chan_select,
0073     .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
0074 };
0075 
0076 static const struct gpadc_data sun6i_gpadc_data = {
0077     .temp_offset = -1623,
0078     .temp_scale = 167,
0079     .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
0080     .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
0081     .adc_chan_select = &sun6i_gpadc_chan_select,
0082     .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
0083 };
0084 
0085 static const struct gpadc_data sun8i_a33_gpadc_data = {
0086     .temp_offset = -1662,
0087     .temp_scale = 162,
0088     .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
0089 };
0090 
0091 struct sun4i_gpadc_iio {
0092     struct iio_dev          *indio_dev;
0093     struct completion       completion;
0094     int             temp_data;
0095     u32             adc_data;
0096     struct regmap           *regmap;
0097     unsigned int            fifo_data_irq;
0098     atomic_t            ignore_fifo_data_irq;
0099     unsigned int            temp_data_irq;
0100     atomic_t            ignore_temp_data_irq;
0101     const struct gpadc_data     *data;
0102     bool                no_irq;
0103     /* prevents concurrent reads of temperature and ADC */
0104     struct mutex            mutex;
0105     struct thermal_zone_device  *tzd;
0106     struct device           *sensor_device;
0107 };
0108 
0109 #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) {      \
0110     .type = IIO_VOLTAGE,                    \
0111     .indexed = 1,                       \
0112     .channel = _channel,                    \
0113     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),       \
0114     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
0115     .datasheet_name = _name,                \
0116 }
0117 
0118 static struct iio_map sun4i_gpadc_hwmon_maps[] = {
0119     {
0120         .adc_channel_label = "temp_adc",
0121         .consumer_dev_name = "iio_hwmon.0",
0122     },
0123     { /* sentinel */ },
0124 };
0125 
0126 static const struct iio_chan_spec sun4i_gpadc_channels[] = {
0127     SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
0128     SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
0129     SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
0130     SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
0131     {
0132         .type = IIO_TEMP,
0133         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0134                       BIT(IIO_CHAN_INFO_SCALE) |
0135                       BIT(IIO_CHAN_INFO_OFFSET),
0136         .datasheet_name = "temp_adc",
0137     },
0138 };
0139 
0140 static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
0141     SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
0142     SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
0143     SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
0144     SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
0145 };
0146 
0147 static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
0148     {
0149         .type = IIO_TEMP,
0150         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0151                       BIT(IIO_CHAN_INFO_SCALE) |
0152                       BIT(IIO_CHAN_INFO_OFFSET),
0153         .datasheet_name = "temp_adc",
0154     },
0155 };
0156 
0157 static const struct regmap_config sun4i_gpadc_regmap_config = {
0158     .reg_bits = 32,
0159     .val_bits = 32,
0160     .reg_stride = 4,
0161     .fast_io = true,
0162 };
0163 
0164 static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
0165                  unsigned int irq)
0166 {
0167     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0168     int ret;
0169     u32 reg;
0170 
0171     pm_runtime_get_sync(indio_dev->dev.parent);
0172 
0173     reinit_completion(&info->completion);
0174 
0175     ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
0176                SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
0177                SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
0178     if (ret)
0179         return ret;
0180 
0181     ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
0182     if (ret)
0183         return ret;
0184 
0185     if (irq == info->fifo_data_irq) {
0186         ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
0187                    info->data->tp_mode_en |
0188                    info->data->tp_adc_select |
0189                    info->data->adc_chan_select(channel));
0190         /*
0191          * When the IP changes channel, it needs a bit of time to get
0192          * correct values.
0193          */
0194         if ((reg & info->data->adc_chan_mask) !=
0195              info->data->adc_chan_select(channel))
0196             mdelay(10);
0197 
0198     } else {
0199         /*
0200          * The temperature sensor returns valid data only when the ADC
0201          * operates in touchscreen mode.
0202          */
0203         ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
0204                    info->data->tp_mode_en);
0205     }
0206 
0207     if (ret)
0208         return ret;
0209 
0210     /*
0211      * When the IP changes mode between ADC or touchscreen, it
0212      * needs a bit of time to get correct values.
0213      */
0214     if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
0215         mdelay(100);
0216 
0217     return 0;
0218 }
0219 
0220 static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
0221                 unsigned int irq)
0222 {
0223     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0224     int ret;
0225 
0226     mutex_lock(&info->mutex);
0227 
0228     ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
0229     if (ret)
0230         goto err;
0231 
0232     enable_irq(irq);
0233 
0234     /*
0235      * The temperature sensor throws an interruption periodically (currently
0236      * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
0237      * makes sure an interruption occurs in normal conditions. If it doesn't
0238      * occur, then there is a timeout.
0239      */
0240     if (!wait_for_completion_timeout(&info->completion,
0241                      msecs_to_jiffies(1000))) {
0242         ret = -ETIMEDOUT;
0243         goto err;
0244     }
0245 
0246     if (irq == info->fifo_data_irq)
0247         *val = info->adc_data;
0248     else
0249         *val = info->temp_data;
0250 
0251     ret = 0;
0252     pm_runtime_mark_last_busy(indio_dev->dev.parent);
0253 
0254 err:
0255     pm_runtime_put_autosuspend(indio_dev->dev.parent);
0256     disable_irq(irq);
0257     mutex_unlock(&info->mutex);
0258 
0259     return ret;
0260 }
0261 
0262 static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
0263                 int *val)
0264 {
0265     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0266 
0267     return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
0268 }
0269 
0270 static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
0271 {
0272     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0273 
0274     if (info->no_irq) {
0275         pm_runtime_get_sync(indio_dev->dev.parent);
0276 
0277         regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
0278 
0279         pm_runtime_mark_last_busy(indio_dev->dev.parent);
0280         pm_runtime_put_autosuspend(indio_dev->dev.parent);
0281 
0282         return 0;
0283     }
0284 
0285     return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
0286 }
0287 
0288 static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
0289 {
0290     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0291 
0292     *val = info->data->temp_offset;
0293 
0294     return 0;
0295 }
0296 
0297 static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
0298 {
0299     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0300 
0301     *val = info->data->temp_scale;
0302 
0303     return 0;
0304 }
0305 
0306 static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
0307                 struct iio_chan_spec const *chan, int *val,
0308                 int *val2, long mask)
0309 {
0310     int ret;
0311 
0312     switch (mask) {
0313     case IIO_CHAN_INFO_OFFSET:
0314         ret = sun4i_gpadc_temp_offset(indio_dev, val);
0315         if (ret)
0316             return ret;
0317 
0318         return IIO_VAL_INT;
0319     case IIO_CHAN_INFO_RAW:
0320         if (chan->type == IIO_VOLTAGE)
0321             ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
0322                            val);
0323         else
0324             ret = sun4i_gpadc_temp_read(indio_dev, val);
0325 
0326         if (ret)
0327             return ret;
0328 
0329         return IIO_VAL_INT;
0330     case IIO_CHAN_INFO_SCALE:
0331         if (chan->type == IIO_VOLTAGE) {
0332             /* 3000mV / 4096 * raw */
0333             *val = 0;
0334             *val2 = 732421875;
0335             return IIO_VAL_INT_PLUS_NANO;
0336         }
0337 
0338         ret = sun4i_gpadc_temp_scale(indio_dev, val);
0339         if (ret)
0340             return ret;
0341 
0342         return IIO_VAL_INT;
0343     default:
0344         return -EINVAL;
0345     }
0346 
0347     return -EINVAL;
0348 }
0349 
0350 static const struct iio_info sun4i_gpadc_iio_info = {
0351     .read_raw = sun4i_gpadc_read_raw,
0352 };
0353 
0354 static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
0355 {
0356     struct sun4i_gpadc_iio *info = dev_id;
0357 
0358     if (atomic_read(&info->ignore_temp_data_irq))
0359         goto out;
0360 
0361     if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
0362         complete(&info->completion);
0363 
0364 out:
0365     return IRQ_HANDLED;
0366 }
0367 
0368 static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
0369 {
0370     struct sun4i_gpadc_iio *info = dev_id;
0371 
0372     if (atomic_read(&info->ignore_fifo_data_irq))
0373         goto out;
0374 
0375     if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
0376         complete(&info->completion);
0377 
0378 out:
0379     return IRQ_HANDLED;
0380 }
0381 
0382 static int sun4i_gpadc_runtime_suspend(struct device *dev)
0383 {
0384     struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
0385 
0386     /* Disable the ADC on IP */
0387     regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
0388     /* Disable temperature sensor on IP */
0389     regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
0390 
0391     return 0;
0392 }
0393 
0394 static int sun4i_gpadc_runtime_resume(struct device *dev)
0395 {
0396     struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
0397 
0398     /* clkin = 6MHz */
0399     regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
0400              SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
0401              SUN4I_GPADC_CTRL0_FS_DIV(7) |
0402              SUN4I_GPADC_CTRL0_T_ACQ(63));
0403     regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
0404     regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
0405              SUN4I_GPADC_CTRL3_FILTER_EN |
0406              SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
0407     /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
0408     regmap_write(info->regmap, SUN4I_GPADC_TPR,
0409              SUN4I_GPADC_TPR_TEMP_ENABLE |
0410              SUN4I_GPADC_TPR_TEMP_PERIOD(800));
0411 
0412     return 0;
0413 }
0414 
0415 static int sun4i_gpadc_get_temp(void *data, int *temp)
0416 {
0417     struct sun4i_gpadc_iio *info = data;
0418     int val, scale, offset;
0419 
0420     if (sun4i_gpadc_temp_read(info->indio_dev, &val))
0421         return -ETIMEDOUT;
0422 
0423     sun4i_gpadc_temp_scale(info->indio_dev, &scale);
0424     sun4i_gpadc_temp_offset(info->indio_dev, &offset);
0425 
0426     *temp = (val + offset) * scale;
0427 
0428     return 0;
0429 }
0430 
0431 static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
0432     .get_temp = &sun4i_gpadc_get_temp,
0433 };
0434 
0435 static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
0436     .runtime_suspend = &sun4i_gpadc_runtime_suspend,
0437     .runtime_resume = &sun4i_gpadc_runtime_resume,
0438 };
0439 
0440 static int sun4i_irq_init(struct platform_device *pdev, const char *name,
0441               irq_handler_t handler, const char *devname,
0442               unsigned int *irq, atomic_t *atomic)
0443 {
0444     int ret;
0445     struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
0446     struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
0447 
0448     /*
0449      * Once the interrupt is activated, the IP continuously performs
0450      * conversions thus throws interrupts. The interrupt is activated right
0451      * after being requested but we want to control when these interrupts
0452      * occur thus we disable it right after being requested. However, an
0453      * interrupt might occur between these two instructions and we have to
0454      * make sure that does not happen, by using atomic flags. We set the
0455      * flag before requesting the interrupt and unset it right after
0456      * disabling the interrupt. When an interrupt occurs between these two
0457      * instructions, reading the atomic flag will tell us to ignore the
0458      * interrupt.
0459      */
0460     atomic_set(atomic, 1);
0461 
0462     ret = platform_get_irq_byname(pdev, name);
0463     if (ret < 0)
0464         return ret;
0465 
0466     ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
0467     if (ret < 0) {
0468         dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
0469         return ret;
0470     }
0471 
0472     *irq = ret;
0473     ret = devm_request_any_context_irq(&pdev->dev, *irq, handler,
0474                        IRQF_NO_AUTOEN,
0475                        devname, info);
0476     if (ret < 0) {
0477         dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
0478             name, ret);
0479         return ret;
0480     }
0481 
0482     atomic_set(atomic, 0);
0483 
0484     return 0;
0485 }
0486 
0487 static const struct of_device_id sun4i_gpadc_of_id[] = {
0488     {
0489         .compatible = "allwinner,sun8i-a33-ths",
0490         .data = &sun8i_a33_gpadc_data,
0491     },
0492     { /* sentinel */ }
0493 };
0494 
0495 static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
0496                 struct iio_dev *indio_dev)
0497 {
0498     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0499     void __iomem *base;
0500     int ret;
0501 
0502     info->data = of_device_get_match_data(&pdev->dev);
0503     if (!info->data)
0504         return -ENODEV;
0505 
0506     info->no_irq = true;
0507     indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
0508     indio_dev->channels = sun8i_a33_gpadc_channels;
0509 
0510     base = devm_platform_ioremap_resource(pdev, 0);
0511     if (IS_ERR(base))
0512         return PTR_ERR(base);
0513 
0514     info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
0515                          &sun4i_gpadc_regmap_config);
0516     if (IS_ERR(info->regmap)) {
0517         ret = PTR_ERR(info->regmap);
0518         dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
0519         return ret;
0520     }
0521 
0522     if (IS_ENABLED(CONFIG_THERMAL_OF))
0523         info->sensor_device = &pdev->dev;
0524 
0525     return 0;
0526 }
0527 
0528 static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
0529                  struct iio_dev *indio_dev)
0530 {
0531     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0532     struct sun4i_gpadc_dev *sun4i_gpadc_dev =
0533         dev_get_drvdata(pdev->dev.parent);
0534     int ret;
0535 
0536     info->no_irq = false;
0537     info->regmap = sun4i_gpadc_dev->regmap;
0538 
0539     indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
0540     indio_dev->channels = sun4i_gpadc_channels;
0541 
0542     info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
0543 
0544     /*
0545      * Since the controller needs to be in touchscreen mode for its thermal
0546      * sensor to operate properly, and that switching between the two modes
0547      * needs a delay, always registering in the thermal framework will
0548      * significantly slow down the conversion rate of the ADCs.
0549      *
0550      * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
0551      * register the sensor if that option is enabled, eventually leaving
0552      * that choice to the user.
0553      */
0554 
0555     if (IS_ENABLED(CONFIG_THERMAL_OF)) {
0556         /*
0557          * This driver is a child of an MFD which has a node in the DT
0558          * but not its children, because of DT backward compatibility
0559          * for A10, A13 and A31 SoCs. Therefore, the resulting devices
0560          * of this driver do not have an of_node variable.
0561          * However, its parent (the MFD driver) has an of_node variable
0562          * and since devm_thermal_zone_of_sensor_register uses its first
0563          * argument to match the phandle defined in the node of the
0564          * thermal driver with the of_node of the device passed as first
0565          * argument and the third argument to call ops from
0566          * thermal_zone_of_device_ops, the solution is to use the parent
0567          * device as first argument to match the phandle with its
0568          * of_node, and the device from this driver as third argument to
0569          * return the temperature.
0570          */
0571         info->sensor_device = pdev->dev.parent;
0572     } else {
0573         indio_dev->num_channels =
0574             ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
0575         indio_dev->channels = sun4i_gpadc_channels_no_temp;
0576     }
0577 
0578     if (IS_ENABLED(CONFIG_THERMAL_OF)) {
0579         ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
0580                      sun4i_gpadc_temp_data_irq_handler,
0581                      "temp_data", &info->temp_data_irq,
0582                      &info->ignore_temp_data_irq);
0583         if (ret < 0)
0584             return ret;
0585     }
0586 
0587     ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
0588                  sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
0589                  &info->fifo_data_irq, &info->ignore_fifo_data_irq);
0590     if (ret < 0)
0591         return ret;
0592 
0593     if (IS_ENABLED(CONFIG_THERMAL_OF)) {
0594         ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
0595         if (ret < 0) {
0596             dev_err(&pdev->dev,
0597                 "failed to register iio map array\n");
0598             return ret;
0599         }
0600     }
0601 
0602     return 0;
0603 }
0604 
0605 static int sun4i_gpadc_probe(struct platform_device *pdev)
0606 {
0607     struct sun4i_gpadc_iio *info;
0608     struct iio_dev *indio_dev;
0609     int ret;
0610 
0611     indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
0612     if (!indio_dev)
0613         return -ENOMEM;
0614 
0615     info = iio_priv(indio_dev);
0616     platform_set_drvdata(pdev, indio_dev);
0617 
0618     mutex_init(&info->mutex);
0619     info->indio_dev = indio_dev;
0620     init_completion(&info->completion);
0621     indio_dev->name = dev_name(&pdev->dev);
0622     indio_dev->info = &sun4i_gpadc_iio_info;
0623     indio_dev->modes = INDIO_DIRECT_MODE;
0624 
0625     if (pdev->dev.of_node)
0626         ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
0627     else
0628         ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
0629 
0630     if (ret)
0631         return ret;
0632 
0633     pm_runtime_set_autosuspend_delay(&pdev->dev,
0634                      SUN4I_GPADC_AUTOSUSPEND_DELAY);
0635     pm_runtime_use_autosuspend(&pdev->dev);
0636     pm_runtime_set_suspended(&pdev->dev);
0637     pm_runtime_enable(&pdev->dev);
0638 
0639     if (IS_ENABLED(CONFIG_THERMAL_OF)) {
0640         info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
0641                                 0, info,
0642                                 &sun4i_ts_tz_ops);
0643         /*
0644          * Do not fail driver probing when failing to register in
0645          * thermal because no thermal DT node is found.
0646          */
0647         if (IS_ERR(info->tzd) && PTR_ERR(info->tzd) != -ENODEV) {
0648             dev_err(&pdev->dev,
0649                 "could not register thermal sensor: %ld\n",
0650                 PTR_ERR(info->tzd));
0651             return PTR_ERR(info->tzd);
0652         }
0653     }
0654 
0655     ret = devm_iio_device_register(&pdev->dev, indio_dev);
0656     if (ret < 0) {
0657         dev_err(&pdev->dev, "could not register the device\n");
0658         goto err_map;
0659     }
0660 
0661     return 0;
0662 
0663 err_map:
0664     if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
0665         iio_map_array_unregister(indio_dev);
0666 
0667     pm_runtime_put(&pdev->dev);
0668     pm_runtime_disable(&pdev->dev);
0669 
0670     return ret;
0671 }
0672 
0673 static int sun4i_gpadc_remove(struct platform_device *pdev)
0674 {
0675     struct iio_dev *indio_dev = platform_get_drvdata(pdev);
0676     struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
0677 
0678     pm_runtime_put(&pdev->dev);
0679     pm_runtime_disable(&pdev->dev);
0680 
0681     if (!IS_ENABLED(CONFIG_THERMAL_OF))
0682         return 0;
0683 
0684     thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
0685 
0686     if (!info->no_irq)
0687         iio_map_array_unregister(indio_dev);
0688 
0689     return 0;
0690 }
0691 
0692 static const struct platform_device_id sun4i_gpadc_id[] = {
0693     { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
0694     { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
0695     { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
0696     { /* sentinel */ },
0697 };
0698 MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
0699 
0700 static struct platform_driver sun4i_gpadc_driver = {
0701     .driver = {
0702         .name = "sun4i-gpadc-iio",
0703         .of_match_table = sun4i_gpadc_of_id,
0704         .pm = &sun4i_gpadc_pm_ops,
0705     },
0706     .id_table = sun4i_gpadc_id,
0707     .probe = sun4i_gpadc_probe,
0708     .remove = sun4i_gpadc_remove,
0709 };
0710 MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
0711 
0712 module_platform_driver(sun4i_gpadc_driver);
0713 
0714 MODULE_DESCRIPTION("ADC driver for sunxi platforms");
0715 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
0716 MODULE_LICENSE("GPL v2");
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