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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Qualcomm PM8xxx PMIC XOADC driver
0004  *
0005  * These ADCs are known as HK/XO (house keeping / chrystal oscillator)
0006  * "XO" in "XOADC" means Chrystal Oscillator. It's a bunch of
0007  * specific-purpose and general purpose ADC converters and channels.
0008  *
0009  * Copyright (C) 2017 Linaro Ltd.
0010  * Author: Linus Walleij <linus.walleij@linaro.org>
0011  */
0012 
0013 #include <linux/iio/adc/qcom-vadc-common.h>
0014 #include <linux/iio/iio.h>
0015 #include <linux/iio/sysfs.h>
0016 #include <linux/module.h>
0017 #include <linux/of.h>
0018 #include <linux/of_device.h>
0019 #include <linux/platform_device.h>
0020 #include <linux/regmap.h>
0021 #include <linux/init.h>
0022 #include <linux/interrupt.h>
0023 #include <linux/regulator/consumer.h>
0024 
0025 /*
0026  * Definitions for the "user processor" registers lifted from the v3.4
0027  * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
0028  * drivers/misc/pmic8058-xoadc.c
0029  * drivers/hwmon/pm8xxx-adc.c
0030  * None of them contain any complete register specification, so this is
0031  * a best effort of combining the information.
0032  */
0033 
0034 /* These appear to be "battery monitor" registers */
0035 #define ADC_ARB_BTM_CNTRL1          0x17e
0036 #define ADC_ARB_BTM_CNTRL1_EN_BTM       BIT(0)
0037 #define ADC_ARB_BTM_CNTRL1_SEL_OP_MODE      BIT(1)
0038 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL1   BIT(2)
0039 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL2   BIT(3)
0040 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL3   BIT(4)
0041 #define ADC_ARB_BTM_CNTRL1_MEAS_INTERVAL4   BIT(5)
0042 #define ADC_ARB_BTM_CNTRL1_EOC          BIT(6)
0043 #define ADC_ARB_BTM_CNTRL1_REQ          BIT(7)
0044 
0045 #define ADC_ARB_BTM_AMUX_CNTRL          0x17f
0046 #define ADC_ARB_BTM_ANA_PARAM           0x180
0047 #define ADC_ARB_BTM_DIG_PARAM           0x181
0048 #define ADC_ARB_BTM_RSV             0x182
0049 #define ADC_ARB_BTM_DATA1           0x183
0050 #define ADC_ARB_BTM_DATA0           0x184
0051 #define ADC_ARB_BTM_BAT_COOL_THR1       0x185
0052 #define ADC_ARB_BTM_BAT_COOL_THR0       0x186
0053 #define ADC_ARB_BTM_BAT_WARM_THR1       0x187
0054 #define ADC_ARB_BTM_BAT_WARM_THR0       0x188
0055 #define ADC_ARB_BTM_CNTRL2          0x18c
0056 
0057 /* Proper ADC registers */
0058 
0059 #define ADC_ARB_USRP_CNTRL          0x197
0060 #define ADC_ARB_USRP_CNTRL_EN_ARB       BIT(0)
0061 #define ADC_ARB_USRP_CNTRL_RSV1         BIT(1)
0062 #define ADC_ARB_USRP_CNTRL_RSV2         BIT(2)
0063 #define ADC_ARB_USRP_CNTRL_RSV3         BIT(3)
0064 #define ADC_ARB_USRP_CNTRL_RSV4         BIT(4)
0065 #define ADC_ARB_USRP_CNTRL_RSV5         BIT(5)
0066 #define ADC_ARB_USRP_CNTRL_EOC          BIT(6)
0067 #define ADC_ARB_USRP_CNTRL_REQ          BIT(7)
0068 
0069 #define ADC_ARB_USRP_AMUX_CNTRL         0x198
0070 /*
0071  * The channel mask includes the bits selecting channel mux and prescaler
0072  * on PM8058, or channel mux and premux on PM8921.
0073  */
0074 #define ADC_ARB_USRP_AMUX_CNTRL_CHAN_MASK   0xfc
0075 #define ADC_ARB_USRP_AMUX_CNTRL_RSV0        BIT(0)
0076 #define ADC_ARB_USRP_AMUX_CNTRL_RSV1        BIT(1)
0077 /* On PM8058 this is prescaling, on PM8921 this is premux */
0078 #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX0    BIT(2)
0079 #define ADC_ARB_USRP_AMUX_CNTRL_PRESCALEMUX1    BIT(3)
0080 #define ADC_ARB_USRP_AMUX_CNTRL_SEL0        BIT(4)
0081 #define ADC_ARB_USRP_AMUX_CNTRL_SEL1        BIT(5)
0082 #define ADC_ARB_USRP_AMUX_CNTRL_SEL2        BIT(6)
0083 #define ADC_ARB_USRP_AMUX_CNTRL_SEL3        BIT(7)
0084 #define ADC_AMUX_PREMUX_SHIFT           2
0085 #define ADC_AMUX_SEL_SHIFT          4
0086 
0087 /* We know very little about the bits in this register */
0088 #define ADC_ARB_USRP_ANA_PARAM          0x199
0089 #define ADC_ARB_USRP_ANA_PARAM_DIS      0xFE
0090 #define ADC_ARB_USRP_ANA_PARAM_EN       0xFF
0091 
0092 #define ADC_ARB_USRP_DIG_PARAM          0x19A
0093 #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0   BIT(0)
0094 #define ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1   BIT(1)
0095 #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE0    BIT(2)
0096 #define ADC_ARB_USRP_DIG_PARAM_CLK_RATE1    BIT(3)
0097 #define ADC_ARB_USRP_DIG_PARAM_EOC      BIT(4)
0098 /*
0099  * On a later ADC the decimation factors are defined as
0100  * 00 = 512, 01 = 1024, 10 = 2048, 11 = 4096 so assume this
0101  * holds also for this older XOADC.
0102  */
0103 #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE0    BIT(5)
0104 #define ADC_ARB_USRP_DIG_PARAM_DEC_RATE1    BIT(6)
0105 #define ADC_ARB_USRP_DIG_PARAM_EN       BIT(7)
0106 #define ADC_DIG_PARAM_DEC_SHIFT         5
0107 
0108 #define ADC_ARB_USRP_RSV            0x19B
0109 #define ADC_ARB_USRP_RSV_RST            BIT(0)
0110 #define ADC_ARB_USRP_RSV_DTEST0         BIT(1)
0111 #define ADC_ARB_USRP_RSV_DTEST1         BIT(2)
0112 #define ADC_ARB_USRP_RSV_OP         BIT(3)
0113 #define ADC_ARB_USRP_RSV_IP_SEL0        BIT(4)
0114 #define ADC_ARB_USRP_RSV_IP_SEL1        BIT(5)
0115 #define ADC_ARB_USRP_RSV_IP_SEL2        BIT(6)
0116 #define ADC_ARB_USRP_RSV_TRM            BIT(7)
0117 #define ADC_RSV_IP_SEL_SHIFT            4
0118 
0119 #define ADC_ARB_USRP_DATA0          0x19D
0120 #define ADC_ARB_USRP_DATA1          0x19C
0121 
0122 /*
0123  * Physical channels which MUST exist on all PM variants in order to provide
0124  * proper reference points for calibration.
0125  *
0126  * @PM8XXX_CHANNEL_INTERNAL: 625mV reference channel
0127  * @PM8XXX_CHANNEL_125V: 1250mV reference channel
0128  * @PM8XXX_CHANNEL_INTERNAL_2: 325mV reference channel
0129  * @PM8XXX_CHANNEL_MUXOFF: channel to reduce input load on mux, apparently also
0130  * measures XO temperature
0131  */
0132 #define PM8XXX_CHANNEL_INTERNAL     0x0c
0133 #define PM8XXX_CHANNEL_125V     0x0d
0134 #define PM8XXX_CHANNEL_INTERNAL_2   0x0e
0135 #define PM8XXX_CHANNEL_MUXOFF       0x0f
0136 
0137 /*
0138  * PM8058 AMUX premux scaling, two bits. This is done of the channel before
0139  * reaching the AMUX.
0140  */
0141 #define PM8058_AMUX_PRESCALE_0 0x0 /* No scaling on the signal */
0142 #define PM8058_AMUX_PRESCALE_1 0x1 /* Unity scaling selected by the user */
0143 #define PM8058_AMUX_PRESCALE_1_DIV3 0x2 /* 1/3 prescaler on the input */
0144 
0145 /* Defines reference voltage for the XOADC */
0146 #define AMUX_RSV0 0x0 /* XO_IN/XOADC_GND, special selection to read XO temp */
0147 #define AMUX_RSV1 0x1 /* PMIC_IN/XOADC_GND */
0148 #define AMUX_RSV2 0x2 /* PMIC_IN/BMS_CSP */
0149 #define AMUX_RSV3 0x3 /* not used */
0150 #define AMUX_RSV4 0x4 /* XOADC_GND/XOADC_GND */
0151 #define AMUX_RSV5 0x5 /* XOADC_VREF/XOADC_GND */
0152 #define XOADC_RSV_MAX 5 /* 3 bits 0..7, 3 and 6,7 are invalid */
0153 
0154 /**
0155  * struct xoadc_channel - encodes channel properties and defaults
0156  * @datasheet_name: the hardwarename of this channel
0157  * @pre_scale_mux: prescale (PM8058) or premux (PM8921) for selecting
0158  * this channel. Both this and the amux channel is needed to uniquely
0159  * identify a channel. Values 0..3.
0160  * @amux_channel: value of the ADC_ARB_USRP_AMUX_CNTRL register for this
0161  * channel, bits 4..7, selects the amux, values 0..f
0162  * @prescale: the channels have hard-coded prescale ratios defined
0163  * by the hardware, this tells us what it is
0164  * @type: corresponding IIO channel type, usually IIO_VOLTAGE or
0165  * IIO_TEMP
0166  * @scale_fn_type: the liner interpolation etc to convert the
0167  * ADC code to the value that IIO expects, in uV or millicelsius
0168  * etc. This scale function can be pretty elaborate if different
0169  * thermistors are connected or other hardware characteristics are
0170  * deployed.
0171  * @amux_ip_rsv: ratiometric scale value used by the analog muxer: this
0172  * selects the reference voltage for ratiometric scaling
0173  */
0174 struct xoadc_channel {
0175     const char *datasheet_name;
0176     u8 pre_scale_mux:2;
0177     u8 amux_channel:4;
0178     const struct u32_fract prescale;
0179     enum iio_chan_type type;
0180     enum vadc_scale_fn_type scale_fn_type;
0181     u8 amux_ip_rsv:3;
0182 };
0183 
0184 /**
0185  * struct xoadc_variant - encodes the XOADC variant characteristics
0186  * @name: name of this PMIC variant
0187  * @channels: the hardware channels and respective settings and defaults
0188  * @broken_ratiometric: if the PMIC has broken ratiometric scaling (this
0189  * is a known problem on PM8058)
0190  * @prescaling: this variant uses AMUX bits 2 & 3 for prescaling (PM8058)
0191  * @second_level_mux: this variant uses AMUX bits 2 & 3 for a second level
0192  * mux
0193  */
0194 struct xoadc_variant {
0195     const char name[16];
0196     const struct xoadc_channel *channels;
0197     bool broken_ratiometric;
0198     bool prescaling;
0199     bool second_level_mux;
0200 };
0201 
0202 /*
0203  * XOADC_CHAN macro parameters:
0204  * _dname: the name of the channel
0205  * _presmux: prescaler (PM8058) or premux (PM8921) setting for this channel
0206  * _amux: the value in bits 2..7 of the ADC_ARB_USRP_AMUX_CNTRL register
0207  * for this channel. On some PMICs some of the bits select a prescaler, and
0208  * on some PMICs some of the bits select various complex multiplex settings.
0209  * _type: IIO channel type
0210  * _prenum: prescaler numerator (dividend)
0211  * _preden: prescaler denominator (divisor)
0212  * _scale: scaling function type, this selects how the raw valued is mangled
0213  * to output the actual processed measurement
0214  * _amip: analog mux input parent when using ratiometric measurements
0215  */
0216 #define XOADC_CHAN(_dname, _presmux, _amux, _type, _prenum, _preden, _scale, _amip) \
0217     {                               \
0218         .datasheet_name = __stringify(_dname),          \
0219         .pre_scale_mux = _presmux,              \
0220         .amux_channel = _amux,                  \
0221         .prescale = {                       \
0222             .numerator = _prenum, .denominator = _preden,   \
0223         },                          \
0224         .type = _type,                      \
0225         .scale_fn_type = _scale,                \
0226         .amux_ip_rsv = _amip,                   \
0227     }
0228 
0229 /*
0230  * Taken from arch/arm/mach-msm/board-9615.c in the vendor tree:
0231  * TODO: incomplete, needs testing.
0232  */
0233 static const struct xoadc_channel pm8018_xoadc_channels[] = {
0234     XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0235     XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0236     XOADC_CHAN(VPH_PWR, 0x00, 0x02, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0237     XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
0238     /* Used for battery ID or battery temperature */
0239     XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV2),
0240     XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0241     XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0242     XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
0243     { }, /* Sentinel */
0244 };
0245 
0246 /*
0247  * Taken from arch/arm/mach-msm/board-8930-pmic.c in the vendor tree:
0248  * TODO: needs testing.
0249  */
0250 static const struct xoadc_channel pm8038_xoadc_channels[] = {
0251     XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0252     XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0253     XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
0254     XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0255     XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0256     XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0257     XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0258     XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0259     /* AMUX8 used for battery temperature in most cases */
0260     XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV2),
0261     XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0262     XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
0263     XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
0264     XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0265     XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0266     XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0267     XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
0268     { }, /* Sentinel */
0269 };
0270 
0271 /*
0272  * This was created by cross-referencing the vendor tree
0273  * arch/arm/mach-msm/board-msm8x60.c msm_adc_channels_data[]
0274  * with the "channel types" (first field) to find the right
0275  * configuration for these channels on an MSM8x60 i.e. PM8058
0276  * setup.
0277  */
0278 static const struct xoadc_channel pm8058_xoadc_channels[] = {
0279     XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
0280     XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0281     XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 10, SCALE_DEFAULT, AMUX_RSV1),
0282     XOADC_CHAN(ICHG, 0x00, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0283     XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0284     /*
0285      * AMUX channels 5 thru 9 are referred to as MPP5 thru MPP9 in
0286      * some code and documentation. But they are really just 5
0287      * channels just like any other. They are connected to a switching
0288      * matrix where they can be routed to any of the MPPs, not just
0289      * 1-to-1 onto MPP5 thru 9, so naming them MPP5 thru MPP9 is
0290      * very confusing.
0291      */
0292     XOADC_CHAN(AMUX5, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0293     XOADC_CHAN(AMUX6, 0x00, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0294     XOADC_CHAN(AMUX7, 0x00, 0x07, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
0295     XOADC_CHAN(AMUX8, 0x00, 0x08, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
0296     XOADC_CHAN(AMUX9, 0x00, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0297     XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0298     XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
0299     XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0300     XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0301     XOADC_CHAN(INTERNAL_2, 0x00, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0302     XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
0303     /* There are also "unity" and divided by 3 channels (prescaler) but noone is using them */
0304     { }, /* Sentinel */
0305 };
0306 
0307 /*
0308  * The PM8921 has some pre-muxing on its channels, this comes from the vendor tree
0309  * include/linux/mfd/pm8xxx/pm8xxx-adc.h
0310  * board-flo-pmic.c (Nexus 7) and board-8064-pmic.c
0311  */
0312 static const struct xoadc_channel pm8921_xoadc_channels[] = {
0313     XOADC_CHAN(VCOIN, 0x00, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0314     XOADC_CHAN(VBAT, 0x00, 0x01, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0315     XOADC_CHAN(DCIN, 0x00, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
0316     /* channel "ICHG" is reserved and not used on PM8921 */
0317     XOADC_CHAN(VPH_PWR, 0x00, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0318     XOADC_CHAN(IBAT, 0x00, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0319     /* CHAN 6 & 7 (MPP1 & MPP2) are reserved for MPP channels on PM8921 */
0320     XOADC_CHAN(BATT_THERM, 0x00, 0x08, IIO_TEMP, 1, 1, SCALE_THERM_100K_PULLUP, AMUX_RSV1),
0321     XOADC_CHAN(BATT_ID, 0x00, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0322     XOADC_CHAN(USB_VBUS, 0x00, 0x0a, IIO_VOLTAGE, 1, 4, SCALE_DEFAULT, AMUX_RSV1),
0323     XOADC_CHAN(DIE_TEMP, 0x00, 0x0b, IIO_TEMP, 1, 1, SCALE_PMIC_THERM, AMUX_RSV1),
0324     XOADC_CHAN(INTERNAL, 0x00, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0325     XOADC_CHAN(125V, 0x00, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0326     /* FIXME: look into the scaling of this temperature */
0327     XOADC_CHAN(CHG_TEMP, 0x00, 0x0e, IIO_TEMP, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0328     XOADC_CHAN(MUXOFF, 0x00, 0x0f, IIO_TEMP, 1, 1, SCALE_XOTHERM, AMUX_RSV0),
0329     /* The following channels have premux bit 0 set to 1 (all end in 4) */
0330     XOADC_CHAN(ATEST_8, 0x01, 0x00, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0331     /* Set scaling to 1/2 based on the name for these two */
0332     XOADC_CHAN(USB_SNS_DIV20, 0x01, 0x01, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
0333     XOADC_CHAN(DCIN_SNS_DIV20, 0x01, 0x02, IIO_VOLTAGE, 1, 2, SCALE_DEFAULT, AMUX_RSV1),
0334     XOADC_CHAN(AMUX3, 0x01, 0x03, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0335     XOADC_CHAN(AMUX4, 0x01, 0x04, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0336     XOADC_CHAN(AMUX5, 0x01, 0x05, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0337     XOADC_CHAN(AMUX6, 0x01, 0x06, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0338     XOADC_CHAN(AMUX7, 0x01, 0x07, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0339     XOADC_CHAN(AMUX8, 0x01, 0x08, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0340     /* Internal test signals, I think */
0341     XOADC_CHAN(ATEST_1, 0x01, 0x09, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0342     XOADC_CHAN(ATEST_2, 0x01, 0x0a, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0343     XOADC_CHAN(ATEST_3, 0x01, 0x0b, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0344     XOADC_CHAN(ATEST_4, 0x01, 0x0c, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0345     XOADC_CHAN(ATEST_5, 0x01, 0x0d, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0346     XOADC_CHAN(ATEST_6, 0x01, 0x0e, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0347     XOADC_CHAN(ATEST_7, 0x01, 0x0f, IIO_VOLTAGE, 1, 1, SCALE_DEFAULT, AMUX_RSV1),
0348     /* The following channels have premux bit 1 set to 1 (all end in 8) */
0349     /* I guess even ATEST8 will be divided by 3 here */
0350     XOADC_CHAN(ATEST_8, 0x02, 0x00, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0351     /* I guess div 2 div 3 becomes div 6 */
0352     XOADC_CHAN(USB_SNS_DIV20_DIV3, 0x02, 0x01, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
0353     XOADC_CHAN(DCIN_SNS_DIV20_DIV3, 0x02, 0x02, IIO_VOLTAGE, 1, 6, SCALE_DEFAULT, AMUX_RSV1),
0354     XOADC_CHAN(AMUX3_DIV3, 0x02, 0x03, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0355     XOADC_CHAN(AMUX4_DIV3, 0x02, 0x04, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0356     XOADC_CHAN(AMUX5_DIV3, 0x02, 0x05, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0357     XOADC_CHAN(AMUX6_DIV3, 0x02, 0x06, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0358     XOADC_CHAN(AMUX7_DIV3, 0x02, 0x07, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0359     XOADC_CHAN(AMUX8_DIV3, 0x02, 0x08, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0360     XOADC_CHAN(ATEST_1_DIV3, 0x02, 0x09, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0361     XOADC_CHAN(ATEST_2_DIV3, 0x02, 0x0a, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0362     XOADC_CHAN(ATEST_3_DIV3, 0x02, 0x0b, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0363     XOADC_CHAN(ATEST_4_DIV3, 0x02, 0x0c, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0364     XOADC_CHAN(ATEST_5_DIV3, 0x02, 0x0d, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0365     XOADC_CHAN(ATEST_6_DIV3, 0x02, 0x0e, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0366     XOADC_CHAN(ATEST_7_DIV3, 0x02, 0x0f, IIO_VOLTAGE, 1, 3, SCALE_DEFAULT, AMUX_RSV1),
0367     { }, /* Sentinel */
0368 };
0369 
0370 /**
0371  * struct pm8xxx_chan_info - ADC channel information
0372  * @name: name of this channel
0373  * @hwchan: pointer to hardware channel information (muxing & scaling settings)
0374  * @calibration: whether to use absolute or ratiometric calibration
0375  * @scale_fn_type: scaling function type
0376  * @decimation: 0,1,2,3
0377  * @amux_ip_rsv: ratiometric scale value if using ratiometric
0378  * calibration: 0, 1, 2, 4, 5.
0379  */
0380 struct pm8xxx_chan_info {
0381     const char *name;
0382     const struct xoadc_channel *hwchan;
0383     enum vadc_calibration calibration;
0384     u8 decimation:2;
0385     u8 amux_ip_rsv:3;
0386 };
0387 
0388 /**
0389  * struct pm8xxx_xoadc - state container for the XOADC
0390  * @dev: pointer to device
0391  * @map: regmap to access registers
0392  * @variant: XOADC variant characteristics
0393  * @vref: reference voltage regulator
0394  * characteristics of the channels, and sensible default settings
0395  * @nchans: number of channels, configured by the device tree
0396  * @chans: the channel information per-channel, configured by the device tree
0397  * @iio_chans: IIO channel specifiers
0398  * @graph: linear calibration parameters for absolute and
0399  * ratiometric measurements
0400  * @complete: completion to indicate end of conversion
0401  * @lock: lock to restrict access to the hardware to one client at the time
0402  */
0403 struct pm8xxx_xoadc {
0404     struct device *dev;
0405     struct regmap *map;
0406     const struct xoadc_variant *variant;
0407     struct regulator *vref;
0408     unsigned int nchans;
0409     struct pm8xxx_chan_info *chans;
0410     struct iio_chan_spec *iio_chans;
0411     struct vadc_linear_graph graph[2];
0412     struct completion complete;
0413     struct mutex lock;
0414 };
0415 
0416 static irqreturn_t pm8xxx_eoc_irq(int irq, void *d)
0417 {
0418     struct iio_dev *indio_dev = d;
0419     struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
0420 
0421     complete(&adc->complete);
0422 
0423     return IRQ_HANDLED;
0424 }
0425 
0426 static struct pm8xxx_chan_info *
0427 pm8xxx_get_channel(struct pm8xxx_xoadc *adc, u8 chan)
0428 {
0429     int i;
0430 
0431     for (i = 0; i < adc->nchans; i++) {
0432         struct pm8xxx_chan_info *ch = &adc->chans[i];
0433         if (ch->hwchan->amux_channel == chan)
0434             return ch;
0435     }
0436     return NULL;
0437 }
0438 
0439 static int pm8xxx_read_channel_rsv(struct pm8xxx_xoadc *adc,
0440                    const struct pm8xxx_chan_info *ch,
0441                    u8 rsv, u16 *adc_code,
0442                    bool force_ratiometric)
0443 {
0444     int ret;
0445     unsigned int val;
0446     u8 rsvmask, rsvval;
0447     u8 lsb, msb;
0448 
0449     dev_dbg(adc->dev, "read channel \"%s\", amux %d, prescale/mux: %d, rsv %d\n",
0450         ch->name, ch->hwchan->amux_channel, ch->hwchan->pre_scale_mux, rsv);
0451 
0452     mutex_lock(&adc->lock);
0453 
0454     /* Mux in this channel */
0455     val = ch->hwchan->amux_channel << ADC_AMUX_SEL_SHIFT;
0456     val |= ch->hwchan->pre_scale_mux << ADC_AMUX_PREMUX_SHIFT;
0457     ret = regmap_write(adc->map, ADC_ARB_USRP_AMUX_CNTRL, val);
0458     if (ret)
0459         goto unlock;
0460 
0461     /* Set up ratiometric scale value, mask off all bits except these */
0462     rsvmask = (ADC_ARB_USRP_RSV_RST | ADC_ARB_USRP_RSV_DTEST0 |
0463            ADC_ARB_USRP_RSV_DTEST1 | ADC_ARB_USRP_RSV_OP);
0464     if (adc->variant->broken_ratiometric && !force_ratiometric) {
0465         /*
0466          * Apparently the PM8058 has some kind of bug which is
0467          * reflected in the vendor tree drivers/misc/pmix8058-xoadc.c
0468          * which just hardcodes the RSV selector to SEL1 (0x20) for
0469          * most cases and SEL0 (0x10) for the MUXOFF channel only.
0470          * If we force ratiometric (currently only done when attempting
0471          * to do ratiometric calibration) this doesn't seem to work
0472          * very well and I suspect ratiometric conversion is simply
0473          * broken or not supported on the PM8058.
0474          *
0475          * Maybe IO_SEL2 doesn't exist on PM8058 and bits 4 & 5 select
0476          * the mode alone.
0477          *
0478          * Some PM8058 register documentation would be nice to get
0479          * this right.
0480          */
0481         if (ch->hwchan->amux_channel == PM8XXX_CHANNEL_MUXOFF)
0482             rsvval = ADC_ARB_USRP_RSV_IP_SEL0;
0483         else
0484             rsvval = ADC_ARB_USRP_RSV_IP_SEL1;
0485     } else {
0486         if (rsv == 0xff)
0487             rsvval = (ch->amux_ip_rsv << ADC_RSV_IP_SEL_SHIFT) |
0488                 ADC_ARB_USRP_RSV_TRM;
0489         else
0490             rsvval = (rsv << ADC_RSV_IP_SEL_SHIFT) |
0491                 ADC_ARB_USRP_RSV_TRM;
0492     }
0493 
0494     ret = regmap_update_bits(adc->map,
0495                  ADC_ARB_USRP_RSV,
0496                  ~rsvmask,
0497                  rsvval);
0498     if (ret)
0499         goto unlock;
0500 
0501     ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
0502                ADC_ARB_USRP_ANA_PARAM_DIS);
0503     if (ret)
0504         goto unlock;
0505 
0506     /* Decimation factor */
0507     ret = regmap_write(adc->map, ADC_ARB_USRP_DIG_PARAM,
0508                ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT0 |
0509                ADC_ARB_USRP_DIG_PARAM_SEL_SHIFT1 |
0510                ch->decimation << ADC_DIG_PARAM_DEC_SHIFT);
0511     if (ret)
0512         goto unlock;
0513 
0514     ret = regmap_write(adc->map, ADC_ARB_USRP_ANA_PARAM,
0515                ADC_ARB_USRP_ANA_PARAM_EN);
0516     if (ret)
0517         goto unlock;
0518 
0519     /* Enable the arbiter, the Qualcomm code does it twice like this */
0520     ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
0521                ADC_ARB_USRP_CNTRL_EN_ARB);
0522     if (ret)
0523         goto unlock;
0524     ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
0525                ADC_ARB_USRP_CNTRL_EN_ARB);
0526     if (ret)
0527         goto unlock;
0528 
0529 
0530     /* Fire a request! */
0531     reinit_completion(&adc->complete);
0532     ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL,
0533                ADC_ARB_USRP_CNTRL_EN_ARB |
0534                ADC_ARB_USRP_CNTRL_REQ);
0535     if (ret)
0536         goto unlock;
0537 
0538     /* Next the interrupt occurs */
0539     ret = wait_for_completion_timeout(&adc->complete,
0540                       VADC_CONV_TIME_MAX_US);
0541     if (!ret) {
0542         dev_err(adc->dev, "conversion timed out\n");
0543         ret = -ETIMEDOUT;
0544         goto unlock;
0545     }
0546 
0547     ret = regmap_read(adc->map, ADC_ARB_USRP_DATA0, &val);
0548     if (ret)
0549         goto unlock;
0550     lsb = val;
0551     ret = regmap_read(adc->map, ADC_ARB_USRP_DATA1, &val);
0552     if (ret)
0553         goto unlock;
0554     msb = val;
0555     *adc_code = (msb << 8) | lsb;
0556 
0557     /* Turn off the ADC by setting the arbiter to 0 twice */
0558     ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
0559     if (ret)
0560         goto unlock;
0561     ret = regmap_write(adc->map, ADC_ARB_USRP_CNTRL, 0);
0562     if (ret)
0563         goto unlock;
0564 
0565 unlock:
0566     mutex_unlock(&adc->lock);
0567     return ret;
0568 }
0569 
0570 static int pm8xxx_read_channel(struct pm8xxx_xoadc *adc,
0571                    const struct pm8xxx_chan_info *ch,
0572                    u16 *adc_code)
0573 {
0574     /*
0575      * Normally we just use the ratiometric scale value (RSV) predefined
0576      * for the channel, but during calibration we need to modify this
0577      * so this wrapper is a helper hiding the more complex version.
0578      */
0579     return pm8xxx_read_channel_rsv(adc, ch, 0xff, adc_code, false);
0580 }
0581 
0582 static int pm8xxx_calibrate_device(struct pm8xxx_xoadc *adc)
0583 {
0584     const struct pm8xxx_chan_info *ch;
0585     u16 read_1250v;
0586     u16 read_0625v;
0587     u16 read_nomux_rsv5;
0588     u16 read_nomux_rsv4;
0589     int ret;
0590 
0591     adc->graph[VADC_CALIB_ABSOLUTE].dx = VADC_ABSOLUTE_RANGE_UV;
0592     adc->graph[VADC_CALIB_RATIOMETRIC].dx = VADC_RATIOMETRIC_RANGE;
0593 
0594     /* Common reference channel calibration */
0595     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
0596     if (!ch)
0597         return -ENODEV;
0598     ret = pm8xxx_read_channel(adc, ch, &read_1250v);
0599     if (ret) {
0600         dev_err(adc->dev, "could not read 1.25V reference channel\n");
0601         return -ENODEV;
0602     }
0603     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
0604     if (!ch)
0605         return -ENODEV;
0606     ret = pm8xxx_read_channel(adc, ch, &read_0625v);
0607     if (ret) {
0608         dev_err(adc->dev, "could not read 0.625V reference channel\n");
0609         return -ENODEV;
0610     }
0611     if (read_1250v == read_0625v) {
0612         dev_err(adc->dev, "read same ADC code for 1.25V and 0.625V\n");
0613         return -ENODEV;
0614     }
0615 
0616     adc->graph[VADC_CALIB_ABSOLUTE].dy = read_1250v - read_0625v;
0617     adc->graph[VADC_CALIB_ABSOLUTE].gnd = read_0625v;
0618 
0619     dev_info(adc->dev, "absolute calibration dx = %d uV, dy = %d units\n",
0620          VADC_ABSOLUTE_RANGE_UV, adc->graph[VADC_CALIB_ABSOLUTE].dy);
0621 
0622     /* Ratiometric calibration */
0623     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
0624     if (!ch)
0625         return -ENODEV;
0626     ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV5,
0627                       &read_nomux_rsv5, true);
0628     if (ret) {
0629         dev_err(adc->dev, "could not read MUXOFF reference channel\n");
0630         return -ENODEV;
0631     }
0632     ret = pm8xxx_read_channel_rsv(adc, ch, AMUX_RSV4,
0633                       &read_nomux_rsv4, true);
0634     if (ret) {
0635         dev_err(adc->dev, "could not read MUXOFF reference channel\n");
0636         return -ENODEV;
0637     }
0638     adc->graph[VADC_CALIB_RATIOMETRIC].dy =
0639         read_nomux_rsv5 - read_nomux_rsv4;
0640     adc->graph[VADC_CALIB_RATIOMETRIC].gnd = read_nomux_rsv4;
0641 
0642     dev_info(adc->dev, "ratiometric calibration dx = %d, dy = %d units\n",
0643          VADC_RATIOMETRIC_RANGE,
0644          adc->graph[VADC_CALIB_RATIOMETRIC].dy);
0645 
0646     return 0;
0647 }
0648 
0649 static int pm8xxx_read_raw(struct iio_dev *indio_dev,
0650                struct iio_chan_spec const *chan,
0651                int *val, int *val2, long mask)
0652 {
0653     struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
0654     const struct pm8xxx_chan_info *ch;
0655     u16 adc_code;
0656     int ret;
0657 
0658     switch (mask) {
0659     case IIO_CHAN_INFO_PROCESSED:
0660         ch = pm8xxx_get_channel(adc, chan->address);
0661         if (!ch) {
0662             dev_err(adc->dev, "no such channel %lu\n",
0663                 chan->address);
0664             return -EINVAL;
0665         }
0666         ret = pm8xxx_read_channel(adc, ch, &adc_code);
0667         if (ret)
0668             return ret;
0669 
0670         ret = qcom_vadc_scale(ch->hwchan->scale_fn_type,
0671                       &adc->graph[ch->calibration],
0672                       &ch->hwchan->prescale,
0673                       (ch->calibration == VADC_CALIB_ABSOLUTE),
0674                       adc_code, val);
0675         if (ret)
0676             return ret;
0677 
0678         return IIO_VAL_INT;
0679     case IIO_CHAN_INFO_RAW:
0680         ch = pm8xxx_get_channel(adc, chan->address);
0681         if (!ch) {
0682             dev_err(adc->dev, "no such channel %lu\n",
0683                 chan->address);
0684             return -EINVAL;
0685         }
0686         ret = pm8xxx_read_channel(adc, ch, &adc_code);
0687         if (ret)
0688             return ret;
0689 
0690         *val = (int)adc_code;
0691         return IIO_VAL_INT;
0692     default:
0693         return -EINVAL;
0694     }
0695 }
0696 
0697 static int pm8xxx_of_xlate(struct iio_dev *indio_dev,
0698                const struct of_phandle_args *iiospec)
0699 {
0700     struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
0701     u8 pre_scale_mux;
0702     u8 amux_channel;
0703     unsigned int i;
0704 
0705     /*
0706      * First cell is prescaler or premux, second cell is analog
0707      * mux.
0708      */
0709     if (iiospec->args_count != 2) {
0710         dev_err(&indio_dev->dev, "wrong number of arguments for %pOFn need 2 got %d\n",
0711             iiospec->np,
0712             iiospec->args_count);
0713         return -EINVAL;
0714     }
0715     pre_scale_mux = (u8)iiospec->args[0];
0716     amux_channel = (u8)iiospec->args[1];
0717     dev_dbg(&indio_dev->dev, "pre scale/mux: %02x, amux: %02x\n",
0718         pre_scale_mux, amux_channel);
0719 
0720     /* We need to match exactly on the prescale/premux and channel */
0721     for (i = 0; i < adc->nchans; i++)
0722         if (adc->chans[i].hwchan->pre_scale_mux == pre_scale_mux &&
0723             adc->chans[i].hwchan->amux_channel == amux_channel)
0724             return i;
0725 
0726     return -EINVAL;
0727 }
0728 
0729 static const struct iio_info pm8xxx_xoadc_info = {
0730     .of_xlate = pm8xxx_of_xlate,
0731     .read_raw = pm8xxx_read_raw,
0732 };
0733 
0734 static int pm8xxx_xoadc_parse_channel(struct device *dev,
0735                       struct device_node *np,
0736                       const struct xoadc_channel *hw_channels,
0737                       struct iio_chan_spec *iio_chan,
0738                       struct pm8xxx_chan_info *ch)
0739 {
0740     const char *name = np->name;
0741     const struct xoadc_channel *hwchan;
0742     u32 pre_scale_mux, amux_channel;
0743     u32 rsv, dec;
0744     int ret;
0745     int chid;
0746 
0747     ret = of_property_read_u32_index(np, "reg", 0, &pre_scale_mux);
0748     if (ret) {
0749         dev_err(dev, "invalid pre scale/mux number %s\n", name);
0750         return ret;
0751     }
0752     ret = of_property_read_u32_index(np, "reg", 1, &amux_channel);
0753     if (ret) {
0754         dev_err(dev, "invalid amux channel number %s\n", name);
0755         return ret;
0756     }
0757 
0758     /* Find the right channel setting */
0759     chid = 0;
0760     hwchan = &hw_channels[0];
0761     while (hwchan && hwchan->datasheet_name) {
0762         if (hwchan->pre_scale_mux == pre_scale_mux &&
0763             hwchan->amux_channel == amux_channel)
0764             break;
0765         hwchan++;
0766         chid++;
0767     }
0768     /* The sentinel does not have a name assigned */
0769     if (!hwchan->datasheet_name) {
0770         dev_err(dev, "could not locate channel %02x/%02x\n",
0771             pre_scale_mux, amux_channel);
0772         return -EINVAL;
0773     }
0774     ch->name = name;
0775     ch->hwchan = hwchan;
0776     /* Everyone seems to use absolute calibration except in special cases */
0777     ch->calibration = VADC_CALIB_ABSOLUTE;
0778     /* Everyone seems to use default ("type 2") decimation */
0779     ch->decimation = VADC_DEF_DECIMATION;
0780 
0781     if (!of_property_read_u32(np, "qcom,ratiometric", &rsv)) {
0782         ch->calibration = VADC_CALIB_RATIOMETRIC;
0783         if (rsv > XOADC_RSV_MAX) {
0784             dev_err(dev, "%s too large RSV value %d\n", name, rsv);
0785             return -EINVAL;
0786         }
0787         if (rsv == AMUX_RSV3) {
0788             dev_err(dev, "%s invalid RSV value %d\n", name, rsv);
0789             return -EINVAL;
0790         }
0791     }
0792 
0793     /* Optional decimation, if omitted we use the default */
0794     ret = of_property_read_u32(np, "qcom,decimation", &dec);
0795     if (!ret) {
0796         ret = qcom_vadc_decimation_from_dt(dec);
0797         if (ret < 0) {
0798             dev_err(dev, "%s invalid decimation %d\n",
0799                 name, dec);
0800             return ret;
0801         }
0802         ch->decimation = ret;
0803     }
0804 
0805     iio_chan->channel = chid;
0806     iio_chan->address = hwchan->amux_channel;
0807     iio_chan->datasheet_name = hwchan->datasheet_name;
0808     iio_chan->type = hwchan->type;
0809     /* All channels are raw or processed */
0810     iio_chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
0811         BIT(IIO_CHAN_INFO_PROCESSED);
0812     iio_chan->indexed = 1;
0813 
0814     dev_dbg(dev,
0815         "channel [PRESCALE/MUX: %02x AMUX: %02x] \"%s\" ref voltage: %d, decimation %d prescale %d/%d, scale function %d\n",
0816         hwchan->pre_scale_mux, hwchan->amux_channel, ch->name,
0817         ch->amux_ip_rsv, ch->decimation, hwchan->prescale.numerator,
0818         hwchan->prescale.denominator, hwchan->scale_fn_type);
0819 
0820     return 0;
0821 }
0822 
0823 static int pm8xxx_xoadc_parse_channels(struct pm8xxx_xoadc *adc,
0824                        struct device_node *np)
0825 {
0826     struct device_node *child;
0827     struct pm8xxx_chan_info *ch;
0828     int ret;
0829     int i;
0830 
0831     adc->nchans = of_get_available_child_count(np);
0832     if (!adc->nchans) {
0833         dev_err(adc->dev, "no channel children\n");
0834         return -ENODEV;
0835     }
0836     dev_dbg(adc->dev, "found %d ADC channels\n", adc->nchans);
0837 
0838     adc->iio_chans = devm_kcalloc(adc->dev, adc->nchans,
0839                       sizeof(*adc->iio_chans), GFP_KERNEL);
0840     if (!adc->iio_chans)
0841         return -ENOMEM;
0842 
0843     adc->chans = devm_kcalloc(adc->dev, adc->nchans,
0844                   sizeof(*adc->chans), GFP_KERNEL);
0845     if (!adc->chans)
0846         return -ENOMEM;
0847 
0848     i = 0;
0849     for_each_available_child_of_node(np, child) {
0850         ch = &adc->chans[i];
0851         ret = pm8xxx_xoadc_parse_channel(adc->dev, child,
0852                          adc->variant->channels,
0853                          &adc->iio_chans[i],
0854                          ch);
0855         if (ret) {
0856             of_node_put(child);
0857             return ret;
0858         }
0859         i++;
0860     }
0861 
0862     /* Check for required channels */
0863     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_125V);
0864     if (!ch) {
0865         dev_err(adc->dev, "missing 1.25V reference channel\n");
0866         return -ENODEV;
0867     }
0868     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_INTERNAL);
0869     if (!ch) {
0870         dev_err(adc->dev, "missing 0.625V reference channel\n");
0871         return -ENODEV;
0872     }
0873     ch = pm8xxx_get_channel(adc, PM8XXX_CHANNEL_MUXOFF);
0874     if (!ch) {
0875         dev_err(adc->dev, "missing MUXOFF reference channel\n");
0876         return -ENODEV;
0877     }
0878 
0879     return 0;
0880 }
0881 
0882 static int pm8xxx_xoadc_probe(struct platform_device *pdev)
0883 {
0884     const struct xoadc_variant *variant;
0885     struct pm8xxx_xoadc *adc;
0886     struct iio_dev *indio_dev;
0887     struct device_node *np = pdev->dev.of_node;
0888     struct regmap *map;
0889     struct device *dev = &pdev->dev;
0890     int ret;
0891 
0892     variant = of_device_get_match_data(dev);
0893     if (!variant)
0894         return -ENODEV;
0895 
0896     indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
0897     if (!indio_dev)
0898         return -ENOMEM;
0899     platform_set_drvdata(pdev, indio_dev);
0900 
0901     adc = iio_priv(indio_dev);
0902     adc->dev = dev;
0903     adc->variant = variant;
0904     init_completion(&adc->complete);
0905     mutex_init(&adc->lock);
0906 
0907     ret = pm8xxx_xoadc_parse_channels(adc, np);
0908     if (ret)
0909         return ret;
0910 
0911     map = dev_get_regmap(dev->parent, NULL);
0912     if (!map) {
0913         dev_err(dev, "parent regmap unavailable.\n");
0914         return -ENODEV;
0915     }
0916     adc->map = map;
0917 
0918     /* Bring up regulator */
0919     adc->vref = devm_regulator_get(dev, "xoadc-ref");
0920     if (IS_ERR(adc->vref))
0921         return dev_err_probe(dev, PTR_ERR(adc->vref),
0922                      "failed to get XOADC VREF regulator\n");
0923     ret = regulator_enable(adc->vref);
0924     if (ret) {
0925         dev_err(dev, "failed to enable XOADC VREF regulator\n");
0926         return ret;
0927     }
0928 
0929     ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0),
0930             pm8xxx_eoc_irq, NULL, 0, variant->name, indio_dev);
0931     if (ret) {
0932         dev_err(dev, "unable to request IRQ\n");
0933         goto out_disable_vref;
0934     }
0935 
0936     indio_dev->name = variant->name;
0937     indio_dev->modes = INDIO_DIRECT_MODE;
0938     indio_dev->info = &pm8xxx_xoadc_info;
0939     indio_dev->channels = adc->iio_chans;
0940     indio_dev->num_channels = adc->nchans;
0941 
0942     ret = iio_device_register(indio_dev);
0943     if (ret)
0944         goto out_disable_vref;
0945 
0946     ret = pm8xxx_calibrate_device(adc);
0947     if (ret)
0948         goto out_unreg_device;
0949 
0950     dev_info(dev, "%s XOADC driver enabled\n", variant->name);
0951 
0952     return 0;
0953 
0954 out_unreg_device:
0955     iio_device_unregister(indio_dev);
0956 out_disable_vref:
0957     regulator_disable(adc->vref);
0958 
0959     return ret;
0960 }
0961 
0962 static int pm8xxx_xoadc_remove(struct platform_device *pdev)
0963 {
0964     struct iio_dev *indio_dev = platform_get_drvdata(pdev);
0965     struct pm8xxx_xoadc *adc = iio_priv(indio_dev);
0966 
0967     iio_device_unregister(indio_dev);
0968 
0969     regulator_disable(adc->vref);
0970 
0971     return 0;
0972 }
0973 
0974 static const struct xoadc_variant pm8018_variant = {
0975     .name = "PM8018-XOADC",
0976     .channels = pm8018_xoadc_channels,
0977 };
0978 
0979 static const struct xoadc_variant pm8038_variant = {
0980     .name = "PM8038-XOADC",
0981     .channels = pm8038_xoadc_channels,
0982 };
0983 
0984 static const struct xoadc_variant pm8058_variant = {
0985     .name = "PM8058-XOADC",
0986     .channels = pm8058_xoadc_channels,
0987     .broken_ratiometric = true,
0988     .prescaling = true,
0989 };
0990 
0991 static const struct xoadc_variant pm8921_variant = {
0992     .name = "PM8921-XOADC",
0993     .channels = pm8921_xoadc_channels,
0994     .second_level_mux = true,
0995 };
0996 
0997 static const struct of_device_id pm8xxx_xoadc_id_table[] = {
0998     {
0999         .compatible = "qcom,pm8018-adc",
1000         .data = &pm8018_variant,
1001     },
1002     {
1003         .compatible = "qcom,pm8038-adc",
1004         .data = &pm8038_variant,
1005     },
1006     {
1007         .compatible = "qcom,pm8058-adc",
1008         .data = &pm8058_variant,
1009     },
1010     {
1011         .compatible = "qcom,pm8921-adc",
1012         .data = &pm8921_variant,
1013     },
1014     { },
1015 };
1016 MODULE_DEVICE_TABLE(of, pm8xxx_xoadc_id_table);
1017 
1018 static struct platform_driver pm8xxx_xoadc_driver = {
1019     .driver     = {
1020         .name   = "pm8xxx-adc",
1021         .of_match_table = pm8xxx_xoadc_id_table,
1022     },
1023     .probe      = pm8xxx_xoadc_probe,
1024     .remove     = pm8xxx_xoadc_remove,
1025 };
1026 module_platform_driver(pm8xxx_xoadc_driver);
1027 
1028 MODULE_DESCRIPTION("PM8xxx XOADC driver");
1029 MODULE_LICENSE("GPL v2");
1030 MODULE_ALIAS("platform:pm8xxx-xoadc");
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