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0020 #include <linux/module.h>
0021 #include <linux/mod_devicetable.h>
0022 #include <linux/spi/spi.h>
0023 #include <linux/iio/iio.h>
0024 #include <linux/iio/buffer.h>
0025 #include <linux/iio/triggered_buffer.h>
0026 #include <linux/iio/trigger_consumer.h>
0027 #include <linux/regulator/consumer.h>
0028
0029 enum max1118_id {
0030 max1117,
0031 max1118,
0032 max1119,
0033 };
0034
0035 struct max1118 {
0036 struct spi_device *spi;
0037 struct mutex lock;
0038 struct regulator *reg;
0039
0040 struct {
0041 u8 channels[2];
0042 s64 ts __aligned(8);
0043 } scan;
0044
0045 u8 data __aligned(IIO_DMA_MINALIGN);
0046 };
0047
0048 #define MAX1118_CHANNEL(ch) \
0049 { \
0050 .type = IIO_VOLTAGE, \
0051 .indexed = 1, \
0052 .channel = (ch), \
0053 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0054 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0055 .scan_index = ch, \
0056 .scan_type = { \
0057 .sign = 'u', \
0058 .realbits = 8, \
0059 .storagebits = 8, \
0060 }, \
0061 }
0062
0063 static const struct iio_chan_spec max1118_channels[] = {
0064 MAX1118_CHANNEL(0),
0065 MAX1118_CHANNEL(1),
0066 IIO_CHAN_SOFT_TIMESTAMP(2),
0067 };
0068
0069 static int max1118_read(struct iio_dev *indio_dev, int channel)
0070 {
0071 struct max1118 *adc = iio_priv(indio_dev);
0072 struct spi_transfer xfers[] = {
0073
0074
0075
0076
0077 {
0078 .len = 0,
0079 .delay = {
0080 .value = 1,
0081 .unit = SPI_DELAY_UNIT_USECS
0082 },
0083 .cs_change = 1,
0084 },
0085
0086
0087
0088
0089
0090 {
0091 .len = 0,
0092 .delay = {
0093 .value = 8,
0094 .unit = SPI_DELAY_UNIT_USECS
0095 },
0096 },
0097 {
0098 .rx_buf = &adc->data,
0099 .len = 1,
0100 },
0101 };
0102 int ret;
0103
0104 if (channel == 0)
0105 ret = spi_sync_transfer(adc->spi, xfers + 1, 2);
0106 else
0107 ret = spi_sync_transfer(adc->spi, xfers, 3);
0108
0109 if (ret)
0110 return ret;
0111
0112 return adc->data;
0113 }
0114
0115 static int max1118_get_vref_mV(struct iio_dev *indio_dev)
0116 {
0117 struct max1118 *adc = iio_priv(indio_dev);
0118 const struct spi_device_id *id = spi_get_device_id(adc->spi);
0119 int vref_uV;
0120
0121 switch (id->driver_data) {
0122 case max1117:
0123 return 2048;
0124 case max1119:
0125 return 4096;
0126 case max1118:
0127 vref_uV = regulator_get_voltage(adc->reg);
0128 if (vref_uV < 0)
0129 return vref_uV;
0130 return vref_uV / 1000;
0131 }
0132
0133 return -ENODEV;
0134 }
0135
0136 static int max1118_read_raw(struct iio_dev *indio_dev,
0137 struct iio_chan_spec const *chan,
0138 int *val, int *val2, long mask)
0139 {
0140 struct max1118 *adc = iio_priv(indio_dev);
0141
0142 switch (mask) {
0143 case IIO_CHAN_INFO_RAW:
0144 mutex_lock(&adc->lock);
0145 *val = max1118_read(indio_dev, chan->channel);
0146 mutex_unlock(&adc->lock);
0147 if (*val < 0)
0148 return *val;
0149
0150 return IIO_VAL_INT;
0151 case IIO_CHAN_INFO_SCALE:
0152 *val = max1118_get_vref_mV(indio_dev);
0153 if (*val < 0)
0154 return *val;
0155 *val2 = 8;
0156
0157 return IIO_VAL_FRACTIONAL_LOG2;
0158 }
0159
0160 return -EINVAL;
0161 }
0162
0163 static const struct iio_info max1118_info = {
0164 .read_raw = max1118_read_raw,
0165 };
0166
0167 static irqreturn_t max1118_trigger_handler(int irq, void *p)
0168 {
0169 struct iio_poll_func *pf = p;
0170 struct iio_dev *indio_dev = pf->indio_dev;
0171 struct max1118 *adc = iio_priv(indio_dev);
0172 int scan_index;
0173 int i = 0;
0174
0175 mutex_lock(&adc->lock);
0176
0177 for_each_set_bit(scan_index, indio_dev->active_scan_mask,
0178 indio_dev->masklength) {
0179 const struct iio_chan_spec *scan_chan =
0180 &indio_dev->channels[scan_index];
0181 int ret = max1118_read(indio_dev, scan_chan->channel);
0182
0183 if (ret < 0) {
0184 dev_warn(&adc->spi->dev,
0185 "failed to get conversion data\n");
0186 goto out;
0187 }
0188
0189 adc->scan.channels[i] = ret;
0190 i++;
0191 }
0192 iio_push_to_buffers_with_timestamp(indio_dev, &adc->scan,
0193 iio_get_time_ns(indio_dev));
0194 out:
0195 mutex_unlock(&adc->lock);
0196
0197 iio_trigger_notify_done(indio_dev->trig);
0198
0199 return IRQ_HANDLED;
0200 }
0201
0202 static void max1118_reg_disable(void *reg)
0203 {
0204 regulator_disable(reg);
0205 }
0206
0207 static int max1118_probe(struct spi_device *spi)
0208 {
0209 struct iio_dev *indio_dev;
0210 struct max1118 *adc;
0211 const struct spi_device_id *id = spi_get_device_id(spi);
0212 int ret;
0213
0214 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc));
0215 if (!indio_dev)
0216 return -ENOMEM;
0217
0218 adc = iio_priv(indio_dev);
0219 adc->spi = spi;
0220 mutex_init(&adc->lock);
0221
0222 if (id->driver_data == max1118) {
0223 adc->reg = devm_regulator_get(&spi->dev, "vref");
0224 if (IS_ERR(adc->reg))
0225 return dev_err_probe(&spi->dev, PTR_ERR(adc->reg),
0226 "failed to get vref regulator\n");
0227 ret = regulator_enable(adc->reg);
0228 if (ret)
0229 return ret;
0230
0231 ret = devm_add_action_or_reset(&spi->dev, max1118_reg_disable,
0232 adc->reg);
0233 if (ret)
0234 return ret;
0235
0236 }
0237
0238 indio_dev->name = spi_get_device_id(spi)->name;
0239 indio_dev->info = &max1118_info;
0240 indio_dev->modes = INDIO_DIRECT_MODE;
0241 indio_dev->channels = max1118_channels;
0242 indio_dev->num_channels = ARRAY_SIZE(max1118_channels);
0243
0244
0245
0246
0247
0248
0249
0250 max1118_read(indio_dev, 0);
0251
0252 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
0253 max1118_trigger_handler, NULL);
0254 if (ret)
0255 return ret;
0256
0257 return devm_iio_device_register(&spi->dev, indio_dev);
0258 }
0259
0260 static const struct spi_device_id max1118_id[] = {
0261 { "max1117", max1117 },
0262 { "max1118", max1118 },
0263 { "max1119", max1119 },
0264 {}
0265 };
0266 MODULE_DEVICE_TABLE(spi, max1118_id);
0267
0268 static const struct of_device_id max1118_dt_ids[] = {
0269 { .compatible = "maxim,max1117" },
0270 { .compatible = "maxim,max1118" },
0271 { .compatible = "maxim,max1119" },
0272 {},
0273 };
0274 MODULE_DEVICE_TABLE(of, max1118_dt_ids);
0275
0276 static struct spi_driver max1118_spi_driver = {
0277 .driver = {
0278 .name = "max1118",
0279 .of_match_table = max1118_dt_ids,
0280 },
0281 .probe = max1118_probe,
0282 .id_table = max1118_id,
0283 };
0284 module_spi_driver(max1118_spi_driver);
0285
0286 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>");
0287 MODULE_DESCRIPTION("MAXIM MAX1117/MAX1118/MAX1119 ADCs driver");
0288 MODULE_LICENSE("GPL v2");