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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * iio/adc/ad799x.c
0004  * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
0005  *
0006  * based on iio/adc/max1363
0007  * Copyright (C) 2008-2010 Jonathan Cameron
0008  *
0009  * based on linux/drivers/i2c/chips/max123x
0010  * Copyright (C) 2002-2004 Stefan Eletzhofer
0011  *
0012  * based on linux/drivers/acron/char/pcf8583.c
0013  * Copyright (C) 2000 Russell King
0014  *
0015  * ad799x.c
0016  *
0017  * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
0018  * ad7998 and similar chips.
0019  */
0020 
0021 #include <linux/interrupt.h>
0022 #include <linux/device.h>
0023 #include <linux/kernel.h>
0024 #include <linux/sysfs.h>
0025 #include <linux/i2c.h>
0026 #include <linux/regulator/consumer.h>
0027 #include <linux/slab.h>
0028 #include <linux/types.h>
0029 #include <linux/err.h>
0030 #include <linux/module.h>
0031 #include <linux/bitops.h>
0032 
0033 #include <linux/iio/iio.h>
0034 #include <linux/iio/sysfs.h>
0035 #include <linux/iio/events.h>
0036 #include <linux/iio/buffer.h>
0037 #include <linux/iio/trigger_consumer.h>
0038 #include <linux/iio/triggered_buffer.h>
0039 
0040 #define AD799X_CHANNEL_SHIFT            4
0041 
0042 /*
0043  * AD7991, AD7995 and AD7999 defines
0044  */
0045 
0046 #define AD7991_REF_SEL              0x08
0047 #define AD7991_FLTR             0x04
0048 #define AD7991_BIT_TRIAL_DELAY          0x02
0049 #define AD7991_SAMPLE_DELAY         0x01
0050 
0051 /*
0052  * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
0053  */
0054 
0055 #define AD7998_FLTR             BIT(3)
0056 #define AD7998_ALERT_EN             BIT(2)
0057 #define AD7998_BUSY_ALERT           BIT(1)
0058 #define AD7998_BUSY_ALERT_POL           BIT(0)
0059 
0060 #define AD7998_CONV_RES_REG         0x0
0061 #define AD7998_ALERT_STAT_REG           0x1
0062 #define AD7998_CONF_REG             0x2
0063 #define AD7998_CYCLE_TMR_REG            0x3
0064 
0065 #define AD7998_DATALOW_REG(x)           ((x) * 3 + 0x4)
0066 #define AD7998_DATAHIGH_REG(x)          ((x) * 3 + 0x5)
0067 #define AD7998_HYST_REG(x)          ((x) * 3 + 0x6)
0068 
0069 #define AD7998_CYC_MASK             GENMASK(2, 0)
0070 #define AD7998_CYC_DIS              0x0
0071 #define AD7998_CYC_TCONF_32         0x1
0072 #define AD7998_CYC_TCONF_64         0x2
0073 #define AD7998_CYC_TCONF_128            0x3
0074 #define AD7998_CYC_TCONF_256            0x4
0075 #define AD7998_CYC_TCONF_512            0x5
0076 #define AD7998_CYC_TCONF_1024           0x6
0077 #define AD7998_CYC_TCONF_2048           0x7
0078 
0079 #define AD7998_ALERT_STAT_CLEAR         0xFF
0080 
0081 /*
0082  * AD7997 and AD7997 defines
0083  */
0084 
0085 #define AD7997_8_READ_SINGLE            BIT(7)
0086 #define AD7997_8_READ_SEQUENCE          (BIT(6) | BIT(5) | BIT(4))
0087 
0088 enum {
0089     ad7991,
0090     ad7995,
0091     ad7999,
0092     ad7992,
0093     ad7993,
0094     ad7994,
0095     ad7997,
0096     ad7998
0097 };
0098 
0099 /**
0100  * struct ad799x_chip_config - chip specific information
0101  * @channel:        channel specification
0102  * @default_config: device default configuration
0103  * @info:       pointer to iio_info struct
0104  */
0105 struct ad799x_chip_config {
0106     const struct iio_chan_spec  channel[9];
0107     u16             default_config;
0108     const struct iio_info       *info;
0109 };
0110 
0111 /**
0112  * struct ad799x_chip_info - chip specific information
0113  * @num_channels:   number of channels
0114  * @noirq_config:   device configuration w/o IRQ
0115  * @irq_config:     device configuration w/IRQ
0116  */
0117 struct ad799x_chip_info {
0118     int             num_channels;
0119     const struct ad799x_chip_config noirq_config;
0120     const struct ad799x_chip_config irq_config;
0121 };
0122 
0123 struct ad799x_state {
0124     struct i2c_client       *client;
0125     const struct ad799x_chip_config *chip_config;
0126     struct regulator        *reg;
0127     struct regulator        *vref;
0128     unsigned            id;
0129     u16             config;
0130 
0131     u8              *rx_buf;
0132     unsigned int            transfer_size;
0133 };
0134 
0135 static int ad799x_write_config(struct ad799x_state *st, u16 val)
0136 {
0137     switch (st->id) {
0138     case ad7997:
0139     case ad7998:
0140         return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
0141             val);
0142     case ad7992:
0143     case ad7993:
0144     case ad7994:
0145         return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
0146             val);
0147     default:
0148         /* Will be written when doing a conversion */
0149         st->config = val;
0150         return 0;
0151     }
0152 }
0153 
0154 static int ad799x_read_config(struct ad799x_state *st)
0155 {
0156     switch (st->id) {
0157     case ad7997:
0158     case ad7998:
0159         return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
0160     case ad7992:
0161     case ad7993:
0162     case ad7994:
0163         return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
0164     default:
0165         /* No readback support */
0166         return st->config;
0167     }
0168 }
0169 
0170 static int ad799x_update_config(struct ad799x_state *st, u16 config)
0171 {
0172     int ret;
0173 
0174     ret = ad799x_write_config(st, config);
0175     if (ret < 0)
0176         return ret;
0177     ret = ad799x_read_config(st);
0178     if (ret < 0)
0179         return ret;
0180     st->config = ret;
0181 
0182     return 0;
0183 }
0184 
0185 static irqreturn_t ad799x_trigger_handler(int irq, void *p)
0186 {
0187     struct iio_poll_func *pf = p;
0188     struct iio_dev *indio_dev = pf->indio_dev;
0189     struct ad799x_state *st = iio_priv(indio_dev);
0190     int b_sent;
0191     u8 cmd;
0192 
0193     switch (st->id) {
0194     case ad7991:
0195     case ad7995:
0196     case ad7999:
0197         cmd = st->config |
0198             (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
0199         break;
0200     case ad7992:
0201     case ad7993:
0202     case ad7994:
0203         cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
0204             AD7998_CONV_RES_REG;
0205         break;
0206     case ad7997:
0207     case ad7998:
0208         cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
0209         break;
0210     default:
0211         cmd = 0;
0212     }
0213 
0214     b_sent = i2c_smbus_read_i2c_block_data(st->client,
0215             cmd, st->transfer_size, st->rx_buf);
0216     if (b_sent < 0)
0217         goto out;
0218 
0219     iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
0220             iio_get_time_ns(indio_dev));
0221 out:
0222     iio_trigger_notify_done(indio_dev->trig);
0223 
0224     return IRQ_HANDLED;
0225 }
0226 
0227 static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
0228     const unsigned long *scan_mask)
0229 {
0230     struct ad799x_state *st = iio_priv(indio_dev);
0231 
0232     kfree(st->rx_buf);
0233     st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
0234     if (!st->rx_buf)
0235         return -ENOMEM;
0236 
0237     st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
0238 
0239     switch (st->id) {
0240     case ad7992:
0241     case ad7993:
0242     case ad7994:
0243     case ad7997:
0244     case ad7998:
0245         st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
0246         st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
0247         return ad799x_write_config(st, st->config);
0248     default:
0249         return 0;
0250     }
0251 }
0252 
0253 static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
0254 {
0255     u8 cmd;
0256 
0257     switch (st->id) {
0258     case ad7991:
0259     case ad7995:
0260     case ad7999:
0261         cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
0262         break;
0263     case ad7992:
0264     case ad7993:
0265     case ad7994:
0266         cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
0267         break;
0268     case ad7997:
0269     case ad7998:
0270         cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
0271         break;
0272     default:
0273         return -EINVAL;
0274     }
0275 
0276     return i2c_smbus_read_word_swapped(st->client, cmd);
0277 }
0278 
0279 static int ad799x_read_raw(struct iio_dev *indio_dev,
0280                struct iio_chan_spec const *chan,
0281                int *val,
0282                int *val2,
0283                long m)
0284 {
0285     int ret;
0286     struct ad799x_state *st = iio_priv(indio_dev);
0287 
0288     switch (m) {
0289     case IIO_CHAN_INFO_RAW:
0290         ret = iio_device_claim_direct_mode(indio_dev);
0291         if (ret)
0292             return ret;
0293         ret = ad799x_scan_direct(st, chan->scan_index);
0294         iio_device_release_direct_mode(indio_dev);
0295 
0296         if (ret < 0)
0297             return ret;
0298         *val = (ret >> chan->scan_type.shift) &
0299             GENMASK(chan->scan_type.realbits - 1, 0);
0300         return IIO_VAL_INT;
0301     case IIO_CHAN_INFO_SCALE:
0302         if (st->vref)
0303             ret = regulator_get_voltage(st->vref);
0304         else
0305             ret = regulator_get_voltage(st->reg);
0306 
0307         if (ret < 0)
0308             return ret;
0309         *val = ret / 1000;
0310         *val2 = chan->scan_type.realbits;
0311         return IIO_VAL_FRACTIONAL_LOG2;
0312     }
0313     return -EINVAL;
0314 }
0315 static const unsigned int ad7998_frequencies[] = {
0316     [AD7998_CYC_DIS]    = 0,
0317     [AD7998_CYC_TCONF_32]   = 15625,
0318     [AD7998_CYC_TCONF_64]   = 7812,
0319     [AD7998_CYC_TCONF_128]  = 3906,
0320     [AD7998_CYC_TCONF_512]  = 976,
0321     [AD7998_CYC_TCONF_1024] = 488,
0322     [AD7998_CYC_TCONF_2048] = 244,
0323 };
0324 
0325 static ssize_t ad799x_read_frequency(struct device *dev,
0326                     struct device_attribute *attr,
0327                     char *buf)
0328 {
0329     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0330     struct ad799x_state *st = iio_priv(indio_dev);
0331 
0332     int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
0333     if (ret < 0)
0334         return ret;
0335 
0336     return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
0337 }
0338 
0339 static ssize_t ad799x_write_frequency(struct device *dev,
0340                      struct device_attribute *attr,
0341                      const char *buf,
0342                      size_t len)
0343 {
0344     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0345     struct ad799x_state *st = iio_priv(indio_dev);
0346 
0347     long val;
0348     int ret, i;
0349 
0350     ret = kstrtol(buf, 10, &val);
0351     if (ret)
0352         return ret;
0353 
0354     mutex_lock(&indio_dev->mlock);
0355     ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
0356     if (ret < 0)
0357         goto error_ret_mutex;
0358     /* Wipe the bits clean */
0359     ret &= ~AD7998_CYC_MASK;
0360 
0361     for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
0362         if (val == ad7998_frequencies[i])
0363             break;
0364     if (i == ARRAY_SIZE(ad7998_frequencies)) {
0365         ret = -EINVAL;
0366         goto error_ret_mutex;
0367     }
0368 
0369     ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
0370         ret | i);
0371     if (ret < 0)
0372         goto error_ret_mutex;
0373     ret = len;
0374 
0375 error_ret_mutex:
0376     mutex_unlock(&indio_dev->mlock);
0377 
0378     return ret;
0379 }
0380 
0381 static int ad799x_read_event_config(struct iio_dev *indio_dev,
0382                     const struct iio_chan_spec *chan,
0383                     enum iio_event_type type,
0384                     enum iio_event_direction dir)
0385 {
0386     struct ad799x_state *st = iio_priv(indio_dev);
0387 
0388     if (!(st->config & AD7998_ALERT_EN))
0389         return 0;
0390 
0391     if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
0392         return 1;
0393 
0394     return 0;
0395 }
0396 
0397 static int ad799x_write_event_config(struct iio_dev *indio_dev,
0398                      const struct iio_chan_spec *chan,
0399                      enum iio_event_type type,
0400                      enum iio_event_direction dir,
0401                      int state)
0402 {
0403     struct ad799x_state *st = iio_priv(indio_dev);
0404     int ret;
0405 
0406     ret = iio_device_claim_direct_mode(indio_dev);
0407     if (ret)
0408         return ret;
0409 
0410     if (state)
0411         st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
0412     else
0413         st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
0414 
0415     if (st->config >> AD799X_CHANNEL_SHIFT)
0416         st->config |= AD7998_ALERT_EN;
0417     else
0418         st->config &= ~AD7998_ALERT_EN;
0419 
0420     ret = ad799x_write_config(st, st->config);
0421     iio_device_release_direct_mode(indio_dev);
0422     return ret;
0423 }
0424 
0425 static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
0426                      enum iio_event_direction dir,
0427                      enum iio_event_info info)
0428 {
0429     switch (info) {
0430     case IIO_EV_INFO_VALUE:
0431         if (dir == IIO_EV_DIR_FALLING)
0432             return AD7998_DATALOW_REG(chan->channel);
0433         else
0434             return AD7998_DATAHIGH_REG(chan->channel);
0435     case IIO_EV_INFO_HYSTERESIS:
0436         return AD7998_HYST_REG(chan->channel);
0437     default:
0438         return -EINVAL;
0439     }
0440 
0441     return 0;
0442 }
0443 
0444 static int ad799x_write_event_value(struct iio_dev *indio_dev,
0445                     const struct iio_chan_spec *chan,
0446                     enum iio_event_type type,
0447                     enum iio_event_direction dir,
0448                     enum iio_event_info info,
0449                     int val, int val2)
0450 {
0451     int ret;
0452     struct ad799x_state *st = iio_priv(indio_dev);
0453 
0454     if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
0455         return -EINVAL;
0456 
0457     mutex_lock(&indio_dev->mlock);
0458     ret = i2c_smbus_write_word_swapped(st->client,
0459         ad799x_threshold_reg(chan, dir, info),
0460         val << chan->scan_type.shift);
0461     mutex_unlock(&indio_dev->mlock);
0462 
0463     return ret;
0464 }
0465 
0466 static int ad799x_read_event_value(struct iio_dev *indio_dev,
0467                     const struct iio_chan_spec *chan,
0468                     enum iio_event_type type,
0469                     enum iio_event_direction dir,
0470                     enum iio_event_info info,
0471                     int *val, int *val2)
0472 {
0473     int ret;
0474     struct ad799x_state *st = iio_priv(indio_dev);
0475 
0476     mutex_lock(&indio_dev->mlock);
0477     ret = i2c_smbus_read_word_swapped(st->client,
0478         ad799x_threshold_reg(chan, dir, info));
0479     mutex_unlock(&indio_dev->mlock);
0480     if (ret < 0)
0481         return ret;
0482     *val = (ret >> chan->scan_type.shift) &
0483         GENMASK(chan->scan_type.realbits - 1, 0);
0484 
0485     return IIO_VAL_INT;
0486 }
0487 
0488 static irqreturn_t ad799x_event_handler(int irq, void *private)
0489 {
0490     struct iio_dev *indio_dev = private;
0491     struct ad799x_state *st = iio_priv(private);
0492     int i, ret;
0493 
0494     ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
0495     if (ret <= 0)
0496         goto done;
0497 
0498     if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
0499         AD7998_ALERT_STAT_CLEAR) < 0)
0500         goto done;
0501 
0502     for (i = 0; i < 8; i++) {
0503         if (ret & BIT(i))
0504             iio_push_event(indio_dev,
0505                        i & 0x1 ?
0506                        IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
0507                                 (i >> 1),
0508                                 IIO_EV_TYPE_THRESH,
0509                                 IIO_EV_DIR_RISING) :
0510                        IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
0511                                 (i >> 1),
0512                                 IIO_EV_TYPE_THRESH,
0513                                 IIO_EV_DIR_FALLING),
0514                        iio_get_time_ns(indio_dev));
0515     }
0516 
0517 done:
0518     return IRQ_HANDLED;
0519 }
0520 
0521 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
0522                   ad799x_read_frequency,
0523                   ad799x_write_frequency);
0524 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
0525 
0526 static struct attribute *ad799x_event_attributes[] = {
0527     &iio_dev_attr_sampling_frequency.dev_attr.attr,
0528     &iio_const_attr_sampling_frequency_available.dev_attr.attr,
0529     NULL,
0530 };
0531 
0532 static const struct attribute_group ad799x_event_attrs_group = {
0533     .attrs = ad799x_event_attributes,
0534 };
0535 
0536 static const struct iio_info ad7991_info = {
0537     .read_raw = &ad799x_read_raw,
0538     .update_scan_mode = ad799x_update_scan_mode,
0539 };
0540 
0541 static const struct iio_info ad7993_4_7_8_noirq_info = {
0542     .read_raw = &ad799x_read_raw,
0543     .update_scan_mode = ad799x_update_scan_mode,
0544 };
0545 
0546 static const struct iio_info ad7993_4_7_8_irq_info = {
0547     .read_raw = &ad799x_read_raw,
0548     .event_attrs = &ad799x_event_attrs_group,
0549     .read_event_config = &ad799x_read_event_config,
0550     .write_event_config = &ad799x_write_event_config,
0551     .read_event_value = &ad799x_read_event_value,
0552     .write_event_value = &ad799x_write_event_value,
0553     .update_scan_mode = ad799x_update_scan_mode,
0554 };
0555 
0556 static const struct iio_event_spec ad799x_events[] = {
0557     {
0558         .type = IIO_EV_TYPE_THRESH,
0559         .dir = IIO_EV_DIR_RISING,
0560         .mask_separate = BIT(IIO_EV_INFO_VALUE) |
0561             BIT(IIO_EV_INFO_ENABLE),
0562     }, {
0563         .type = IIO_EV_TYPE_THRESH,
0564         .dir = IIO_EV_DIR_FALLING,
0565         .mask_separate = BIT(IIO_EV_INFO_VALUE) |
0566             BIT(IIO_EV_INFO_ENABLE),
0567     }, {
0568         .type = IIO_EV_TYPE_THRESH,
0569         .dir = IIO_EV_DIR_EITHER,
0570         .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
0571     },
0572 };
0573 
0574 #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
0575     .type = IIO_VOLTAGE, \
0576     .indexed = 1, \
0577     .channel = (_index), \
0578     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0579     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0580     .scan_index = (_index), \
0581     .scan_type = { \
0582         .sign = 'u', \
0583         .realbits = (_realbits), \
0584         .storagebits = 16, \
0585         .shift = 12 - (_realbits), \
0586         .endianness = IIO_BE, \
0587     }, \
0588     .event_spec = _ev_spec, \
0589     .num_event_specs = _num_ev_spec, \
0590 }
0591 
0592 #define AD799X_CHANNEL(_index, _realbits) \
0593     _AD799X_CHANNEL(_index, _realbits, NULL, 0)
0594 
0595 #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
0596     _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
0597         ARRAY_SIZE(ad799x_events))
0598 
0599 static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
0600     [ad7991] = {
0601         .num_channels = 5,
0602         .noirq_config = {
0603             .channel = {
0604                 AD799X_CHANNEL(0, 12),
0605                 AD799X_CHANNEL(1, 12),
0606                 AD799X_CHANNEL(2, 12),
0607                 AD799X_CHANNEL(3, 12),
0608                 IIO_CHAN_SOFT_TIMESTAMP(4),
0609             },
0610             .info = &ad7991_info,
0611         },
0612     },
0613     [ad7995] = {
0614         .num_channels = 5,
0615         .noirq_config = {
0616             .channel = {
0617                 AD799X_CHANNEL(0, 10),
0618                 AD799X_CHANNEL(1, 10),
0619                 AD799X_CHANNEL(2, 10),
0620                 AD799X_CHANNEL(3, 10),
0621                 IIO_CHAN_SOFT_TIMESTAMP(4),
0622             },
0623             .info = &ad7991_info,
0624         },
0625     },
0626     [ad7999] = {
0627         .num_channels = 5,
0628         .noirq_config = {
0629             .channel = {
0630                 AD799X_CHANNEL(0, 8),
0631                 AD799X_CHANNEL(1, 8),
0632                 AD799X_CHANNEL(2, 8),
0633                 AD799X_CHANNEL(3, 8),
0634                 IIO_CHAN_SOFT_TIMESTAMP(4),
0635             },
0636             .info = &ad7991_info,
0637         },
0638     },
0639     [ad7992] = {
0640         .num_channels = 3,
0641         .noirq_config = {
0642             .channel = {
0643                 AD799X_CHANNEL(0, 12),
0644                 AD799X_CHANNEL(1, 12),
0645                 IIO_CHAN_SOFT_TIMESTAMP(3),
0646             },
0647             .info = &ad7993_4_7_8_noirq_info,
0648         },
0649         .irq_config = {
0650             .channel = {
0651                 AD799X_CHANNEL_WITH_EVENTS(0, 12),
0652                 AD799X_CHANNEL_WITH_EVENTS(1, 12),
0653                 IIO_CHAN_SOFT_TIMESTAMP(3),
0654             },
0655             .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
0656             .info = &ad7993_4_7_8_irq_info,
0657         },
0658     },
0659     [ad7993] = {
0660         .num_channels = 5,
0661         .noirq_config = {
0662             .channel = {
0663                 AD799X_CHANNEL(0, 10),
0664                 AD799X_CHANNEL(1, 10),
0665                 AD799X_CHANNEL(2, 10),
0666                 AD799X_CHANNEL(3, 10),
0667                 IIO_CHAN_SOFT_TIMESTAMP(4),
0668             },
0669             .info = &ad7993_4_7_8_noirq_info,
0670         },
0671         .irq_config = {
0672             .channel = {
0673                 AD799X_CHANNEL_WITH_EVENTS(0, 10),
0674                 AD799X_CHANNEL_WITH_EVENTS(1, 10),
0675                 AD799X_CHANNEL_WITH_EVENTS(2, 10),
0676                 AD799X_CHANNEL_WITH_EVENTS(3, 10),
0677                 IIO_CHAN_SOFT_TIMESTAMP(4),
0678             },
0679             .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
0680             .info = &ad7993_4_7_8_irq_info,
0681         },
0682     },
0683     [ad7994] = {
0684         .num_channels = 5,
0685         .noirq_config = {
0686             .channel = {
0687                 AD799X_CHANNEL(0, 12),
0688                 AD799X_CHANNEL(1, 12),
0689                 AD799X_CHANNEL(2, 12),
0690                 AD799X_CHANNEL(3, 12),
0691                 IIO_CHAN_SOFT_TIMESTAMP(4),
0692             },
0693             .info = &ad7993_4_7_8_noirq_info,
0694         },
0695         .irq_config = {
0696             .channel = {
0697                 AD799X_CHANNEL_WITH_EVENTS(0, 12),
0698                 AD799X_CHANNEL_WITH_EVENTS(1, 12),
0699                 AD799X_CHANNEL_WITH_EVENTS(2, 12),
0700                 AD799X_CHANNEL_WITH_EVENTS(3, 12),
0701                 IIO_CHAN_SOFT_TIMESTAMP(4),
0702             },
0703             .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
0704             .info = &ad7993_4_7_8_irq_info,
0705         },
0706     },
0707     [ad7997] = {
0708         .num_channels = 9,
0709         .noirq_config = {
0710             .channel = {
0711                 AD799X_CHANNEL(0, 10),
0712                 AD799X_CHANNEL(1, 10),
0713                 AD799X_CHANNEL(2, 10),
0714                 AD799X_CHANNEL(3, 10),
0715                 AD799X_CHANNEL(4, 10),
0716                 AD799X_CHANNEL(5, 10),
0717                 AD799X_CHANNEL(6, 10),
0718                 AD799X_CHANNEL(7, 10),
0719                 IIO_CHAN_SOFT_TIMESTAMP(8),
0720             },
0721             .info = &ad7993_4_7_8_noirq_info,
0722         },
0723         .irq_config = {
0724             .channel = {
0725                 AD799X_CHANNEL_WITH_EVENTS(0, 10),
0726                 AD799X_CHANNEL_WITH_EVENTS(1, 10),
0727                 AD799X_CHANNEL_WITH_EVENTS(2, 10),
0728                 AD799X_CHANNEL_WITH_EVENTS(3, 10),
0729                 AD799X_CHANNEL(4, 10),
0730                 AD799X_CHANNEL(5, 10),
0731                 AD799X_CHANNEL(6, 10),
0732                 AD799X_CHANNEL(7, 10),
0733                 IIO_CHAN_SOFT_TIMESTAMP(8),
0734             },
0735             .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
0736             .info = &ad7993_4_7_8_irq_info,
0737         },
0738     },
0739     [ad7998] = {
0740         .num_channels = 9,
0741         .noirq_config = {
0742             .channel = {
0743                 AD799X_CHANNEL(0, 12),
0744                 AD799X_CHANNEL(1, 12),
0745                 AD799X_CHANNEL(2, 12),
0746                 AD799X_CHANNEL(3, 12),
0747                 AD799X_CHANNEL(4, 12),
0748                 AD799X_CHANNEL(5, 12),
0749                 AD799X_CHANNEL(6, 12),
0750                 AD799X_CHANNEL(7, 12),
0751                 IIO_CHAN_SOFT_TIMESTAMP(8),
0752             },
0753             .info = &ad7993_4_7_8_noirq_info,
0754         },
0755         .irq_config = {
0756             .channel = {
0757                 AD799X_CHANNEL_WITH_EVENTS(0, 12),
0758                 AD799X_CHANNEL_WITH_EVENTS(1, 12),
0759                 AD799X_CHANNEL_WITH_EVENTS(2, 12),
0760                 AD799X_CHANNEL_WITH_EVENTS(3, 12),
0761                 AD799X_CHANNEL(4, 12),
0762                 AD799X_CHANNEL(5, 12),
0763                 AD799X_CHANNEL(6, 12),
0764                 AD799X_CHANNEL(7, 12),
0765                 IIO_CHAN_SOFT_TIMESTAMP(8),
0766             },
0767             .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
0768             .info = &ad7993_4_7_8_irq_info,
0769         },
0770     },
0771 };
0772 
0773 static int ad799x_probe(struct i2c_client *client,
0774                    const struct i2c_device_id *id)
0775 {
0776     int ret;
0777     int extra_config = 0;
0778     struct ad799x_state *st;
0779     struct iio_dev *indio_dev;
0780     const struct ad799x_chip_info *chip_info =
0781         &ad799x_chip_info_tbl[id->driver_data];
0782 
0783     indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
0784     if (indio_dev == NULL)
0785         return -ENOMEM;
0786 
0787     st = iio_priv(indio_dev);
0788     /* this is only used for device removal purposes */
0789     i2c_set_clientdata(client, indio_dev);
0790 
0791     st->id = id->driver_data;
0792     if (client->irq > 0 && chip_info->irq_config.info)
0793         st->chip_config = &chip_info->irq_config;
0794     else
0795         st->chip_config = &chip_info->noirq_config;
0796 
0797     /* TODO: Add pdata options for filtering and bit delay */
0798 
0799     st->reg = devm_regulator_get(&client->dev, "vcc");
0800     if (IS_ERR(st->reg))
0801         return PTR_ERR(st->reg);
0802     ret = regulator_enable(st->reg);
0803     if (ret)
0804         return ret;
0805 
0806     /* check if an external reference is supplied */
0807     st->vref = devm_regulator_get_optional(&client->dev, "vref");
0808 
0809     if (IS_ERR(st->vref)) {
0810         if (PTR_ERR(st->vref) == -ENODEV) {
0811             st->vref = NULL;
0812             dev_info(&client->dev, "Using VCC reference voltage\n");
0813         } else {
0814             ret = PTR_ERR(st->vref);
0815             goto error_disable_reg;
0816         }
0817     }
0818 
0819     if (st->vref) {
0820         /*
0821          * Use external reference voltage if supported by hardware.
0822          * This is optional if voltage / regulator present, use VCC otherwise.
0823          */
0824         if ((st->id == ad7991) || (st->id == ad7995) || (st->id == ad7999)) {
0825             dev_info(&client->dev, "Using external reference voltage\n");
0826             extra_config |= AD7991_REF_SEL;
0827             ret = regulator_enable(st->vref);
0828             if (ret)
0829                 goto error_disable_reg;
0830         } else {
0831             st->vref = NULL;
0832             dev_warn(&client->dev, "Supplied reference not supported\n");
0833         }
0834     }
0835 
0836     st->client = client;
0837 
0838     indio_dev->name = id->name;
0839     indio_dev->info = st->chip_config->info;
0840 
0841     indio_dev->modes = INDIO_DIRECT_MODE;
0842     indio_dev->channels = st->chip_config->channel;
0843     indio_dev->num_channels = chip_info->num_channels;
0844 
0845     ret = ad799x_update_config(st, st->chip_config->default_config | extra_config);
0846     if (ret)
0847         goto error_disable_vref;
0848 
0849     ret = iio_triggered_buffer_setup(indio_dev, NULL,
0850         &ad799x_trigger_handler, NULL);
0851     if (ret)
0852         goto error_disable_vref;
0853 
0854     if (client->irq > 0) {
0855         ret = devm_request_threaded_irq(&client->dev,
0856                         client->irq,
0857                         NULL,
0858                         ad799x_event_handler,
0859                         IRQF_TRIGGER_FALLING |
0860                         IRQF_ONESHOT,
0861                         client->name,
0862                         indio_dev);
0863         if (ret)
0864             goto error_cleanup_ring;
0865     }
0866     ret = iio_device_register(indio_dev);
0867     if (ret)
0868         goto error_cleanup_ring;
0869 
0870     return 0;
0871 
0872 error_cleanup_ring:
0873     iio_triggered_buffer_cleanup(indio_dev);
0874 error_disable_vref:
0875     if (st->vref)
0876         regulator_disable(st->vref);
0877 error_disable_reg:
0878     regulator_disable(st->reg);
0879 
0880     return ret;
0881 }
0882 
0883 static int ad799x_remove(struct i2c_client *client)
0884 {
0885     struct iio_dev *indio_dev = i2c_get_clientdata(client);
0886     struct ad799x_state *st = iio_priv(indio_dev);
0887 
0888     iio_device_unregister(indio_dev);
0889 
0890     iio_triggered_buffer_cleanup(indio_dev);
0891     if (st->vref)
0892         regulator_disable(st->vref);
0893     regulator_disable(st->reg);
0894     kfree(st->rx_buf);
0895 
0896     return 0;
0897 }
0898 
0899 static int ad799x_suspend(struct device *dev)
0900 {
0901     struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
0902     struct ad799x_state *st = iio_priv(indio_dev);
0903 
0904     if (st->vref)
0905         regulator_disable(st->vref);
0906     regulator_disable(st->reg);
0907 
0908     return 0;
0909 }
0910 
0911 static int ad799x_resume(struct device *dev)
0912 {
0913     struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
0914     struct ad799x_state *st = iio_priv(indio_dev);
0915     int ret;
0916 
0917     ret = regulator_enable(st->reg);
0918     if (ret) {
0919         dev_err(dev, "Unable to enable vcc regulator\n");
0920         return ret;
0921     }
0922 
0923     if (st->vref) {
0924         ret = regulator_enable(st->vref);
0925         if (ret) {
0926             regulator_disable(st->reg);
0927             dev_err(dev, "Unable to enable vref regulator\n");
0928             return ret;
0929         }
0930     }
0931 
0932     /* resync config */
0933     ret = ad799x_update_config(st, st->config);
0934     if (ret) {
0935         if (st->vref)
0936             regulator_disable(st->vref);
0937         regulator_disable(st->reg);
0938         return ret;
0939     }
0940 
0941     return 0;
0942 }
0943 
0944 static DEFINE_SIMPLE_DEV_PM_OPS(ad799x_pm_ops, ad799x_suspend, ad799x_resume);
0945 
0946 static const struct i2c_device_id ad799x_id[] = {
0947     { "ad7991", ad7991 },
0948     { "ad7995", ad7995 },
0949     { "ad7999", ad7999 },
0950     { "ad7992", ad7992 },
0951     { "ad7993", ad7993 },
0952     { "ad7994", ad7994 },
0953     { "ad7997", ad7997 },
0954     { "ad7998", ad7998 },
0955     {}
0956 };
0957 
0958 MODULE_DEVICE_TABLE(i2c, ad799x_id);
0959 
0960 static struct i2c_driver ad799x_driver = {
0961     .driver = {
0962         .name = "ad799x",
0963         .pm = pm_sleep_ptr(&ad799x_pm_ops),
0964     },
0965     .probe = ad799x_probe,
0966     .remove = ad799x_remove,
0967     .id_table = ad799x_id,
0968 };
0969 module_i2c_driver(ad799x_driver);
0970 
0971 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0972 MODULE_DESCRIPTION("Analog Devices AD799x ADC");
0973 MODULE_LICENSE("GPL v2");
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