iio/adc/ad7887.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AD7887 SPI ADC driver
0004  *
0005  * Copyright 2010-2011 Analog Devices Inc.
0006  */
0007
0008 #include <linux/device.h>
0009 #include <linux/kernel.h>
0010 #include <linux/slab.h>
0011 #include <linux/sysfs.h>
0012 #include <linux/spi/spi.h>
0013 #include <linux/regulator/consumer.h>
0014 #include <linux/err.h>
0015 #include <linux/module.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/bitops.h>
0018
0019 #include <linux/iio/iio.h>
0020 #include <linux/iio/sysfs.h>
0021 #include <linux/iio/buffer.h>
0022
0023 #include <linux/iio/trigger_consumer.h>
0024 #include <linux/iio/triggered_buffer.h>
0025
0026 #include <linux/platform_data/ad7887.h>
0027
0028 #define AD7887_REF_DIS      BIT(5)  /* on-chip reference disable */
0029 #define AD7887_DUAL     BIT(4)  /* dual-channel mode */
0030 #define AD7887_CH_AIN1      BIT(3)  /* convert on channel 1, DUAL=1 */
0031 #define AD7887_CH_AIN0      0   /* convert on channel 0, DUAL=0,1 */
0032 #define AD7887_PM_MODE1     0   /* CS based shutdown */
0033 #define AD7887_PM_MODE2     1   /* full on */
0034 #define AD7887_PM_MODE3     2   /* auto shutdown after conversion */
0035 #define AD7887_PM_MODE4     3   /* standby mode */
0036
0037 enum ad7887_channels {
0038     AD7887_CH0,
0039     AD7887_CH0_CH1,
0040     AD7887_CH1,
0041 };
0042
0043 /**
0044  * struct ad7887_chip_info - chip specifc information
0045  * @int_vref_mv:    the internal reference voltage
0046  * @channels:       channels specification
0047  * @num_channels:   number of channels
0048  * @dual_channels:  channels specification in dual mode
0049  * @num_dual_channels:  number of channels in dual mode
0050  */
0051 struct ad7887_chip_info {
0052     u16             int_vref_mv;
0053     const struct iio_chan_spec  *channels;
0054     unsigned int            num_channels;
0055     const struct iio_chan_spec  *dual_channels;
0056     unsigned int            num_dual_channels;
0057 };
0058
0059 struct ad7887_state {
0060     struct spi_device       *spi;
0061     const struct ad7887_chip_info   *chip_info;
0062     struct regulator        *reg;
0063     struct spi_transfer     xfer[4];
0064     struct spi_message      msg[3];
0065     struct spi_message      *ring_msg;
0066     unsigned char           tx_cmd_buf[4];
0067
0068     /*
0069      * DMA (thus cache coherency maintenance) may require the
0070      * transfer buffers to live in their own cache lines.
0071      * Buffer needs to be large enough to hold two 16 bit samples and a
0072      * 64 bit aligned 64 bit timestamp.
0073      */
0074     unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
0075 };
0076
0077 enum ad7887_supported_device_ids {
0078     ID_AD7887
0079 };
0080
0081 static int ad7887_ring_preenable(struct iio_dev *indio_dev)
0082 {
0083     struct ad7887_state *st = iio_priv(indio_dev);
0084
0085     /* We know this is a single long so can 'cheat' */
0086     switch (*indio_dev->active_scan_mask) {
0087     case (1 << 0):
0088         st->ring_msg = &st->msg[AD7887_CH0];
0089         break;
0090     case (1 << 1):
0091         st->ring_msg = &st->msg[AD7887_CH1];
0092         /* Dummy read: push CH1 setting down to hardware */
0093         spi_sync(st->spi, st->ring_msg);
0094         break;
0095     case ((1 << 1) | (1 << 0)):
0096         st->ring_msg = &st->msg[AD7887_CH0_CH1];
0097         break;
0098     }
0099
0100     return 0;
0101 }
0102
0103 static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
0104 {
0105     struct ad7887_state *st = iio_priv(indio_dev);
0106
0107     /* dummy read: restore default CH0 settin */
0108     return spi_sync(st->spi, &st->msg[AD7887_CH0]);
0109 }
0110
0111 static irqreturn_t ad7887_trigger_handler(int irq, void *p)
0112 {
0113     struct iio_poll_func *pf = p;
0114     struct iio_dev *indio_dev = pf->indio_dev;
0115     struct ad7887_state *st = iio_priv(indio_dev);
0116     int b_sent;
0117
0118     b_sent = spi_sync(st->spi, st->ring_msg);
0119     if (b_sent)
0120         goto done;
0121
0122     iio_push_to_buffers_with_timestamp(indio_dev, st->data,
0123         iio_get_time_ns(indio_dev));
0124 done:
0125     iio_trigger_notify_done(indio_dev->trig);
0126
0127     return IRQ_HANDLED;
0128 }
0129
0130 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
0131     .preenable = &ad7887_ring_preenable,
0132     .postdisable = &ad7887_ring_postdisable,
0133 };
0134
0135 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
0136 {
0137     int ret = spi_sync(st->spi, &st->msg[ch]);
0138     if (ret)
0139         return ret;
0140
0141     return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
0142 }
0143
0144 static int ad7887_read_raw(struct iio_dev *indio_dev,
0145                struct iio_chan_spec const *chan,
0146                int *val,
0147                int *val2,
0148                long m)
0149 {
0150     int ret;
0151     struct ad7887_state *st = iio_priv(indio_dev);
0152
0153     switch (m) {
0154     case IIO_CHAN_INFO_RAW:
0155         ret = iio_device_claim_direct_mode(indio_dev);
0156         if (ret)
0157             return ret;
0158         ret = ad7887_scan_direct(st, chan->address);
0159         iio_device_release_direct_mode(indio_dev);
0160
0161         if (ret < 0)
0162             return ret;
0163         *val = ret >> chan->scan_type.shift;
0164         *val &= GENMASK(chan->scan_type.realbits - 1, 0);
0165         return IIO_VAL_INT;
0166     case IIO_CHAN_INFO_SCALE:
0167         if (st->reg) {
0168             *val = regulator_get_voltage(st->reg);
0169             if (*val < 0)
0170                 return *val;
0171             *val /= 1000;
0172         } else {
0173             *val = st->chip_info->int_vref_mv;
0174         }
0175
0176         *val2 = chan->scan_type.realbits;
0177
0178         return IIO_VAL_FRACTIONAL_LOG2;
0179     }
0180     return -EINVAL;
0181 }
0182
0183 #define AD7887_CHANNEL(x) { \
0184     .type = IIO_VOLTAGE, \
0185     .indexed = 1, \
0186     .channel = (x), \
0187     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0188     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0189     .address = (x), \
0190     .scan_index = (x), \
0191     .scan_type = { \
0192         .sign = 'u', \
0193         .realbits = 12, \
0194         .storagebits = 16, \
0195         .shift = 0, \
0196         .endianness = IIO_BE, \
0197     }, \
0198 }
0199
0200 static const struct iio_chan_spec ad7887_channels[] = {
0201     AD7887_CHANNEL(0),
0202     IIO_CHAN_SOFT_TIMESTAMP(1),
0203 };
0204
0205 static const struct iio_chan_spec ad7887_dual_channels[] = {
0206     AD7887_CHANNEL(0),
0207     AD7887_CHANNEL(1),
0208     IIO_CHAN_SOFT_TIMESTAMP(2),
0209 };
0210
0211 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
0212     /*
0213      * More devices added in future
0214      */
0215     [ID_AD7887] = {
0216         .channels = ad7887_channels,
0217         .num_channels = ARRAY_SIZE(ad7887_channels),
0218         .dual_channels = ad7887_dual_channels,
0219         .num_dual_channels = ARRAY_SIZE(ad7887_dual_channels),
0220         .int_vref_mv = 2500,
0221     },
0222 };
0223
0224 static const struct iio_info ad7887_info = {
0225     .read_raw = &ad7887_read_raw,
0226 };
0227
0228 static void ad7887_reg_disable(void *data)
0229 {
0230     struct regulator *reg = data;
0231
0232     regulator_disable(reg);
0233 }
0234
0235 static int ad7887_probe(struct spi_device *spi)
0236 {
0237     struct ad7887_platform_data *pdata = spi->dev.platform_data;
0238     struct ad7887_state *st;
0239     struct iio_dev *indio_dev;
0240     uint8_t mode;
0241     int ret;
0242
0243     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0244     if (indio_dev == NULL)
0245         return -ENOMEM;
0246
0247     st = iio_priv(indio_dev);
0248
0249     st->reg = devm_regulator_get_optional(&spi->dev, "vref");
0250     if (IS_ERR(st->reg)) {
0251         if (PTR_ERR(st->reg) != -ENODEV)
0252             return PTR_ERR(st->reg);
0253
0254         st->reg = NULL;
0255     }
0256
0257     if (st->reg) {
0258         ret = regulator_enable(st->reg);
0259         if (ret)
0260             return ret;
0261
0262         ret = devm_add_action_or_reset(&spi->dev, ad7887_reg_disable, st->reg);
0263         if (ret)
0264             return ret;
0265     }
0266
0267     st->chip_info =
0268         &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
0269
0270     st->spi = spi;
0271
0272     indio_dev->name = spi_get_device_id(spi)->name;
0273     indio_dev->info = &ad7887_info;
0274     indio_dev->modes = INDIO_DIRECT_MODE;
0275
0276     /* Setup default message */
0277
0278     mode = AD7887_PM_MODE4;
0279     if (!st->reg)
0280         mode |= AD7887_REF_DIS;
0281     if (pdata && pdata->en_dual)
0282         mode |= AD7887_DUAL;
0283
0284     st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
0285
0286     st->xfer[0].rx_buf = &st->data[0];
0287     st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
0288     st->xfer[0].len = 2;
0289
0290     spi_message_init(&st->msg[AD7887_CH0]);
0291     spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
0292
0293     if (pdata && pdata->en_dual) {
0294         st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
0295
0296         st->xfer[1].rx_buf = &st->data[0];
0297         st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
0298         st->xfer[1].len = 2;
0299
0300         st->xfer[2].rx_buf = &st->data[2];
0301         st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
0302         st->xfer[2].len = 2;
0303
0304         spi_message_init(&st->msg[AD7887_CH0_CH1]);
0305         spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
0306         spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
0307
0308         st->xfer[3].rx_buf = &st->data[2];
0309         st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
0310         st->xfer[3].len = 2;
0311
0312         spi_message_init(&st->msg[AD7887_CH1]);
0313         spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
0314
0315         indio_dev->channels = st->chip_info->dual_channels;
0316         indio_dev->num_channels = st->chip_info->num_dual_channels;
0317     } else {
0318         indio_dev->channels = st->chip_info->channels;
0319         indio_dev->num_channels = st->chip_info->num_channels;
0320     }
0321
0322     ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
0323             &iio_pollfunc_store_time,
0324             &ad7887_trigger_handler, &ad7887_ring_setup_ops);
0325     if (ret)
0326         return ret;
0327
0328     return devm_iio_device_register(&spi->dev, indio_dev);
0329 }
0330
0331 static const struct spi_device_id ad7887_id[] = {
0332     {"ad7887", ID_AD7887},
0333     {}
0334 };
0335 MODULE_DEVICE_TABLE(spi, ad7887_id);
0336
0337 static struct spi_driver ad7887_driver = {
0338     .driver = {
0339         .name   = "ad7887",
0340     },
0341     .probe      = ad7887_probe,
0342     .id_table   = ad7887_id,
0343 };
0344 module_spi_driver(ad7887_driver);
0345
0346 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0347 MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
0348 MODULE_LICENSE("GPL v2");