iio/adc/ad7791.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver
0004  *
0005  * Copyright 2012 Analog Devices Inc.
0006  *  Author: Lars-Peter Clausen <lars@metafoo.de>
0007  */
0008
0009 #include <linux/interrupt.h>
0010 #include <linux/device.h>
0011 #include <linux/kernel.h>
0012 #include <linux/slab.h>
0013 #include <linux/sysfs.h>
0014 #include <linux/spi/spi.h>
0015 #include <linux/regulator/consumer.h>
0016 #include <linux/err.h>
0017 #include <linux/sched.h>
0018 #include <linux/delay.h>
0019 #include <linux/module.h>
0020
0021 #include <linux/iio/iio.h>
0022 #include <linux/iio/sysfs.h>
0023 #include <linux/iio/buffer.h>
0024 #include <linux/iio/trigger.h>
0025 #include <linux/iio/trigger_consumer.h>
0026 #include <linux/iio/triggered_buffer.h>
0027 #include <linux/iio/adc/ad_sigma_delta.h>
0028
0029 #include <linux/platform_data/ad7791.h>
0030
0031 #define AD7791_REG_COMM         0x0 /* For writes */
0032 #define AD7791_REG_STATUS       0x0 /* For reads */
0033 #define AD7791_REG_MODE         0x1
0034 #define AD7791_REG_FILTER       0x2
0035 #define AD7791_REG_DATA         0x3
0036
0037 #define AD7791_MODE_CONTINUOUS      0x00
0038 #define AD7791_MODE_SINGLE      0x02
0039 #define AD7791_MODE_POWERDOWN       0x03
0040
0041 #define AD7791_CH_AIN1P_AIN1N       0x00
0042 #define AD7791_CH_AIN2          0x01
0043 #define AD7791_CH_AIN1N_AIN1N       0x02
0044 #define AD7791_CH_AVDD_MONITOR      0x03
0045
0046 #define AD7791_FILTER_CLK_DIV_1     (0x0 << 4)
0047 #define AD7791_FILTER_CLK_DIV_2     (0x1 << 4)
0048 #define AD7791_FILTER_CLK_DIV_4     (0x2 << 4)
0049 #define AD7791_FILTER_CLK_DIV_8     (0x3 << 4)
0050 #define AD7791_FILTER_CLK_MASK      (0x3 << 4)
0051 #define AD7791_FILTER_RATE_120      0x0
0052 #define AD7791_FILTER_RATE_100      0x1
0053 #define AD7791_FILTER_RATE_33_3     0x2
0054 #define AD7791_FILTER_RATE_20       0x3
0055 #define AD7791_FILTER_RATE_16_6     0x4
0056 #define AD7791_FILTER_RATE_16_7     0x5
0057 #define AD7791_FILTER_RATE_13_3     0x6
0058 #define AD7791_FILTER_RATE_9_5      0x7
0059 #define AD7791_FILTER_RATE_MASK     0x7
0060
0061 #define AD7791_MODE_BUFFER      BIT(1)
0062 #define AD7791_MODE_UNIPOLAR        BIT(2)
0063 #define AD7791_MODE_BURNOUT     BIT(3)
0064 #define AD7791_MODE_SEL_MASK        (0x3 << 6)
0065 #define AD7791_MODE_SEL(x)      ((x) << 6)
0066
0067 #define __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
0068     _storagebits, _shift, _extend_name, _type, _mask_all) \
0069     { \
0070         .type = (_type), \
0071         .differential = (_channel2 == -1 ? 0 : 1), \
0072         .indexed = 1, \
0073         .channel = (_channel1), \
0074         .channel2 = (_channel2), \
0075         .address = (_address), \
0076         .extend_name = (_extend_name), \
0077         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0078             BIT(IIO_CHAN_INFO_OFFSET), \
0079         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0080         .info_mask_shared_by_all = _mask_all, \
0081         .scan_index = (_si), \
0082         .scan_type = { \
0083             .sign = 'u', \
0084             .realbits = (_bits), \
0085             .storagebits = (_storagebits), \
0086             .shift = (_shift), \
0087             .endianness = IIO_BE, \
0088         }, \
0089     }
0090
0091 #define AD7991_SHORTED_CHANNEL(_si, _channel, _address, _bits, \
0092     _storagebits, _shift) \
0093     __AD7991_CHANNEL(_si, _channel, _channel, _address, _bits, \
0094         _storagebits, _shift, "shorted", IIO_VOLTAGE, \
0095         BIT(IIO_CHAN_INFO_SAMP_FREQ))
0096
0097 #define AD7991_CHANNEL(_si, _channel, _address, _bits, \
0098     _storagebits, _shift) \
0099     __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
0100         _storagebits, _shift, NULL, IIO_VOLTAGE, \
0101          BIT(IIO_CHAN_INFO_SAMP_FREQ))
0102
0103 #define AD7991_DIFF_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
0104     _storagebits, _shift) \
0105     __AD7991_CHANNEL(_si, _channel1, _channel2, _address, _bits, \
0106         _storagebits, _shift, NULL, IIO_VOLTAGE, \
0107         BIT(IIO_CHAN_INFO_SAMP_FREQ))
0108
0109 #define AD7991_SUPPLY_CHANNEL(_si, _channel, _address, _bits, _storagebits, \
0110     _shift) \
0111     __AD7991_CHANNEL(_si, _channel, -1, _address, _bits, \
0112         _storagebits, _shift, "supply", IIO_VOLTAGE, \
0113         BIT(IIO_CHAN_INFO_SAMP_FREQ))
0114
0115 #define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
0116 const struct iio_chan_spec name[] = { \
0117     AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
0118         (bits), (storagebits), 0), \
0119     AD7991_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
0120     AD7991_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
0121         (bits), (storagebits), 0), \
0122     AD7991_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR,  \
0123         (bits), (storagebits), 0), \
0124     IIO_CHAN_SOFT_TIMESTAMP(4), \
0125 }
0126
0127 #define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
0128 const struct iio_chan_spec name[] = { \
0129     AD7991_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
0130         (bits), (storagebits), 0), \
0131     AD7991_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
0132         (bits), (storagebits), 0), \
0133     AD7991_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
0134         (bits), (storagebits), 0), \
0135     IIO_CHAN_SOFT_TIMESTAMP(3), \
0136 }
0137
0138 static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
0139 static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
0140 static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);
0141
0142 enum {
0143     AD7787,
0144     AD7788,
0145     AD7789,
0146     AD7790,
0147     AD7791,
0148 };
0149
0150 enum ad7791_chip_info_flags {
0151     AD7791_FLAG_HAS_FILTER      = (1 << 0),
0152     AD7791_FLAG_HAS_BUFFER      = (1 << 1),
0153     AD7791_FLAG_HAS_UNIPOLAR    = (1 << 2),
0154     AD7791_FLAG_HAS_BURNOUT     = (1 << 3),
0155 };
0156
0157 struct ad7791_chip_info {
0158     const struct iio_chan_spec *channels;
0159     unsigned int num_channels;
0160     enum ad7791_chip_info_flags flags;
0161 };
0162
0163 static const struct ad7791_chip_info ad7791_chip_infos[] = {
0164     [AD7787] = {
0165         .channels = ad7787_channels,
0166         .num_channels = ARRAY_SIZE(ad7787_channels),
0167         .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
0168             AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
0169     },
0170     [AD7788] = {
0171         .channels = ad7790_channels,
0172         .num_channels = ARRAY_SIZE(ad7790_channels),
0173         .flags = AD7791_FLAG_HAS_UNIPOLAR,
0174     },
0175     [AD7789] = {
0176         .channels = ad7791_channels,
0177         .num_channels = ARRAY_SIZE(ad7791_channels),
0178         .flags = AD7791_FLAG_HAS_UNIPOLAR,
0179     },
0180     [AD7790] = {
0181         .channels = ad7790_channels,
0182         .num_channels = ARRAY_SIZE(ad7790_channels),
0183         .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
0184             AD7791_FLAG_HAS_BURNOUT,
0185     },
0186     [AD7791] = {
0187         .channels = ad7791_channels,
0188         .num_channels = ARRAY_SIZE(ad7791_channels),
0189         .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
0190             AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
0191     },
0192 };
0193
0194 struct ad7791_state {
0195     struct ad_sigma_delta sd;
0196     uint8_t mode;
0197     uint8_t filter;
0198
0199     struct regulator *reg;
0200     const struct ad7791_chip_info *info;
0201 };
0202
0203 static const int ad7791_sample_freq_avail[8][2] = {
0204     [AD7791_FILTER_RATE_120] =  { 120, 0 },
0205     [AD7791_FILTER_RATE_100] =  { 100, 0 },
0206     [AD7791_FILTER_RATE_33_3] = { 33,  300000 },
0207     [AD7791_FILTER_RATE_20] =   { 20,  0 },
0208     [AD7791_FILTER_RATE_16_6] = { 16,  600000 },
0209     [AD7791_FILTER_RATE_16_7] = { 16,  700000 },
0210     [AD7791_FILTER_RATE_13_3] = { 13,  300000 },
0211     [AD7791_FILTER_RATE_9_5] =  { 9,   500000 },
0212 };
0213
0214 static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
0215 {
0216     return container_of(sd, struct ad7791_state, sd);
0217 }
0218
0219 static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
0220 {
0221     ad_sd_set_comm(sd, channel);
0222
0223     return 0;
0224 }
0225
0226 static int ad7791_set_mode(struct ad_sigma_delta *sd,
0227     enum ad_sigma_delta_mode mode)
0228 {
0229     struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);
0230
0231     switch (mode) {
0232     case AD_SD_MODE_CONTINUOUS:
0233         mode = AD7791_MODE_CONTINUOUS;
0234         break;
0235     case AD_SD_MODE_SINGLE:
0236         mode = AD7791_MODE_SINGLE;
0237         break;
0238     case AD_SD_MODE_IDLE:
0239     case AD_SD_MODE_POWERDOWN:
0240         mode = AD7791_MODE_POWERDOWN;
0241         break;
0242     }
0243
0244     st->mode &= ~AD7791_MODE_SEL_MASK;
0245     st->mode |= AD7791_MODE_SEL(mode);
0246
0247     return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
0248 }
0249
0250 static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
0251     .set_channel = ad7791_set_channel,
0252     .set_mode = ad7791_set_mode,
0253     .has_registers = true,
0254     .addr_shift = 4,
0255     .read_mask = BIT(3),
0256     .irq_flags = IRQF_TRIGGER_LOW,
0257 };
0258
0259 static int ad7791_read_raw(struct iio_dev *indio_dev,
0260     const struct iio_chan_spec *chan, int *val, int *val2, long info)
0261 {
0262     struct ad7791_state *st = iio_priv(indio_dev);
0263     bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);
0264     unsigned int rate;
0265
0266     switch (info) {
0267     case IIO_CHAN_INFO_RAW:
0268         return ad_sigma_delta_single_conversion(indio_dev, chan, val);
0269     case IIO_CHAN_INFO_OFFSET:
0270         /**
0271          * Unipolar: 0 to VREF
0272          * Bipolar -VREF to VREF
0273          **/
0274         if (unipolar)
0275             *val = 0;
0276         else
0277             *val = -(1 << (chan->scan_type.realbits - 1));
0278         return IIO_VAL_INT;
0279     case IIO_CHAN_INFO_SCALE:
0280         /* The monitor channel uses an internal reference. */
0281         if (chan->address == AD7791_CH_AVDD_MONITOR) {
0282             /*
0283              * The signal is attenuated by a factor of 5 and
0284              * compared against a 1.17V internal reference.
0285              */
0286             *val = 1170 * 5;
0287         } else {
0288             int voltage_uv;
0289
0290             voltage_uv = regulator_get_voltage(st->reg);
0291             if (voltage_uv < 0)
0292                 return voltage_uv;
0293
0294             *val = voltage_uv / 1000;
0295         }
0296         if (unipolar)
0297             *val2 = chan->scan_type.realbits;
0298         else
0299             *val2 = chan->scan_type.realbits - 1;
0300
0301         return IIO_VAL_FRACTIONAL_LOG2;
0302     case IIO_CHAN_INFO_SAMP_FREQ:
0303         rate = st->filter & AD7791_FILTER_RATE_MASK;
0304         *val = ad7791_sample_freq_avail[rate][0];
0305         *val2 = ad7791_sample_freq_avail[rate][1];
0306         return IIO_VAL_INT_PLUS_MICRO;
0307     }
0308
0309     return -EINVAL;
0310 }
0311
0312 static int ad7791_write_raw(struct iio_dev *indio_dev,
0313     struct iio_chan_spec const *chan, int val, int val2, long mask)
0314 {
0315     struct ad7791_state *st = iio_priv(indio_dev);
0316     int ret, i;
0317
0318     ret = iio_device_claim_direct_mode(indio_dev);
0319     if (ret)
0320         return ret;
0321
0322     switch (mask) {
0323     case IIO_CHAN_INFO_SAMP_FREQ:
0324         for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
0325             if (ad7791_sample_freq_avail[i][0] == val &&
0326                 ad7791_sample_freq_avail[i][1] == val2)
0327                 break;
0328         }
0329
0330         if (i == ARRAY_SIZE(ad7791_sample_freq_avail)) {
0331             ret = -EINVAL;
0332             break;
0333         }
0334
0335         st->filter &= ~AD7791_FILTER_RATE_MASK;
0336         st->filter |= i;
0337         ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
0338                 sizeof(st->filter),
0339                 st->filter);
0340         break;
0341     default:
0342         ret = -EINVAL;
0343     }
0344
0345     iio_device_release_direct_mode(indio_dev);
0346     return ret;
0347 }
0348
0349 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");
0350
0351 static struct attribute *ad7791_attributes[] = {
0352     &iio_const_attr_sampling_frequency_available.dev_attr.attr,
0353     NULL
0354 };
0355
0356 static const struct attribute_group ad7791_attribute_group = {
0357     .attrs = ad7791_attributes,
0358 };
0359
0360 static const struct iio_info ad7791_info = {
0361     .read_raw = &ad7791_read_raw,
0362     .write_raw = &ad7791_write_raw,
0363     .attrs = &ad7791_attribute_group,
0364     .validate_trigger = ad_sd_validate_trigger,
0365 };
0366
0367 static const struct iio_info ad7791_no_filter_info = {
0368     .read_raw = &ad7791_read_raw,
0369     .write_raw = &ad7791_write_raw,
0370     .validate_trigger = ad_sd_validate_trigger,
0371 };
0372
0373 static int ad7791_setup(struct ad7791_state *st,
0374             struct ad7791_platform_data *pdata)
0375 {
0376     /* Set to poweron-reset default values */
0377     st->mode = AD7791_MODE_BUFFER;
0378     st->filter = AD7791_FILTER_RATE_16_6;
0379
0380     if (!pdata)
0381         return 0;
0382
0383     if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
0384         st->mode &= ~AD7791_MODE_BUFFER;
0385
0386     if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
0387         pdata->burnout_current)
0388         st->mode |= AD7791_MODE_BURNOUT;
0389
0390     if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
0391         st->mode |= AD7791_MODE_UNIPOLAR;
0392
0393     return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
0394         st->mode);
0395 }
0396
0397 static void ad7791_reg_disable(void *reg)
0398 {
0399     regulator_disable(reg);
0400 }
0401
0402 static int ad7791_probe(struct spi_device *spi)
0403 {
0404     struct ad7791_platform_data *pdata = spi->dev.platform_data;
0405     struct iio_dev *indio_dev;
0406     struct ad7791_state *st;
0407     int ret;
0408
0409     if (!spi->irq) {
0410         dev_err(&spi->dev, "Missing IRQ.\n");
0411         return -ENXIO;
0412     }
0413
0414     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0415     if (!indio_dev)
0416         return -ENOMEM;
0417
0418     st = iio_priv(indio_dev);
0419
0420     st->reg = devm_regulator_get(&spi->dev, "refin");
0421     if (IS_ERR(st->reg))
0422         return PTR_ERR(st->reg);
0423
0424     ret = regulator_enable(st->reg);
0425     if (ret)
0426         return ret;
0427
0428     ret = devm_add_action_or_reset(&spi->dev, ad7791_reg_disable, st->reg);
0429     if (ret)
0430         return ret;
0431
0432     st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
0433     ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);
0434
0435     indio_dev->name = spi_get_device_id(spi)->name;
0436     indio_dev->modes = INDIO_DIRECT_MODE;
0437     indio_dev->channels = st->info->channels;
0438     indio_dev->num_channels = st->info->num_channels;
0439     if (st->info->flags & AD7791_FLAG_HAS_FILTER)
0440         indio_dev->info = &ad7791_info;
0441     else
0442         indio_dev->info = &ad7791_no_filter_info;
0443
0444     ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev);
0445     if (ret)
0446         return ret;
0447
0448     ret = ad7791_setup(st, pdata);
0449     if (ret)
0450         return ret;
0451
0452     return devm_iio_device_register(&spi->dev, indio_dev);
0453 }
0454
0455 static const struct spi_device_id ad7791_spi_ids[] = {
0456     { "ad7787", AD7787 },
0457     { "ad7788", AD7788 },
0458     { "ad7789", AD7789 },
0459     { "ad7790", AD7790 },
0460     { "ad7791", AD7791 },
0461     {}
0462 };
0463 MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);
0464
0465 static struct spi_driver ad7791_driver = {
0466     .driver = {
0467         .name   = "ad7791",
0468     },
0469     .probe      = ad7791_probe,
0470     .id_table   = ad7791_spi_ids,
0471 };
0472 module_spi_driver(ad7791_driver);
0473
0474 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
0475 MODULE_DESCRIPTION("Analog Devices AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
0476 MODULE_LICENSE("GPL v2");
0477 MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);