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0009 #include <linux/interrupt.h>
0010 #include <linux/device.h>
0011 #include <linux/kernel.h>
0012 #include <linux/slab.h>
0013 #include <linux/sysfs.h>
0014 #include <linux/spi/spi.h>
0015 #include <linux/regulator/consumer.h>
0016 #include <linux/err.h>
0017 #include <linux/sched.h>
0018 #include <linux/gpio/consumer.h>
0019 #include <linux/module.h>
0020 #include <linux/bits.h>
0021
0022 #include <linux/iio/iio.h>
0023 #include <linux/iio/sysfs.h>
0024 #include <linux/iio/adc/ad_sigma_delta.h>
0025
0026 #define AD7780_RDY BIT(7)
0027 #define AD7780_FILTER BIT(6)
0028 #define AD7780_ERR BIT(5)
0029 #define AD7780_ID1 BIT(4)
0030 #define AD7780_ID0 BIT(3)
0031 #define AD7780_GAIN BIT(2)
0032
0033 #define AD7170_ID 0
0034 #define AD7171_ID 1
0035 #define AD7780_ID 1
0036 #define AD7781_ID 0
0037
0038 #define AD7780_ID_MASK (AD7780_ID0 | AD7780_ID1)
0039
0040 #define AD7780_PATTERN_GOOD 1
0041 #define AD7780_PATTERN_MASK GENMASK(1, 0)
0042
0043 #define AD7170_PATTERN_GOOD 5
0044 #define AD7170_PATTERN_MASK GENMASK(2, 0)
0045
0046 #define AD7780_GAIN_MIDPOINT 64
0047 #define AD7780_FILTER_MIDPOINT 13350
0048
0049 static const unsigned int ad778x_gain[2] = { 1, 128 };
0050 static const unsigned int ad778x_odr_avail[2] = { 10000, 16700 };
0051
0052 struct ad7780_chip_info {
0053 struct iio_chan_spec channel;
0054 unsigned int pattern_mask;
0055 unsigned int pattern;
0056 bool is_ad778x;
0057 };
0058
0059 struct ad7780_state {
0060 const struct ad7780_chip_info *chip_info;
0061 struct regulator *reg;
0062 struct gpio_desc *powerdown_gpio;
0063 struct gpio_desc *gain_gpio;
0064 struct gpio_desc *filter_gpio;
0065 unsigned int gain;
0066 unsigned int odr;
0067 unsigned int int_vref_mv;
0068
0069 struct ad_sigma_delta sd;
0070 };
0071
0072 enum ad7780_supported_device_ids {
0073 ID_AD7170,
0074 ID_AD7171,
0075 ID_AD7780,
0076 ID_AD7781,
0077 };
0078
0079 static struct ad7780_state *ad_sigma_delta_to_ad7780(struct ad_sigma_delta *sd)
0080 {
0081 return container_of(sd, struct ad7780_state, sd);
0082 }
0083
0084 static int ad7780_set_mode(struct ad_sigma_delta *sigma_delta,
0085 enum ad_sigma_delta_mode mode)
0086 {
0087 struct ad7780_state *st = ad_sigma_delta_to_ad7780(sigma_delta);
0088 unsigned int val;
0089
0090 switch (mode) {
0091 case AD_SD_MODE_SINGLE:
0092 case AD_SD_MODE_CONTINUOUS:
0093 val = 1;
0094 break;
0095 default:
0096 val = 0;
0097 break;
0098 }
0099
0100 gpiod_set_value(st->powerdown_gpio, val);
0101
0102 return 0;
0103 }
0104
0105 static int ad7780_read_raw(struct iio_dev *indio_dev,
0106 struct iio_chan_spec const *chan,
0107 int *val,
0108 int *val2,
0109 long m)
0110 {
0111 struct ad7780_state *st = iio_priv(indio_dev);
0112 int voltage_uv;
0113
0114 switch (m) {
0115 case IIO_CHAN_INFO_RAW:
0116 return ad_sigma_delta_single_conversion(indio_dev, chan, val);
0117 case IIO_CHAN_INFO_SCALE:
0118 voltage_uv = regulator_get_voltage(st->reg);
0119 if (voltage_uv < 0)
0120 return voltage_uv;
0121 voltage_uv /= 1000;
0122 *val = voltage_uv * st->gain;
0123 *val2 = chan->scan_type.realbits - 1;
0124 st->int_vref_mv = voltage_uv;
0125 return IIO_VAL_FRACTIONAL_LOG2;
0126 case IIO_CHAN_INFO_OFFSET:
0127 *val = -(1 << (chan->scan_type.realbits - 1));
0128 return IIO_VAL_INT;
0129 case IIO_CHAN_INFO_SAMP_FREQ:
0130 *val = st->odr;
0131 return IIO_VAL_INT;
0132 default:
0133 break;
0134 }
0135
0136 return -EINVAL;
0137 }
0138
0139 static int ad7780_write_raw(struct iio_dev *indio_dev,
0140 struct iio_chan_spec const *chan,
0141 int val,
0142 int val2,
0143 long m)
0144 {
0145 struct ad7780_state *st = iio_priv(indio_dev);
0146 const struct ad7780_chip_info *chip_info = st->chip_info;
0147 unsigned long long vref;
0148 unsigned int full_scale, gain;
0149
0150 if (!chip_info->is_ad778x)
0151 return -EINVAL;
0152
0153 switch (m) {
0154 case IIO_CHAN_INFO_SCALE:
0155 if (val != 0)
0156 return -EINVAL;
0157
0158 vref = st->int_vref_mv * 1000000LL;
0159 full_scale = 1 << (chip_info->channel.scan_type.realbits - 1);
0160 gain = DIV_ROUND_CLOSEST_ULL(vref, full_scale);
0161 gain = DIV_ROUND_CLOSEST(gain, val2);
0162 st->gain = gain;
0163 if (gain < AD7780_GAIN_MIDPOINT)
0164 gain = 0;
0165 else
0166 gain = 1;
0167 gpiod_set_value(st->gain_gpio, gain);
0168 break;
0169 case IIO_CHAN_INFO_SAMP_FREQ:
0170 if (1000*val + val2/1000 < AD7780_FILTER_MIDPOINT)
0171 val = 0;
0172 else
0173 val = 1;
0174 st->odr = ad778x_odr_avail[val];
0175 gpiod_set_value(st->filter_gpio, val);
0176 break;
0177 default:
0178 break;
0179 }
0180
0181 return 0;
0182 }
0183
0184 static int ad7780_postprocess_sample(struct ad_sigma_delta *sigma_delta,
0185 unsigned int raw_sample)
0186 {
0187 struct ad7780_state *st = ad_sigma_delta_to_ad7780(sigma_delta);
0188 const struct ad7780_chip_info *chip_info = st->chip_info;
0189
0190 if ((raw_sample & AD7780_ERR) ||
0191 ((raw_sample & chip_info->pattern_mask) != chip_info->pattern))
0192 return -EIO;
0193
0194 if (chip_info->is_ad778x) {
0195 st->gain = ad778x_gain[raw_sample & AD7780_GAIN];
0196 st->odr = ad778x_odr_avail[raw_sample & AD7780_FILTER];
0197 }
0198
0199 return 0;
0200 }
0201
0202 static const struct ad_sigma_delta_info ad7780_sigma_delta_info = {
0203 .set_mode = ad7780_set_mode,
0204 .postprocess_sample = ad7780_postprocess_sample,
0205 .has_registers = false,
0206 .irq_flags = IRQF_TRIGGER_FALLING,
0207 };
0208
0209 #define _AD7780_CHANNEL(_bits, _wordsize, _mask_all) \
0210 { \
0211 .type = IIO_VOLTAGE, \
0212 .indexed = 1, \
0213 .channel = 0, \
0214 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0215 BIT(IIO_CHAN_INFO_OFFSET), \
0216 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0217 .info_mask_shared_by_all = _mask_all, \
0218 .scan_index = 1, \
0219 .scan_type = { \
0220 .sign = 'u', \
0221 .realbits = (_bits), \
0222 .storagebits = 32, \
0223 .shift = (_wordsize) - (_bits), \
0224 .endianness = IIO_BE, \
0225 }, \
0226 }
0227
0228 #define AD7780_CHANNEL(_bits, _wordsize) \
0229 _AD7780_CHANNEL(_bits, _wordsize, BIT(IIO_CHAN_INFO_SAMP_FREQ))
0230 #define AD7170_CHANNEL(_bits, _wordsize) \
0231 _AD7780_CHANNEL(_bits, _wordsize, 0)
0232
0233 static const struct ad7780_chip_info ad7780_chip_info_tbl[] = {
0234 [ID_AD7170] = {
0235 .channel = AD7170_CHANNEL(12, 24),
0236 .pattern = AD7170_PATTERN_GOOD,
0237 .pattern_mask = AD7170_PATTERN_MASK,
0238 .is_ad778x = false,
0239 },
0240 [ID_AD7171] = {
0241 .channel = AD7170_CHANNEL(16, 24),
0242 .pattern = AD7170_PATTERN_GOOD,
0243 .pattern_mask = AD7170_PATTERN_MASK,
0244 .is_ad778x = false,
0245 },
0246 [ID_AD7780] = {
0247 .channel = AD7780_CHANNEL(24, 32),
0248 .pattern = AD7780_PATTERN_GOOD,
0249 .pattern_mask = AD7780_PATTERN_MASK,
0250 .is_ad778x = true,
0251 },
0252 [ID_AD7781] = {
0253 .channel = AD7780_CHANNEL(20, 32),
0254 .pattern = AD7780_PATTERN_GOOD,
0255 .pattern_mask = AD7780_PATTERN_MASK,
0256 .is_ad778x = true,
0257 },
0258 };
0259
0260 static const struct iio_info ad7780_info = {
0261 .read_raw = ad7780_read_raw,
0262 .write_raw = ad7780_write_raw,
0263 };
0264
0265 static int ad7780_init_gpios(struct device *dev, struct ad7780_state *st)
0266 {
0267 int ret;
0268
0269 st->powerdown_gpio = devm_gpiod_get_optional(dev,
0270 "powerdown",
0271 GPIOD_OUT_LOW);
0272 if (IS_ERR(st->powerdown_gpio)) {
0273 ret = PTR_ERR(st->powerdown_gpio);
0274 dev_err(dev, "Failed to request powerdown GPIO: %d\n", ret);
0275 return ret;
0276 }
0277
0278 if (!st->chip_info->is_ad778x)
0279 return 0;
0280
0281
0282 st->gain_gpio = devm_gpiod_get_optional(dev,
0283 "adi,gain",
0284 GPIOD_OUT_HIGH);
0285 if (IS_ERR(st->gain_gpio)) {
0286 ret = PTR_ERR(st->gain_gpio);
0287 dev_err(dev, "Failed to request gain GPIO: %d\n", ret);
0288 return ret;
0289 }
0290
0291 st->filter_gpio = devm_gpiod_get_optional(dev,
0292 "adi,filter",
0293 GPIOD_OUT_HIGH);
0294 if (IS_ERR(st->filter_gpio)) {
0295 ret = PTR_ERR(st->filter_gpio);
0296 dev_err(dev, "Failed to request filter GPIO: %d\n", ret);
0297 return ret;
0298 }
0299
0300 return 0;
0301 }
0302
0303 static void ad7780_reg_disable(void *reg)
0304 {
0305 regulator_disable(reg);
0306 }
0307
0308 static int ad7780_probe(struct spi_device *spi)
0309 {
0310 struct ad7780_state *st;
0311 struct iio_dev *indio_dev;
0312 int ret;
0313
0314 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
0315 if (!indio_dev)
0316 return -ENOMEM;
0317
0318 st = iio_priv(indio_dev);
0319 st->gain = 1;
0320
0321 ad_sd_init(&st->sd, indio_dev, spi, &ad7780_sigma_delta_info);
0322
0323 st->chip_info =
0324 &ad7780_chip_info_tbl[spi_get_device_id(spi)->driver_data];
0325
0326 indio_dev->name = spi_get_device_id(spi)->name;
0327 indio_dev->modes = INDIO_DIRECT_MODE;
0328 indio_dev->channels = &st->chip_info->channel;
0329 indio_dev->num_channels = 1;
0330 indio_dev->info = &ad7780_info;
0331
0332 ret = ad7780_init_gpios(&spi->dev, st);
0333 if (ret)
0334 return ret;
0335
0336 st->reg = devm_regulator_get(&spi->dev, "avdd");
0337 if (IS_ERR(st->reg))
0338 return PTR_ERR(st->reg);
0339
0340 ret = regulator_enable(st->reg);
0341 if (ret) {
0342 dev_err(&spi->dev, "Failed to enable specified AVdd supply\n");
0343 return ret;
0344 }
0345
0346 ret = devm_add_action_or_reset(&spi->dev, ad7780_reg_disable, st->reg);
0347 if (ret)
0348 return ret;
0349
0350 ret = devm_ad_sd_setup_buffer_and_trigger(&spi->dev, indio_dev);
0351 if (ret)
0352 return ret;
0353
0354 return devm_iio_device_register(&spi->dev, indio_dev);
0355 }
0356
0357 static const struct spi_device_id ad7780_id[] = {
0358 {"ad7170", ID_AD7170},
0359 {"ad7171", ID_AD7171},
0360 {"ad7780", ID_AD7780},
0361 {"ad7781", ID_AD7781},
0362 {}
0363 };
0364 MODULE_DEVICE_TABLE(spi, ad7780_id);
0365
0366 static struct spi_driver ad7780_driver = {
0367 .driver = {
0368 .name = "ad7780",
0369 },
0370 .probe = ad7780_probe,
0371 .id_table = ad7780_id,
0372 };
0373 module_spi_driver(ad7780_driver);
0374
0375 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0376 MODULE_DESCRIPTION("Analog Devices AD7780 and similar ADCs");
0377 MODULE_LICENSE("GPL v2");
0378 MODULE_IMPORT_NS(IIO_AD_SIGMA_DELTA);