iio/adc/ad7766.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * AD7766/AD7767 SPI ADC driver
0004  *
0005  * Copyright 2016 Analog Devices Inc.
0006  */
0007
0008 #include <linux/clk.h>
0009 #include <linux/delay.h>
0010 #include <linux/device.h>
0011 #include <linux/err.h>
0012 #include <linux/gpio/consumer.h>
0013 #include <linux/module.h>
0014 #include <linux/regulator/consumer.h>
0015 #include <linux/slab.h>
0016 #include <linux/spi/spi.h>
0017
0018 #include <linux/iio/iio.h>
0019 #include <linux/iio/buffer.h>
0020 #include <linux/iio/trigger.h>
0021 #include <linux/iio/trigger_consumer.h>
0022 #include <linux/iio/triggered_buffer.h>
0023
0024 struct ad7766_chip_info {
0025     unsigned int decimation_factor;
0026 };
0027
0028 enum {
0029     AD7766_SUPPLY_AVDD = 0,
0030     AD7766_SUPPLY_DVDD = 1,
0031     AD7766_SUPPLY_VREF = 2,
0032     AD7766_NUM_SUPPLIES = 3
0033 };
0034
0035 struct ad7766 {
0036     const struct ad7766_chip_info *chip_info;
0037     struct spi_device *spi;
0038     struct clk *mclk;
0039     struct gpio_desc *pd_gpio;
0040     struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES];
0041
0042     struct iio_trigger *trig;
0043
0044     struct spi_transfer xfer;
0045     struct spi_message msg;
0046
0047     /*
0048      * DMA (thus cache coherency maintenance) may require the
0049      * transfer buffers to live in their own cache lines.
0050      * Make the buffer large enough for one 24 bit sample and one 64 bit
0051      * aligned 64 bit timestamp.
0052      */
0053     unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)] __aligned(IIO_DMA_MINALIGN);
0054 };
0055
0056 /*
0057  * AD7766 and AD7767 variations are interface compatible, the main difference is
0058  * analog performance. Both parts will use the same ID.
0059  */
0060 enum ad7766_device_ids {
0061     ID_AD7766,
0062     ID_AD7766_1,
0063     ID_AD7766_2,
0064 };
0065
0066 static irqreturn_t ad7766_trigger_handler(int irq, void *p)
0067 {
0068     struct iio_poll_func *pf = p;
0069     struct iio_dev *indio_dev = pf->indio_dev;
0070     struct ad7766 *ad7766 = iio_priv(indio_dev);
0071     int ret;
0072
0073     ret = spi_sync(ad7766->spi, &ad7766->msg);
0074     if (ret < 0)
0075         goto done;
0076
0077     iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data,
0078         pf->timestamp);
0079 done:
0080     iio_trigger_notify_done(indio_dev->trig);
0081
0082     return IRQ_HANDLED;
0083 }
0084
0085 static int ad7766_preenable(struct iio_dev *indio_dev)
0086 {
0087     struct ad7766 *ad7766 = iio_priv(indio_dev);
0088     int ret;
0089
0090     ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
0091     if (ret < 0) {
0092         dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n",
0093             ret);
0094         return ret;
0095     }
0096
0097     ret = clk_prepare_enable(ad7766->mclk);
0098     if (ret < 0) {
0099         dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret);
0100         regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
0101         return ret;
0102     }
0103
0104     gpiod_set_value(ad7766->pd_gpio, 0);
0105
0106     return 0;
0107 }
0108
0109 static int ad7766_postdisable(struct iio_dev *indio_dev)
0110 {
0111     struct ad7766 *ad7766 = iio_priv(indio_dev);
0112
0113     gpiod_set_value(ad7766->pd_gpio, 1);
0114
0115     /*
0116      * The PD pin is synchronous to the clock, so give it some time to
0117      * notice the change before we disable the clock.
0118      */
0119     msleep(20);
0120
0121     clk_disable_unprepare(ad7766->mclk);
0122     regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
0123
0124     return 0;
0125 }
0126
0127 static int ad7766_read_raw(struct iio_dev *indio_dev,
0128     const struct iio_chan_spec *chan, int *val, int *val2, long info)
0129 {
0130     struct ad7766 *ad7766 = iio_priv(indio_dev);
0131     struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer;
0132     int scale_uv;
0133
0134     switch (info) {
0135     case IIO_CHAN_INFO_SCALE:
0136         scale_uv = regulator_get_voltage(vref);
0137         if (scale_uv < 0)
0138             return scale_uv;
0139         *val = scale_uv / 1000;
0140         *val2 = chan->scan_type.realbits;
0141         return IIO_VAL_FRACTIONAL_LOG2;
0142     case IIO_CHAN_INFO_SAMP_FREQ:
0143         *val = clk_get_rate(ad7766->mclk) /
0144             ad7766->chip_info->decimation_factor;
0145         return IIO_VAL_INT;
0146     }
0147     return -EINVAL;
0148 }
0149
0150 static const struct iio_chan_spec ad7766_channels[] = {
0151     {
0152         .type = IIO_VOLTAGE,
0153         .indexed = 1,
0154         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
0155         .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
0156         .scan_type = {
0157             .sign = 's',
0158             .realbits = 24,
0159             .storagebits = 32,
0160             .endianness = IIO_BE,
0161         },
0162     },
0163     IIO_CHAN_SOFT_TIMESTAMP(1),
0164 };
0165
0166 static const struct ad7766_chip_info ad7766_chip_info[] = {
0167     [ID_AD7766] = {
0168         .decimation_factor = 8,
0169     },
0170     [ID_AD7766_1] = {
0171         .decimation_factor = 16,
0172     },
0173     [ID_AD7766_2] = {
0174         .decimation_factor = 32,
0175     },
0176 };
0177
0178 static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
0179     .preenable = &ad7766_preenable,
0180     .postdisable = &ad7766_postdisable,
0181 };
0182
0183 static const struct iio_info ad7766_info = {
0184     .read_raw = &ad7766_read_raw,
0185 };
0186
0187 static irqreturn_t ad7766_irq(int irq, void *private)
0188 {
0189     iio_trigger_poll(private);
0190     return IRQ_HANDLED;
0191 }
0192
0193 static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
0194 {
0195     struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig);
0196
0197     if (enable)
0198         enable_irq(ad7766->spi->irq);
0199     else
0200         disable_irq(ad7766->spi->irq);
0201
0202     return 0;
0203 }
0204
0205 static const struct iio_trigger_ops ad7766_trigger_ops = {
0206     .set_trigger_state = ad7766_set_trigger_state,
0207     .validate_device = iio_trigger_validate_own_device,
0208 };
0209
0210 static int ad7766_probe(struct spi_device *spi)
0211 {
0212     const struct spi_device_id *id = spi_get_device_id(spi);
0213     struct iio_dev *indio_dev;
0214     struct ad7766 *ad7766;
0215     int ret;
0216
0217     indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766));
0218     if (!indio_dev)
0219         return -ENOMEM;
0220
0221     ad7766 = iio_priv(indio_dev);
0222     ad7766->chip_info = &ad7766_chip_info[id->driver_data];
0223
0224     ad7766->mclk = devm_clk_get(&spi->dev, "mclk");
0225     if (IS_ERR(ad7766->mclk))
0226         return PTR_ERR(ad7766->mclk);
0227
0228     ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd";
0229     ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd";
0230     ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref";
0231
0232     ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg),
0233         ad7766->reg);
0234     if (ret)
0235         return ret;
0236
0237     ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",
0238         GPIOD_OUT_HIGH);
0239     if (IS_ERR(ad7766->pd_gpio))
0240         return PTR_ERR(ad7766->pd_gpio);
0241
0242     indio_dev->name = spi_get_device_id(spi)->name;
0243     indio_dev->modes = INDIO_DIRECT_MODE;
0244     indio_dev->channels = ad7766_channels;
0245     indio_dev->num_channels = ARRAY_SIZE(ad7766_channels);
0246     indio_dev->info = &ad7766_info;
0247
0248     if (spi->irq > 0) {
0249         ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
0250                               indio_dev->name,
0251                               iio_device_id(indio_dev));
0252         if (!ad7766->trig)
0253             return -ENOMEM;
0254
0255         ad7766->trig->ops = &ad7766_trigger_ops;
0256         iio_trigger_set_drvdata(ad7766->trig, ad7766);
0257
0258         /*
0259          * The device generates interrupts as long as it is powered up.
0260          * Some platforms might not allow the option to power it down so
0261          * don't enable the interrupt to avoid extra load on the system
0262          */
0263         ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,
0264                        IRQF_TRIGGER_FALLING | IRQF_NO_AUTOEN,
0265                        dev_name(&spi->dev),
0266                        ad7766->trig);
0267         if (ret < 0)
0268             return ret;
0269
0270         ret = devm_iio_trigger_register(&spi->dev, ad7766->trig);
0271         if (ret)
0272             return ret;
0273     }
0274
0275     ad7766->spi = spi;
0276
0277     /* First byte always 0 */
0278     ad7766->xfer.rx_buf = &ad7766->data[1];
0279     ad7766->xfer.len = 3;
0280
0281     spi_message_init(&ad7766->msg);
0282     spi_message_add_tail(&ad7766->xfer, &ad7766->msg);
0283
0284     ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
0285         &iio_pollfunc_store_time, &ad7766_trigger_handler,
0286         &ad7766_buffer_setup_ops);
0287     if (ret)
0288         return ret;
0289
0290     return devm_iio_device_register(&spi->dev, indio_dev);
0291 }
0292
0293 static const struct spi_device_id ad7766_id[] = {
0294     {"ad7766", ID_AD7766},
0295     {"ad7766-1", ID_AD7766_1},
0296     {"ad7766-2", ID_AD7766_2},
0297     {"ad7767", ID_AD7766},
0298     {"ad7767-1", ID_AD7766_1},
0299     {"ad7767-2", ID_AD7766_2},
0300     {}
0301 };
0302 MODULE_DEVICE_TABLE(spi, ad7766_id);
0303
0304 static struct spi_driver ad7766_driver = {
0305     .driver = {
0306         .name   = "ad7766",
0307     },
0308     .probe      = ad7766_probe,
0309     .id_table   = ad7766_id,
0310 };
0311 module_spi_driver(ad7766_driver);
0312
0313 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
0314 MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support");
0315 MODULE_LICENSE("GPL v2");