iio/adc/ad7606.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * AD7606 SPI ADC driver
0004  *
0005  * Copyright 2011 Analog Devices Inc.
0006  */
0007
0008 #include <linux/delay.h>
0009 #include <linux/device.h>
0010 #include <linux/err.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/interrupt.h>
0013 #include <linux/kernel.h>
0014 #include <linux/module.h>
0015 #include <linux/property.h>
0016 #include <linux/regulator/consumer.h>
0017 #include <linux/sched.h>
0018 #include <linux/slab.h>
0019 #include <linux/sysfs.h>
0020 #include <linux/util_macros.h>
0021
0022 #include <linux/iio/iio.h>
0023 #include <linux/iio/buffer.h>
0024 #include <linux/iio/sysfs.h>
0025 #include <linux/iio/trigger.h>
0026 #include <linux/iio/triggered_buffer.h>
0027 #include <linux/iio/trigger_consumer.h>
0028
0029 #include "ad7606.h"
0030
0031 /*
0032  * Scales are computed as 5000/32768 and 10000/32768 respectively,
0033  * so that when applied to the raw values they provide mV values
0034  */
0035 static const unsigned int ad7606_scale_avail[2] = {
0036     152588, 305176
0037 };
0038
0039
0040 static const unsigned int ad7616_sw_scale_avail[3] = {
0041     76293, 152588, 305176
0042 };
0043
0044 static const unsigned int ad7606_oversampling_avail[7] = {
0045     1, 2, 4, 8, 16, 32, 64,
0046 };
0047
0048 static const unsigned int ad7616_oversampling_avail[8] = {
0049     1, 2, 4, 8, 16, 32, 64, 128,
0050 };
0051
0052 static int ad7606_reset(struct ad7606_state *st)
0053 {
0054     if (st->gpio_reset) {
0055         gpiod_set_value(st->gpio_reset, 1);
0056         ndelay(100); /* t_reset >= 100ns */
0057         gpiod_set_value(st->gpio_reset, 0);
0058         return 0;
0059     }
0060
0061     return -ENODEV;
0062 }
0063
0064 static int ad7606_reg_access(struct iio_dev *indio_dev,
0065                  unsigned int reg,
0066                  unsigned int writeval,
0067                  unsigned int *readval)
0068 {
0069     struct ad7606_state *st = iio_priv(indio_dev);
0070     int ret;
0071
0072     mutex_lock(&st->lock);
0073     if (readval) {
0074         ret = st->bops->reg_read(st, reg);
0075         if (ret < 0)
0076             goto err_unlock;
0077         *readval = ret;
0078         ret = 0;
0079     } else {
0080         ret = st->bops->reg_write(st, reg, writeval);
0081     }
0082 err_unlock:
0083     mutex_unlock(&st->lock);
0084     return ret;
0085 }
0086
0087 static int ad7606_read_samples(struct ad7606_state *st)
0088 {
0089     unsigned int num = st->chip_info->num_channels - 1;
0090     u16 *data = st->data;
0091     int ret;
0092
0093     /*
0094      * The frstdata signal is set to high while and after reading the sample
0095      * of the first channel and low for all other channels. This can be used
0096      * to check that the incoming data is correctly aligned. During normal
0097      * operation the data should never become unaligned, but some glitch or
0098      * electrostatic discharge might cause an extra read or clock cycle.
0099      * Monitoring the frstdata signal allows to recover from such failure
0100      * situations.
0101      */
0102
0103     if (st->gpio_frstdata) {
0104         ret = st->bops->read_block(st->dev, 1, data);
0105         if (ret)
0106             return ret;
0107
0108         if (!gpiod_get_value(st->gpio_frstdata)) {
0109             ad7606_reset(st);
0110             return -EIO;
0111         }
0112
0113         data++;
0114         num--;
0115     }
0116
0117     return st->bops->read_block(st->dev, num, data);
0118 }
0119
0120 static irqreturn_t ad7606_trigger_handler(int irq, void *p)
0121 {
0122     struct iio_poll_func *pf = p;
0123     struct iio_dev *indio_dev = pf->indio_dev;
0124     struct ad7606_state *st = iio_priv(indio_dev);
0125     int ret;
0126
0127     mutex_lock(&st->lock);
0128
0129     ret = ad7606_read_samples(st);
0130     if (ret == 0)
0131         iio_push_to_buffers_with_timestamp(indio_dev, st->data,
0132                            iio_get_time_ns(indio_dev));
0133
0134     iio_trigger_notify_done(indio_dev->trig);
0135     /* The rising edge of the CONVST signal starts a new conversion. */
0136     gpiod_set_value(st->gpio_convst, 1);
0137
0138     mutex_unlock(&st->lock);
0139
0140     return IRQ_HANDLED;
0141 }
0142
0143 static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
0144 {
0145     struct ad7606_state *st = iio_priv(indio_dev);
0146     int ret;
0147
0148     gpiod_set_value(st->gpio_convst, 1);
0149     ret = wait_for_completion_timeout(&st->completion,
0150                       msecs_to_jiffies(1000));
0151     if (!ret) {
0152         ret = -ETIMEDOUT;
0153         goto error_ret;
0154     }
0155
0156     ret = ad7606_read_samples(st);
0157     if (ret == 0)
0158         ret = st->data[ch];
0159
0160 error_ret:
0161     gpiod_set_value(st->gpio_convst, 0);
0162
0163     return ret;
0164 }
0165
0166 static int ad7606_read_raw(struct iio_dev *indio_dev,
0167                struct iio_chan_spec const *chan,
0168                int *val,
0169                int *val2,
0170                long m)
0171 {
0172     int ret, ch = 0;
0173     struct ad7606_state *st = iio_priv(indio_dev);
0174
0175     switch (m) {
0176     case IIO_CHAN_INFO_RAW:
0177         ret = iio_device_claim_direct_mode(indio_dev);
0178         if (ret)
0179             return ret;
0180
0181         ret = ad7606_scan_direct(indio_dev, chan->address);
0182         iio_device_release_direct_mode(indio_dev);
0183
0184         if (ret < 0)
0185             return ret;
0186         *val = (short)ret;
0187         return IIO_VAL_INT;
0188     case IIO_CHAN_INFO_SCALE:
0189         if (st->sw_mode_en)
0190             ch = chan->address;
0191         *val = 0;
0192         *val2 = st->scale_avail[st->range[ch]];
0193         return IIO_VAL_INT_PLUS_MICRO;
0194     case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
0195         *val = st->oversampling;
0196         return IIO_VAL_INT;
0197     }
0198     return -EINVAL;
0199 }
0200
0201 static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals,
0202                  unsigned int n, bool micros)
0203 {
0204     size_t len = 0;
0205     int i;
0206
0207     for (i = 0; i < n; i++) {
0208         len += scnprintf(buf + len, PAGE_SIZE - len,
0209             micros ? "0.%06u " : "%u ", vals[i]);
0210     }
0211     buf[len - 1] = '\n';
0212
0213     return len;
0214 }
0215
0216 static ssize_t in_voltage_scale_available_show(struct device *dev,
0217                            struct device_attribute *attr,
0218                            char *buf)
0219 {
0220     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0221     struct ad7606_state *st = iio_priv(indio_dev);
0222
0223     return ad7606_show_avail(buf, st->scale_avail, st->num_scales, true);
0224 }
0225
0226 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0);
0227
0228 static int ad7606_write_scale_hw(struct iio_dev *indio_dev, int ch, int val)
0229 {
0230     struct ad7606_state *st = iio_priv(indio_dev);
0231
0232     gpiod_set_value(st->gpio_range, val);
0233
0234     return 0;
0235 }
0236
0237 static int ad7606_write_os_hw(struct iio_dev *indio_dev, int val)
0238 {
0239     struct ad7606_state *st = iio_priv(indio_dev);
0240     DECLARE_BITMAP(values, 3);
0241
0242     values[0] = val;
0243
0244     gpiod_set_array_value(ARRAY_SIZE(values), st->gpio_os->desc,
0245                   st->gpio_os->info, values);
0246
0247     /* AD7616 requires a reset to update value */
0248     if (st->chip_info->os_req_reset)
0249         ad7606_reset(st);
0250
0251     return 0;
0252 }
0253
0254 static int ad7606_write_raw(struct iio_dev *indio_dev,
0255                 struct iio_chan_spec const *chan,
0256                 int val,
0257                 int val2,
0258                 long mask)
0259 {
0260     struct ad7606_state *st = iio_priv(indio_dev);
0261     int i, ret, ch = 0;
0262
0263     switch (mask) {
0264     case IIO_CHAN_INFO_SCALE:
0265         mutex_lock(&st->lock);
0266         i = find_closest(val2, st->scale_avail, st->num_scales);
0267         if (st->sw_mode_en)
0268             ch = chan->address;
0269         ret = st->write_scale(indio_dev, ch, i);
0270         if (ret < 0) {
0271             mutex_unlock(&st->lock);
0272             return ret;
0273         }
0274         st->range[ch] = i;
0275         mutex_unlock(&st->lock);
0276
0277         return 0;
0278     case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
0279         if (val2)
0280             return -EINVAL;
0281         i = find_closest(val, st->oversampling_avail,
0282                  st->num_os_ratios);
0283         mutex_lock(&st->lock);
0284         ret = st->write_os(indio_dev, i);
0285         if (ret < 0) {
0286             mutex_unlock(&st->lock);
0287             return ret;
0288         }
0289         st->oversampling = st->oversampling_avail[i];
0290         mutex_unlock(&st->lock);
0291
0292         return 0;
0293     default:
0294         return -EINVAL;
0295     }
0296 }
0297
0298 static ssize_t ad7606_oversampling_ratio_avail(struct device *dev,
0299                            struct device_attribute *attr,
0300                            char *buf)
0301 {
0302     struct iio_dev *indio_dev = dev_to_iio_dev(dev);
0303     struct ad7606_state *st = iio_priv(indio_dev);
0304
0305     return ad7606_show_avail(buf, st->oversampling_avail,
0306                  st->num_os_ratios, false);
0307 }
0308
0309 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444,
0310                ad7606_oversampling_ratio_avail, NULL, 0);
0311
0312 static struct attribute *ad7606_attributes_os_and_range[] = {
0313     &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
0314     &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
0315     NULL,
0316 };
0317
0318 static const struct attribute_group ad7606_attribute_group_os_and_range = {
0319     .attrs = ad7606_attributes_os_and_range,
0320 };
0321
0322 static struct attribute *ad7606_attributes_os[] = {
0323     &iio_dev_attr_oversampling_ratio_available.dev_attr.attr,
0324     NULL,
0325 };
0326
0327 static const struct attribute_group ad7606_attribute_group_os = {
0328     .attrs = ad7606_attributes_os,
0329 };
0330
0331 static struct attribute *ad7606_attributes_range[] = {
0332     &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
0333     NULL,
0334 };
0335
0336 static const struct attribute_group ad7606_attribute_group_range = {
0337     .attrs = ad7606_attributes_range,
0338 };
0339
0340 static const struct iio_chan_spec ad7605_channels[] = {
0341     IIO_CHAN_SOFT_TIMESTAMP(4),
0342     AD7605_CHANNEL(0),
0343     AD7605_CHANNEL(1),
0344     AD7605_CHANNEL(2),
0345     AD7605_CHANNEL(3),
0346 };
0347
0348 static const struct iio_chan_spec ad7606_channels[] = {
0349     IIO_CHAN_SOFT_TIMESTAMP(8),
0350     AD7606_CHANNEL(0),
0351     AD7606_CHANNEL(1),
0352     AD7606_CHANNEL(2),
0353     AD7606_CHANNEL(3),
0354     AD7606_CHANNEL(4),
0355     AD7606_CHANNEL(5),
0356     AD7606_CHANNEL(6),
0357     AD7606_CHANNEL(7),
0358 };
0359
0360 /*
0361  * The current assumption that this driver makes for AD7616, is that it's
0362  * working in Hardware Mode with Serial, Burst and Sequencer modes activated.
0363  * To activate them, following pins must be pulled high:
0364  *  -SER/PAR
0365  *  -SEQEN
0366  * And following pins must be pulled low:
0367  *  -WR/BURST
0368  *  -DB4/SER1W
0369  */
0370 static const struct iio_chan_spec ad7616_channels[] = {
0371     IIO_CHAN_SOFT_TIMESTAMP(16),
0372     AD7606_CHANNEL(0),
0373     AD7606_CHANNEL(1),
0374     AD7606_CHANNEL(2),
0375     AD7606_CHANNEL(3),
0376     AD7606_CHANNEL(4),
0377     AD7606_CHANNEL(5),
0378     AD7606_CHANNEL(6),
0379     AD7606_CHANNEL(7),
0380     AD7606_CHANNEL(8),
0381     AD7606_CHANNEL(9),
0382     AD7606_CHANNEL(10),
0383     AD7606_CHANNEL(11),
0384     AD7606_CHANNEL(12),
0385     AD7606_CHANNEL(13),
0386     AD7606_CHANNEL(14),
0387     AD7606_CHANNEL(15),
0388 };
0389
0390 static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
0391     /* More devices added in future */
0392     [ID_AD7605_4] = {
0393         .channels = ad7605_channels,
0394         .num_channels = 5,
0395     },
0396     [ID_AD7606_8] = {
0397         .channels = ad7606_channels,
0398         .num_channels = 9,
0399         .oversampling_avail = ad7606_oversampling_avail,
0400         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
0401     },
0402     [ID_AD7606_6] = {
0403         .channels = ad7606_channels,
0404         .num_channels = 7,
0405         .oversampling_avail = ad7606_oversampling_avail,
0406         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
0407     },
0408     [ID_AD7606_4] = {
0409         .channels = ad7606_channels,
0410         .num_channels = 5,
0411         .oversampling_avail = ad7606_oversampling_avail,
0412         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
0413     },
0414     [ID_AD7606B] = {
0415         .channels = ad7606_channels,
0416         .num_channels = 9,
0417         .oversampling_avail = ad7606_oversampling_avail,
0418         .oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
0419     },
0420     [ID_AD7616] = {
0421         .channels = ad7616_channels,
0422         .num_channels = 17,
0423         .oversampling_avail = ad7616_oversampling_avail,
0424         .oversampling_num = ARRAY_SIZE(ad7616_oversampling_avail),
0425         .os_req_reset = true,
0426         .init_delay_ms = 15,
0427     },
0428 };
0429
0430 static int ad7606_request_gpios(struct ad7606_state *st)
0431 {
0432     struct device *dev = st->dev;
0433
0434     st->gpio_convst = devm_gpiod_get(dev, "adi,conversion-start",
0435                      GPIOD_OUT_LOW);
0436     if (IS_ERR(st->gpio_convst))
0437         return PTR_ERR(st->gpio_convst);
0438
0439     st->gpio_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
0440     if (IS_ERR(st->gpio_reset))
0441         return PTR_ERR(st->gpio_reset);
0442
0443     st->gpio_range = devm_gpiod_get_optional(dev, "adi,range",
0444                          GPIOD_OUT_LOW);
0445     if (IS_ERR(st->gpio_range))
0446         return PTR_ERR(st->gpio_range);
0447
0448     st->gpio_standby = devm_gpiod_get_optional(dev, "standby",
0449                            GPIOD_OUT_HIGH);
0450     if (IS_ERR(st->gpio_standby))
0451         return PTR_ERR(st->gpio_standby);
0452
0453     st->gpio_frstdata = devm_gpiod_get_optional(dev, "adi,first-data",
0454                             GPIOD_IN);
0455     if (IS_ERR(st->gpio_frstdata))
0456         return PTR_ERR(st->gpio_frstdata);
0457
0458     if (!st->chip_info->oversampling_num)
0459         return 0;
0460
0461     st->gpio_os = devm_gpiod_get_array_optional(dev,
0462                             "adi,oversampling-ratio",
0463                             GPIOD_OUT_LOW);
0464     return PTR_ERR_OR_ZERO(st->gpio_os);
0465 }
0466
0467 /*
0468  * The BUSY signal indicates when conversions are in progress, so when a rising
0469  * edge of CONVST is applied, BUSY goes logic high and transitions low at the
0470  * end of the entire conversion process. The falling edge of the BUSY signal
0471  * triggers this interrupt.
0472  */
0473 static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
0474 {
0475     struct iio_dev *indio_dev = dev_id;
0476     struct ad7606_state *st = iio_priv(indio_dev);
0477
0478     if (iio_buffer_enabled(indio_dev)) {
0479         gpiod_set_value(st->gpio_convst, 0);
0480         iio_trigger_poll_chained(st->trig);
0481     } else {
0482         complete(&st->completion);
0483     }
0484
0485     return IRQ_HANDLED;
0486 };
0487
0488 static int ad7606_validate_trigger(struct iio_dev *indio_dev,
0489                    struct iio_trigger *trig)
0490 {
0491     struct ad7606_state *st = iio_priv(indio_dev);
0492
0493     if (st->trig != trig)
0494         return -EINVAL;
0495
0496     return 0;
0497 }
0498
0499 static int ad7606_buffer_postenable(struct iio_dev *indio_dev)
0500 {
0501     struct ad7606_state *st = iio_priv(indio_dev);
0502
0503     gpiod_set_value(st->gpio_convst, 1);
0504
0505     return 0;
0506 }
0507
0508 static int ad7606_buffer_predisable(struct iio_dev *indio_dev)
0509 {
0510     struct ad7606_state *st = iio_priv(indio_dev);
0511
0512     gpiod_set_value(st->gpio_convst, 0);
0513
0514     return 0;
0515 }
0516
0517 static const struct iio_buffer_setup_ops ad7606_buffer_ops = {
0518     .postenable = &ad7606_buffer_postenable,
0519     .predisable = &ad7606_buffer_predisable,
0520 };
0521
0522 static const struct iio_info ad7606_info_no_os_or_range = {
0523     .read_raw = &ad7606_read_raw,
0524     .validate_trigger = &ad7606_validate_trigger,
0525 };
0526
0527 static const struct iio_info ad7606_info_os_and_range = {
0528     .read_raw = &ad7606_read_raw,
0529     .write_raw = &ad7606_write_raw,
0530     .attrs = &ad7606_attribute_group_os_and_range,
0531     .validate_trigger = &ad7606_validate_trigger,
0532 };
0533
0534 static const struct iio_info ad7606_info_os_range_and_debug = {
0535     .read_raw = &ad7606_read_raw,
0536     .write_raw = &ad7606_write_raw,
0537     .debugfs_reg_access = &ad7606_reg_access,
0538     .attrs = &ad7606_attribute_group_os_and_range,
0539     .validate_trigger = &ad7606_validate_trigger,
0540 };
0541
0542 static const struct iio_info ad7606_info_os = {
0543     .read_raw = &ad7606_read_raw,
0544     .write_raw = &ad7606_write_raw,
0545     .attrs = &ad7606_attribute_group_os,
0546     .validate_trigger = &ad7606_validate_trigger,
0547 };
0548
0549 static const struct iio_info ad7606_info_range = {
0550     .read_raw = &ad7606_read_raw,
0551     .write_raw = &ad7606_write_raw,
0552     .attrs = &ad7606_attribute_group_range,
0553     .validate_trigger = &ad7606_validate_trigger,
0554 };
0555
0556 static const struct iio_trigger_ops ad7606_trigger_ops = {
0557     .validate_device = iio_trigger_validate_own_device,
0558 };
0559
0560 static void ad7606_regulator_disable(void *data)
0561 {
0562     struct ad7606_state *st = data;
0563
0564     regulator_disable(st->reg);
0565 }
0566
0567 int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
0568          const char *name, unsigned int id,
0569          const struct ad7606_bus_ops *bops)
0570 {
0571     struct ad7606_state *st;
0572     int ret;
0573     struct iio_dev *indio_dev;
0574
0575     indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
0576     if (!indio_dev)
0577         return -ENOMEM;
0578
0579     st = iio_priv(indio_dev);
0580     dev_set_drvdata(dev, indio_dev);
0581
0582     st->dev = dev;
0583     mutex_init(&st->lock);
0584     st->bops = bops;
0585     st->base_address = base_address;
0586     /* tied to logic low, analog input range is +/- 5V */
0587     st->range[0] = 0;
0588     st->oversampling = 1;
0589     st->scale_avail = ad7606_scale_avail;
0590     st->num_scales = ARRAY_SIZE(ad7606_scale_avail);
0591
0592     st->reg = devm_regulator_get(dev, "avcc");
0593     if (IS_ERR(st->reg))
0594         return PTR_ERR(st->reg);
0595
0596     ret = regulator_enable(st->reg);
0597     if (ret) {
0598         dev_err(dev, "Failed to enable specified AVcc supply\n");
0599         return ret;
0600     }
0601
0602     ret = devm_add_action_or_reset(dev, ad7606_regulator_disable, st);
0603     if (ret)
0604         return ret;
0605
0606     st->chip_info = &ad7606_chip_info_tbl[id];
0607
0608     if (st->chip_info->oversampling_num) {
0609         st->oversampling_avail = st->chip_info->oversampling_avail;
0610         st->num_os_ratios = st->chip_info->oversampling_num;
0611     }
0612
0613     ret = ad7606_request_gpios(st);
0614     if (ret)
0615         return ret;
0616
0617     if (st->gpio_os) {
0618         if (st->gpio_range)
0619             indio_dev->info = &ad7606_info_os_and_range;
0620         else
0621             indio_dev->info = &ad7606_info_os;
0622     } else {
0623         if (st->gpio_range)
0624             indio_dev->info = &ad7606_info_range;
0625         else
0626             indio_dev->info = &ad7606_info_no_os_or_range;
0627     }
0628     indio_dev->modes = INDIO_DIRECT_MODE;
0629     indio_dev->name = name;
0630     indio_dev->channels = st->chip_info->channels;
0631     indio_dev->num_channels = st->chip_info->num_channels;
0632
0633     init_completion(&st->completion);
0634
0635     ret = ad7606_reset(st);
0636     if (ret)
0637         dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
0638
0639     /* AD7616 requires al least 15ms to reconfigure after a reset */
0640     if (st->chip_info->init_delay_ms) {
0641         if (msleep_interruptible(st->chip_info->init_delay_ms))
0642             return -ERESTARTSYS;
0643     }
0644
0645     st->write_scale = ad7606_write_scale_hw;
0646     st->write_os = ad7606_write_os_hw;
0647
0648     if (st->bops->sw_mode_config)
0649         st->sw_mode_en = device_property_present(st->dev,
0650                              "adi,sw-mode");
0651
0652     if (st->sw_mode_en) {
0653         /* Scale of 0.076293 is only available in sw mode */
0654         st->scale_avail = ad7616_sw_scale_avail;
0655         st->num_scales = ARRAY_SIZE(ad7616_sw_scale_avail);
0656
0657         /* After reset, in software mode, ±10 V is set by default */
0658         memset32(st->range, 2, ARRAY_SIZE(st->range));
0659         indio_dev->info = &ad7606_info_os_range_and_debug;
0660
0661         ret = st->bops->sw_mode_config(indio_dev);
0662         if (ret < 0)
0663             return ret;
0664     }
0665
0666     st->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
0667                       indio_dev->name,
0668                       iio_device_id(indio_dev));
0669     if (!st->trig)
0670         return -ENOMEM;
0671
0672     st->trig->ops = &ad7606_trigger_ops;
0673     iio_trigger_set_drvdata(st->trig, indio_dev);
0674     ret = devm_iio_trigger_register(dev, st->trig);
0675     if (ret)
0676         return ret;
0677
0678     indio_dev->trig = iio_trigger_get(st->trig);
0679
0680     ret = devm_request_threaded_irq(dev, irq,
0681                     NULL,
0682                     &ad7606_interrupt,
0683                     IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
0684                     name, indio_dev);
0685     if (ret)
0686         return ret;
0687
0688     ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
0689                           &iio_pollfunc_store_time,
0690                           &ad7606_trigger_handler,
0691                           &ad7606_buffer_ops);
0692     if (ret)
0693         return ret;
0694
0695     return devm_iio_device_register(dev, indio_dev);
0696 }
0697 EXPORT_SYMBOL_NS_GPL(ad7606_probe, IIO_AD7606);
0698
0699 #ifdef CONFIG_PM_SLEEP
0700
0701 static int ad7606_suspend(struct device *dev)
0702 {
0703     struct iio_dev *indio_dev = dev_get_drvdata(dev);
0704     struct ad7606_state *st = iio_priv(indio_dev);
0705
0706     if (st->gpio_standby) {
0707         gpiod_set_value(st->gpio_range, 1);
0708         gpiod_set_value(st->gpio_standby, 0);
0709     }
0710
0711     return 0;
0712 }
0713
0714 static int ad7606_resume(struct device *dev)
0715 {
0716     struct iio_dev *indio_dev = dev_get_drvdata(dev);
0717     struct ad7606_state *st = iio_priv(indio_dev);
0718
0719     if (st->gpio_standby) {
0720         gpiod_set_value(st->gpio_range, st->range[0]);
0721         gpiod_set_value(st->gpio_standby, 1);
0722         ad7606_reset(st);
0723     }
0724
0725     return 0;
0726 }
0727
0728 SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
0729 EXPORT_SYMBOL_NS_GPL(ad7606_pm_ops, IIO_AD7606);
0730
0731 #endif
0732
0733 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
0734 MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
0735 MODULE_LICENSE("GPL v2");