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0007 #include <linux/module.h>
0008 #include <linux/i2c.h>
0009 #include <linux/interrupt.h>
0010 #include <linux/delay.h>
0011 #include <linux/bitops.h>
0012 #include <linux/slab.h>
0013 #include <linux/string.h>
0014 #include <linux/acpi.h>
0015 #include <linux/pm.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/regulator/consumer.h>
0018 #include <linux/iio/iio.h>
0019 #include <linux/iio/sysfs.h>
0020 #include <linux/iio/buffer.h>
0021 #include <linux/iio/trigger.h>
0022 #include <linux/iio/events.h>
0023 #include <linux/iio/trigger_consumer.h>
0024 #include <linux/iio/triggered_buffer.h>
0025 #include <linux/iio/accel/kxcjk_1013.h>
0026
0027 #define KXCJK1013_DRV_NAME "kxcjk1013"
0028 #define KXCJK1013_IRQ_NAME "kxcjk1013_event"
0029
0030 #define KXTF9_REG_HP_XOUT_L 0x00
0031 #define KXTF9_REG_HP_XOUT_H 0x01
0032 #define KXTF9_REG_HP_YOUT_L 0x02
0033 #define KXTF9_REG_HP_YOUT_H 0x03
0034 #define KXTF9_REG_HP_ZOUT_L 0x04
0035 #define KXTF9_REG_HP_ZOUT_H 0x05
0036
0037 #define KXCJK1013_REG_XOUT_L 0x06
0038
0039
0040
0041
0042
0043 #define KXCJK1013_REG_XOUT_H 0x07
0044 #define KXCJK1013_REG_YOUT_L 0x08
0045 #define KXCJK1013_REG_YOUT_H 0x09
0046 #define KXCJK1013_REG_ZOUT_L 0x0A
0047 #define KXCJK1013_REG_ZOUT_H 0x0B
0048
0049 #define KXCJK1013_REG_DCST_RESP 0x0C
0050 #define KXCJK1013_REG_WHO_AM_I 0x0F
0051 #define KXTF9_REG_TILT_POS_CUR 0x10
0052 #define KXTF9_REG_TILT_POS_PREV 0x11
0053 #define KXTF9_REG_INT_SRC1 0x15
0054 #define KXTF9_REG_INT_SRC2 0x16
0055 #define KXCJK1013_REG_INT_SRC1 0x16
0056 #define KXCJK1013_REG_INT_SRC2 0x17
0057 #define KXCJK1013_REG_STATUS_REG 0x18
0058 #define KXCJK1013_REG_INT_REL 0x1A
0059 #define KXCJK1013_REG_CTRL1 0x1B
0060 #define KXTF9_REG_CTRL2 0x1C
0061 #define KXTF9_REG_CTRL3 0x1D
0062 #define KXCJK1013_REG_CTRL2 0x1D
0063 #define KXCJK1013_REG_INT_CTRL1 0x1E
0064 #define KXCJK1013_REG_INT_CTRL2 0x1F
0065 #define KXTF9_REG_INT_CTRL3 0x20
0066 #define KXCJK1013_REG_DATA_CTRL 0x21
0067 #define KXTF9_REG_TILT_TIMER 0x28
0068 #define KXCJK1013_REG_WAKE_TIMER 0x29
0069 #define KXTF9_REG_TDT_TIMER 0x2B
0070 #define KXTF9_REG_TDT_THRESH_H 0x2C
0071 #define KXTF9_REG_TDT_THRESH_L 0x2D
0072 #define KXTF9_REG_TDT_TAP_TIMER 0x2E
0073 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F
0074 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30
0075 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31
0076 #define KXCJK1013_REG_SELF_TEST 0x3A
0077 #define KXTF9_REG_WAKE_THRESH 0x5A
0078 #define KXTF9_REG_TILT_ANGLE 0x5C
0079 #define KXTF9_REG_HYST_SET 0x5F
0080 #define KXCJK1013_REG_WAKE_THRES 0x6A
0081
0082
0083 #define KX023_REG_INS1 0x12
0084 #define KX023_REG_INS2 0x13
0085 #define KX023_REG_INS3 0x14
0086 #define KX023_REG_STAT 0x15
0087 #define KX023_REG_INT_REL 0x17
0088 #define KX023_REG_CNTL1 0x18
0089 #define KX023_REG_CNTL2 0x19
0090 #define KX023_REG_CNTL3 0x1A
0091 #define KX023_REG_ODCNTL 0x1B
0092 #define KX023_REG_INC1 0x1C
0093 #define KX023_REG_INC2 0x1D
0094 #define KX023_REG_INC3 0x1E
0095 #define KX023_REG_INC4 0x1F
0096 #define KX023_REG_INC5 0x20
0097 #define KX023_REG_INC6 0x21
0098 #define KX023_REG_TILT_TIMER 0x22
0099 #define KX023_REG_WUFC 0x23
0100 #define KX023_REG_TDTRC 0x24
0101 #define KX023_REG_TDTC 0x25
0102 #define KX023_REG_TTH 0x26
0103 #define KX023_REG_TTL 0x27
0104 #define KX023_REG_FTD 0x28
0105 #define KX023_REG_STD 0x29
0106 #define KX023_REG_TLT 0x2A
0107 #define KX023_REG_TWS 0x2B
0108 #define KX023_REG_ATH 0x30
0109 #define KX023_REG_TILT_ANGLE_LL 0x32
0110 #define KX023_REG_TILT_ANGLE_HL 0x33
0111 #define KX023_REG_HYST_SET 0x34
0112 #define KX023_REG_LP_CNTL 0x35
0113 #define KX023_REG_BUF_CNTL1 0x3A
0114 #define KX023_REG_BUF_CNTL2 0x3B
0115 #define KX023_REG_BUF_STATUS_1 0x3C
0116 #define KX023_REG_BUF_STATUS_2 0x3D
0117 #define KX023_REG_BUF_CLEAR 0x3E
0118 #define KX023_REG_BUF_READ 0x3F
0119 #define KX023_REG_SELF_TEST 0x60
0120
0121 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7)
0122 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6)
0123 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5)
0124 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4)
0125 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3)
0126 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1)
0127
0128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2)
0129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3)
0130 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4)
0131 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5)
0132
0133 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5)
0134 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4)
0135 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3)
0136 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2)
0137 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1)
0138 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0)
0139
0140 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF
0141 #define KXCJK1013_MAX_STARTUP_TIME_US 100000
0142
0143 #define KXCJK1013_SLEEP_DELAY_MS 2000
0144
0145 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0)
0146 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1)
0147 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3))
0148 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0
0149 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2)
0150 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3)
0151 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4)
0152
0153
0154 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0)
0155 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1)
0156 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2)
0157 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3)
0158 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4)
0159 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5)
0160
0161
0162 #define KX023_REG_INC4_BFI1 BIT(6)
0163 #define KX023_REG_INC4_WMI1 BIT(5)
0164 #define KX023_REG_INC4_DRDY1 BIT(4)
0165 #define KX023_REG_INC4_TDTI1 BIT(2)
0166 #define KX023_REG_INC4_WUFI1 BIT(1)
0167 #define KX023_REG_INC4_TPI1 BIT(0)
0168
0169 #define KXCJK1013_DEFAULT_WAKE_THRES 1
0170
0171 enum kx_chipset {
0172 KXCJK1013,
0173 KXCJ91008,
0174 KXTJ21009,
0175 KXTF9,
0176 KX0231025,
0177 KX_MAX_CHIPS
0178 };
0179
0180 enum kx_acpi_type {
0181 ACPI_GENERIC,
0182 ACPI_SMO8500,
0183 ACPI_KIOX010A,
0184 };
0185
0186 struct kx_chipset_regs {
0187 u8 int_src1;
0188 u8 int_src2;
0189 u8 int_rel;
0190 u8 ctrl1;
0191 u8 wuf_ctrl;
0192 u8 int_ctrl1;
0193 u8 data_ctrl;
0194 u8 wake_timer;
0195 u8 wake_thres;
0196 };
0197
0198 static const struct kx_chipset_regs kxcjk1013_regs = {
0199 .int_src1 = KXCJK1013_REG_INT_SRC1,
0200 .int_src2 = KXCJK1013_REG_INT_SRC2,
0201 .int_rel = KXCJK1013_REG_INT_REL,
0202 .ctrl1 = KXCJK1013_REG_CTRL1,
0203 .wuf_ctrl = KXCJK1013_REG_CTRL2,
0204 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
0205 .data_ctrl = KXCJK1013_REG_DATA_CTRL,
0206 .wake_timer = KXCJK1013_REG_WAKE_TIMER,
0207 .wake_thres = KXCJK1013_REG_WAKE_THRES,
0208 };
0209
0210 static const struct kx_chipset_regs kxtf9_regs = {
0211
0212 .int_src1 = KXTF9_REG_INT_SRC2,
0213
0214 .int_rel = KXCJK1013_REG_INT_REL,
0215 .ctrl1 = KXCJK1013_REG_CTRL1,
0216 .wuf_ctrl = KXTF9_REG_CTRL3,
0217 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1,
0218 .data_ctrl = KXCJK1013_REG_DATA_CTRL,
0219 .wake_timer = KXCJK1013_REG_WAKE_TIMER,
0220 .wake_thres = KXTF9_REG_WAKE_THRESH,
0221 };
0222
0223
0224 static const struct kx_chipset_regs kx0231025_regs = {
0225 .int_src1 = KX023_REG_INS2,
0226 .int_src2 = KX023_REG_INS3,
0227 .int_rel = KX023_REG_INT_REL,
0228 .ctrl1 = KX023_REG_CNTL1,
0229 .wuf_ctrl = KX023_REG_CNTL3,
0230 .int_ctrl1 = KX023_REG_INC1,
0231 .data_ctrl = KX023_REG_ODCNTL,
0232 .wake_timer = KX023_REG_WUFC,
0233 .wake_thres = KX023_REG_ATH,
0234 };
0235
0236 enum kxcjk1013_axis {
0237 AXIS_X,
0238 AXIS_Y,
0239 AXIS_Z,
0240 AXIS_MAX
0241 };
0242
0243 struct kxcjk1013_data {
0244 struct regulator_bulk_data regulators[2];
0245 struct i2c_client *client;
0246 struct iio_trigger *dready_trig;
0247 struct iio_trigger *motion_trig;
0248 struct iio_mount_matrix orientation;
0249 struct mutex mutex;
0250
0251 struct {
0252 s16 chans[AXIS_MAX];
0253 s64 timestamp __aligned(8);
0254 } scan;
0255 u8 odr_bits;
0256 u8 range;
0257 int wake_thres;
0258 int wake_dur;
0259 bool active_high_intr;
0260 bool dready_trigger_on;
0261 int ev_enable_state;
0262 bool motion_trigger_on;
0263 int64_t timestamp;
0264 enum kx_chipset chipset;
0265 enum kx_acpi_type acpi_type;
0266 const struct kx_chipset_regs *regs;
0267 };
0268
0269 enum kxcjk1013_mode {
0270 STANDBY,
0271 OPERATION,
0272 };
0273
0274 enum kxcjk1013_range {
0275 KXCJK1013_RANGE_2G,
0276 KXCJK1013_RANGE_4G,
0277 KXCJK1013_RANGE_8G,
0278 };
0279
0280 struct kx_odr_map {
0281 int val;
0282 int val2;
0283 int odr_bits;
0284 int wuf_bits;
0285 };
0286
0287 static const struct kx_odr_map samp_freq_table[] = {
0288 { 0, 781000, 0x08, 0x00 },
0289 { 1, 563000, 0x09, 0x01 },
0290 { 3, 125000, 0x0A, 0x02 },
0291 { 6, 250000, 0x0B, 0x03 },
0292 { 12, 500000, 0x00, 0x04 },
0293 { 25, 0, 0x01, 0x05 },
0294 { 50, 0, 0x02, 0x06 },
0295 { 100, 0, 0x03, 0x06 },
0296 { 200, 0, 0x04, 0x06 },
0297 { 400, 0, 0x05, 0x06 },
0298 { 800, 0, 0x06, 0x06 },
0299 { 1600, 0, 0x07, 0x06 },
0300 };
0301
0302 static const char *const kxcjk1013_samp_freq_avail =
0303 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600";
0304
0305 static const struct kx_odr_map kxtf9_samp_freq_table[] = {
0306 { 25, 0, 0x01, 0x00 },
0307 { 50, 0, 0x02, 0x01 },
0308 { 100, 0, 0x03, 0x01 },
0309 { 200, 0, 0x04, 0x01 },
0310 { 400, 0, 0x05, 0x01 },
0311 { 800, 0, 0x06, 0x01 },
0312 };
0313
0314 static const char *const kxtf9_samp_freq_avail =
0315 "25 50 100 200 400 800";
0316
0317
0318 static __maybe_unused const struct {
0319 int odr_bits;
0320 int usec;
0321 } odr_start_up_times[KX_MAX_CHIPS][12] = {
0322
0323 {
0324 {0x08, 100000},
0325 {0x09, 100000},
0326 {0x0A, 100000},
0327 {0x0B, 100000},
0328 {0, 80000},
0329 {0x01, 41000},
0330 {0x02, 21000},
0331 {0x03, 11000},
0332 {0x04, 6400},
0333 {0x05, 3900},
0334 {0x06, 2700},
0335 {0x07, 2100},
0336 },
0337
0338 {
0339 {0x08, 100000},
0340 {0x09, 100000},
0341 {0x0A, 100000},
0342 {0x0B, 100000},
0343 {0, 80000},
0344 {0x01, 41000},
0345 {0x02, 21000},
0346 {0x03, 11000},
0347 {0x04, 6400},
0348 {0x05, 3900},
0349 {0x06, 2700},
0350 {0x07, 2100},
0351 },
0352
0353 {
0354 {0x08, 1240000},
0355 {0x09, 621000},
0356 {0x0A, 309000},
0357 {0x0B, 151000},
0358 {0, 80000},
0359 {0x01, 41000},
0360 {0x02, 21000},
0361 {0x03, 11000},
0362 {0x04, 6000},
0363 {0x05, 4000},
0364 {0x06, 3000},
0365 {0x07, 2000},
0366 },
0367
0368 {
0369 {0x01, 81000},
0370 {0x02, 41000},
0371 {0x03, 21000},
0372 {0x04, 11000},
0373 {0x05, 5100},
0374 {0x06, 2700},
0375 },
0376
0377 {
0378
0379 {0x08, 1240000},
0380 {0x09, 621000},
0381 {0x0A, 309000},
0382 {0x0B, 151000},
0383 {0, 81000},
0384 {0x01, 40000},
0385 {0x02, 22000},
0386 {0x03, 12000},
0387 {0x04, 7000},
0388 {0x05, 4400},
0389 {0x06, 3000},
0390 {0x07, 3000},
0391 },
0392 };
0393
0394 static const struct {
0395 u16 scale;
0396 u8 gsel_0;
0397 u8 gsel_1;
0398 } KXCJK1013_scale_table[] = { {9582, 0, 0},
0399 {19163, 1, 0},
0400 {38326, 0, 1} };
0401
0402 #ifdef CONFIG_ACPI
0403 enum kiox010a_fn_index {
0404 KIOX010A_SET_LAPTOP_MODE = 1,
0405 KIOX010A_SET_TABLET_MODE = 2,
0406 };
0407
0408 static int kiox010a_dsm(struct device *dev, int fn_index)
0409 {
0410 acpi_handle handle = ACPI_HANDLE(dev);
0411 guid_t kiox010a_dsm_guid;
0412 union acpi_object *obj;
0413
0414 if (!handle)
0415 return -ENODEV;
0416
0417 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid);
0418
0419 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL);
0420 if (!obj)
0421 return -EIO;
0422
0423 ACPI_FREE(obj);
0424 return 0;
0425 }
0426 #endif
0427
0428 static int kxcjk1013_set_mode(struct kxcjk1013_data *data,
0429 enum kxcjk1013_mode mode)
0430 {
0431 int ret;
0432
0433 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0434 if (ret < 0) {
0435 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0436 return ret;
0437 }
0438
0439 if (mode == STANDBY)
0440 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1;
0441 else
0442 ret |= KXCJK1013_REG_CTRL1_BIT_PC1;
0443
0444 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
0445 if (ret < 0) {
0446 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
0447 return ret;
0448 }
0449
0450 return 0;
0451 }
0452
0453 static int kxcjk1013_get_mode(struct kxcjk1013_data *data,
0454 enum kxcjk1013_mode *mode)
0455 {
0456 int ret;
0457
0458 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0459 if (ret < 0) {
0460 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0461 return ret;
0462 }
0463
0464 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1)
0465 *mode = OPERATION;
0466 else
0467 *mode = STANDBY;
0468
0469 return 0;
0470 }
0471
0472 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index)
0473 {
0474 int ret;
0475
0476 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0477 if (ret < 0) {
0478 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0479 return ret;
0480 }
0481
0482 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 |
0483 KXCJK1013_REG_CTRL1_BIT_GSEL1);
0484 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3);
0485 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4);
0486
0487 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
0488 if (ret < 0) {
0489 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
0490 return ret;
0491 }
0492
0493 data->range = range_index;
0494
0495 return 0;
0496 }
0497
0498 static int kxcjk1013_chip_init(struct kxcjk1013_data *data)
0499 {
0500 int ret;
0501
0502 #ifdef CONFIG_ACPI
0503 if (data->acpi_type == ACPI_KIOX010A) {
0504
0505 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE);
0506 }
0507 #endif
0508
0509 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I);
0510 if (ret < 0) {
0511 dev_err(&data->client->dev, "Error reading who_am_i\n");
0512 return ret;
0513 }
0514
0515 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret);
0516
0517 ret = kxcjk1013_set_mode(data, STANDBY);
0518 if (ret < 0)
0519 return ret;
0520
0521 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0522 if (ret < 0) {
0523 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0524 return ret;
0525 }
0526
0527
0528 ret |= KXCJK1013_REG_CTRL1_BIT_RES;
0529
0530 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
0531 if (ret < 0) {
0532 dev_err(&data->client->dev, "Error reading reg_ctrl\n");
0533 return ret;
0534 }
0535
0536
0537 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G);
0538 if (ret < 0)
0539 return ret;
0540
0541 ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl);
0542 if (ret < 0) {
0543 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n");
0544 return ret;
0545 }
0546
0547 data->odr_bits = ret;
0548
0549
0550 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
0551 if (ret < 0) {
0552 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
0553 return ret;
0554 }
0555
0556 if (data->active_high_intr)
0557 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA;
0558 else
0559 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA;
0560
0561 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
0562 if (ret < 0) {
0563 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
0564 return ret;
0565 }
0566
0567
0568 if (data->chipset == KX0231025 && data->client->irq > 0) {
0569 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4,
0570 KX023_REG_INC4_DRDY1 |
0571 KX023_REG_INC4_WUFI1);
0572 if (ret < 0) {
0573 dev_err(&data->client->dev, "Error writing reg_inc4\n");
0574 return ret;
0575 }
0576 }
0577
0578 ret = kxcjk1013_set_mode(data, OPERATION);
0579 if (ret < 0)
0580 return ret;
0581
0582 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES;
0583
0584 return 0;
0585 }
0586
0587 #ifdef CONFIG_PM
0588 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data)
0589 {
0590 int i;
0591 int idx = data->chipset;
0592
0593 for (i = 0; i < ARRAY_SIZE(odr_start_up_times[idx]); ++i) {
0594 if (odr_start_up_times[idx][i].odr_bits == data->odr_bits)
0595 return odr_start_up_times[idx][i].usec;
0596 }
0597
0598 return KXCJK1013_MAX_STARTUP_TIME_US;
0599 }
0600 #endif
0601
0602 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on)
0603 {
0604 #ifdef CONFIG_PM
0605 int ret;
0606
0607 if (on)
0608 ret = pm_runtime_resume_and_get(&data->client->dev);
0609 else {
0610 pm_runtime_mark_last_busy(&data->client->dev);
0611 ret = pm_runtime_put_autosuspend(&data->client->dev);
0612 }
0613 if (ret < 0) {
0614 dev_err(&data->client->dev,
0615 "Failed: %s for %d\n", __func__, on);
0616 return ret;
0617 }
0618 #endif
0619
0620 return 0;
0621 }
0622
0623 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data)
0624 {
0625 int ret;
0626
0627 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer,
0628 data->wake_dur);
0629 if (ret < 0) {
0630 dev_err(&data->client->dev,
0631 "Error writing reg_wake_timer\n");
0632 return ret;
0633 }
0634
0635 ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres,
0636 data->wake_thres);
0637 if (ret < 0) {
0638 dev_err(&data->client->dev, "Error writing reg_wake_thres\n");
0639 return ret;
0640 }
0641
0642 return 0;
0643 }
0644
0645 static int kxcjk1013_setup_any_motion_interrupt(struct kxcjk1013_data *data,
0646 bool status)
0647 {
0648 int ret;
0649 enum kxcjk1013_mode store_mode;
0650
0651 ret = kxcjk1013_get_mode(data, &store_mode);
0652 if (ret < 0)
0653 return ret;
0654
0655
0656 ret = kxcjk1013_set_mode(data, STANDBY);
0657 if (ret < 0)
0658 return ret;
0659
0660 ret = kxcjk1013_chip_update_thresholds(data);
0661 if (ret < 0)
0662 return ret;
0663
0664 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
0665 if (ret < 0) {
0666 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
0667 return ret;
0668 }
0669
0670 if (status)
0671 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
0672 else
0673 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
0674
0675 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
0676 if (ret < 0) {
0677 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
0678 return ret;
0679 }
0680
0681 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0682 if (ret < 0) {
0683 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0684 return ret;
0685 }
0686
0687 if (status)
0688 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE;
0689 else
0690 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE;
0691
0692 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
0693 if (ret < 0) {
0694 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
0695 return ret;
0696 }
0697
0698 if (store_mode == OPERATION) {
0699 ret = kxcjk1013_set_mode(data, OPERATION);
0700 if (ret < 0)
0701 return ret;
0702 }
0703
0704 return 0;
0705 }
0706
0707 static int kxcjk1013_setup_new_data_interrupt(struct kxcjk1013_data *data,
0708 bool status)
0709 {
0710 int ret;
0711 enum kxcjk1013_mode store_mode;
0712
0713 ret = kxcjk1013_get_mode(data, &store_mode);
0714 if (ret < 0)
0715 return ret;
0716
0717
0718 ret = kxcjk1013_set_mode(data, STANDBY);
0719 if (ret < 0)
0720 return ret;
0721
0722 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1);
0723 if (ret < 0) {
0724 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n");
0725 return ret;
0726 }
0727
0728 if (status)
0729 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN;
0730 else
0731 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN;
0732
0733 ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret);
0734 if (ret < 0) {
0735 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
0736 return ret;
0737 }
0738
0739 ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1);
0740 if (ret < 0) {
0741 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
0742 return ret;
0743 }
0744
0745 if (status)
0746 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY;
0747 else
0748 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY;
0749
0750 ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret);
0751 if (ret < 0) {
0752 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
0753 return ret;
0754 }
0755
0756 if (store_mode == OPERATION) {
0757 ret = kxcjk1013_set_mode(data, OPERATION);
0758 if (ret < 0)
0759 return ret;
0760 }
0761
0762 return 0;
0763 }
0764
0765 static const struct kx_odr_map *kxcjk1013_find_odr_value(
0766 const struct kx_odr_map *map, size_t map_size, int val, int val2)
0767 {
0768 int i;
0769
0770 for (i = 0; i < map_size; ++i) {
0771 if (map[i].val == val && map[i].val2 == val2)
0772 return &map[i];
0773 }
0774
0775 return ERR_PTR(-EINVAL);
0776 }
0777
0778 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map,
0779 size_t map_size, int odr_bits,
0780 int *val, int *val2)
0781 {
0782 int i;
0783
0784 for (i = 0; i < map_size; ++i) {
0785 if (map[i].odr_bits == odr_bits) {
0786 *val = map[i].val;
0787 *val2 = map[i].val2;
0788 return IIO_VAL_INT_PLUS_MICRO;
0789 }
0790 }
0791
0792 return -EINVAL;
0793 }
0794
0795 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2)
0796 {
0797 int ret;
0798 enum kxcjk1013_mode store_mode;
0799 const struct kx_odr_map *odr_setting;
0800
0801 ret = kxcjk1013_get_mode(data, &store_mode);
0802 if (ret < 0)
0803 return ret;
0804
0805 if (data->chipset == KXTF9)
0806 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table,
0807 ARRAY_SIZE(kxtf9_samp_freq_table),
0808 val, val2);
0809 else
0810 odr_setting = kxcjk1013_find_odr_value(samp_freq_table,
0811 ARRAY_SIZE(samp_freq_table),
0812 val, val2);
0813
0814 if (IS_ERR(odr_setting))
0815 return PTR_ERR(odr_setting);
0816
0817
0818 ret = kxcjk1013_set_mode(data, STANDBY);
0819 if (ret < 0)
0820 return ret;
0821
0822 ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl,
0823 odr_setting->odr_bits);
0824 if (ret < 0) {
0825 dev_err(&data->client->dev, "Error writing data_ctrl\n");
0826 return ret;
0827 }
0828
0829 data->odr_bits = odr_setting->odr_bits;
0830
0831 ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl,
0832 odr_setting->wuf_bits);
0833 if (ret < 0) {
0834 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
0835 return ret;
0836 }
0837
0838 if (store_mode == OPERATION) {
0839 ret = kxcjk1013_set_mode(data, OPERATION);
0840 if (ret < 0)
0841 return ret;
0842 }
0843
0844 return 0;
0845 }
0846
0847 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2)
0848 {
0849 if (data->chipset == KXTF9)
0850 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table,
0851 ARRAY_SIZE(kxtf9_samp_freq_table),
0852 data->odr_bits, val, val2);
0853 else
0854 return kxcjk1013_convert_odr_value(samp_freq_table,
0855 ARRAY_SIZE(samp_freq_table),
0856 data->odr_bits, val, val2);
0857 }
0858
0859 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis)
0860 {
0861 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2;
0862 int ret;
0863
0864 ret = i2c_smbus_read_word_data(data->client, reg);
0865 if (ret < 0) {
0866 dev_err(&data->client->dev,
0867 "failed to read accel_%c registers\n", 'x' + axis);
0868 return ret;
0869 }
0870
0871 return ret;
0872 }
0873
0874 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val)
0875 {
0876 int ret, i;
0877 enum kxcjk1013_mode store_mode;
0878
0879 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) {
0880 if (KXCJK1013_scale_table[i].scale == val) {
0881 ret = kxcjk1013_get_mode(data, &store_mode);
0882 if (ret < 0)
0883 return ret;
0884
0885 ret = kxcjk1013_set_mode(data, STANDBY);
0886 if (ret < 0)
0887 return ret;
0888
0889 ret = kxcjk1013_set_range(data, i);
0890 if (ret < 0)
0891 return ret;
0892
0893 if (store_mode == OPERATION) {
0894 ret = kxcjk1013_set_mode(data, OPERATION);
0895 if (ret)
0896 return ret;
0897 }
0898
0899 return 0;
0900 }
0901 }
0902
0903 return -EINVAL;
0904 }
0905
0906 static int kxcjk1013_read_raw(struct iio_dev *indio_dev,
0907 struct iio_chan_spec const *chan, int *val,
0908 int *val2, long mask)
0909 {
0910 struct kxcjk1013_data *data = iio_priv(indio_dev);
0911 int ret;
0912
0913 switch (mask) {
0914 case IIO_CHAN_INFO_RAW:
0915 mutex_lock(&data->mutex);
0916 if (iio_buffer_enabled(indio_dev))
0917 ret = -EBUSY;
0918 else {
0919 ret = kxcjk1013_set_power_state(data, true);
0920 if (ret < 0) {
0921 mutex_unlock(&data->mutex);
0922 return ret;
0923 }
0924 ret = kxcjk1013_get_acc_reg(data, chan->scan_index);
0925 if (ret < 0) {
0926 kxcjk1013_set_power_state(data, false);
0927 mutex_unlock(&data->mutex);
0928 return ret;
0929 }
0930 *val = sign_extend32(ret >> chan->scan_type.shift,
0931 chan->scan_type.realbits - 1);
0932 ret = kxcjk1013_set_power_state(data, false);
0933 }
0934 mutex_unlock(&data->mutex);
0935
0936 if (ret < 0)
0937 return ret;
0938
0939 return IIO_VAL_INT;
0940
0941 case IIO_CHAN_INFO_SCALE:
0942 *val = 0;
0943 *val2 = KXCJK1013_scale_table[data->range].scale;
0944 return IIO_VAL_INT_PLUS_MICRO;
0945
0946 case IIO_CHAN_INFO_SAMP_FREQ:
0947 mutex_lock(&data->mutex);
0948 ret = kxcjk1013_get_odr(data, val, val2);
0949 mutex_unlock(&data->mutex);
0950 return ret;
0951
0952 default:
0953 return -EINVAL;
0954 }
0955 }
0956
0957 static int kxcjk1013_write_raw(struct iio_dev *indio_dev,
0958 struct iio_chan_spec const *chan, int val,
0959 int val2, long mask)
0960 {
0961 struct kxcjk1013_data *data = iio_priv(indio_dev);
0962 int ret;
0963
0964 switch (mask) {
0965 case IIO_CHAN_INFO_SAMP_FREQ:
0966 mutex_lock(&data->mutex);
0967 ret = kxcjk1013_set_odr(data, val, val2);
0968 mutex_unlock(&data->mutex);
0969 break;
0970 case IIO_CHAN_INFO_SCALE:
0971 if (val)
0972 return -EINVAL;
0973
0974 mutex_lock(&data->mutex);
0975 ret = kxcjk1013_set_scale(data, val2);
0976 mutex_unlock(&data->mutex);
0977 break;
0978 default:
0979 ret = -EINVAL;
0980 }
0981
0982 return ret;
0983 }
0984
0985 static int kxcjk1013_read_event(struct iio_dev *indio_dev,
0986 const struct iio_chan_spec *chan,
0987 enum iio_event_type type,
0988 enum iio_event_direction dir,
0989 enum iio_event_info info,
0990 int *val, int *val2)
0991 {
0992 struct kxcjk1013_data *data = iio_priv(indio_dev);
0993
0994 *val2 = 0;
0995 switch (info) {
0996 case IIO_EV_INFO_VALUE:
0997 *val = data->wake_thres;
0998 break;
0999 case IIO_EV_INFO_PERIOD:
1000 *val = data->wake_dur;
1001 break;
1002 default:
1003 return -EINVAL;
1004 }
1005
1006 return IIO_VAL_INT;
1007 }
1008
1009 static int kxcjk1013_write_event(struct iio_dev *indio_dev,
1010 const struct iio_chan_spec *chan,
1011 enum iio_event_type type,
1012 enum iio_event_direction dir,
1013 enum iio_event_info info,
1014 int val, int val2)
1015 {
1016 struct kxcjk1013_data *data = iio_priv(indio_dev);
1017
1018 if (data->ev_enable_state)
1019 return -EBUSY;
1020
1021 switch (info) {
1022 case IIO_EV_INFO_VALUE:
1023 data->wake_thres = val;
1024 break;
1025 case IIO_EV_INFO_PERIOD:
1026 data->wake_dur = val;
1027 break;
1028 default:
1029 return -EINVAL;
1030 }
1031
1032 return 0;
1033 }
1034
1035 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev,
1036 const struct iio_chan_spec *chan,
1037 enum iio_event_type type,
1038 enum iio_event_direction dir)
1039 {
1040 struct kxcjk1013_data *data = iio_priv(indio_dev);
1041
1042 return data->ev_enable_state;
1043 }
1044
1045 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev,
1046 const struct iio_chan_spec *chan,
1047 enum iio_event_type type,
1048 enum iio_event_direction dir,
1049 int state)
1050 {
1051 struct kxcjk1013_data *data = iio_priv(indio_dev);
1052 int ret;
1053
1054 if (state && data->ev_enable_state)
1055 return 0;
1056
1057 mutex_lock(&data->mutex);
1058
1059 if (!state && data->motion_trigger_on) {
1060 data->ev_enable_state = 0;
1061 mutex_unlock(&data->mutex);
1062 return 0;
1063 }
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074 ret = kxcjk1013_set_power_state(data, state);
1075 if (ret < 0) {
1076 mutex_unlock(&data->mutex);
1077 return ret;
1078 }
1079
1080 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1081 if (ret < 0) {
1082 kxcjk1013_set_power_state(data, false);
1083 data->ev_enable_state = 0;
1084 mutex_unlock(&data->mutex);
1085 return ret;
1086 }
1087
1088 data->ev_enable_state = state;
1089 mutex_unlock(&data->mutex);
1090
1091 return 0;
1092 }
1093
1094 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev)
1095 {
1096 struct kxcjk1013_data *data = iio_priv(indio_dev);
1097
1098 return kxcjk1013_set_power_state(data, true);
1099 }
1100
1101 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev)
1102 {
1103 struct kxcjk1013_data *data = iio_priv(indio_dev);
1104
1105 return kxcjk1013_set_power_state(data, false);
1106 }
1107
1108 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev,
1109 struct device_attribute *attr,
1110 char *buf)
1111 {
1112 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
1113 struct kxcjk1013_data *data = iio_priv(indio_dev);
1114 const char *str;
1115
1116 if (data->chipset == KXTF9)
1117 str = kxtf9_samp_freq_avail;
1118 else
1119 str = kxcjk1013_samp_freq_avail;
1120
1121 return sprintf(buf, "%s\n", str);
1122 }
1123
1124 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO,
1125 kxcjk1013_get_samp_freq_avail, NULL, 0);
1126
1127 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326");
1128
1129 static struct attribute *kxcjk1013_attributes[] = {
1130 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr,
1131 &iio_const_attr_in_accel_scale_available.dev_attr.attr,
1132 NULL,
1133 };
1134
1135 static const struct attribute_group kxcjk1013_attrs_group = {
1136 .attrs = kxcjk1013_attributes,
1137 };
1138
1139 static const struct iio_event_spec kxcjk1013_event = {
1140 .type = IIO_EV_TYPE_THRESH,
1141 .dir = IIO_EV_DIR_EITHER,
1142 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1143 BIT(IIO_EV_INFO_ENABLE) |
1144 BIT(IIO_EV_INFO_PERIOD)
1145 };
1146
1147 static const struct iio_mount_matrix *
1148 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev,
1149 const struct iio_chan_spec *chan)
1150 {
1151 struct kxcjk1013_data *data = iio_priv(indio_dev);
1152
1153 return &data->orientation;
1154 }
1155
1156 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = {
1157 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix),
1158 { }
1159 };
1160
1161 #define KXCJK1013_CHANNEL(_axis) { \
1162 .type = IIO_ACCEL, \
1163 .modified = 1, \
1164 .channel2 = IIO_MOD_##_axis, \
1165 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
1166 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
1167 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
1168 .scan_index = AXIS_##_axis, \
1169 .scan_type = { \
1170 .sign = 's', \
1171 .realbits = 12, \
1172 .storagebits = 16, \
1173 .shift = 4, \
1174 .endianness = IIO_LE, \
1175 }, \
1176 .event_spec = &kxcjk1013_event, \
1177 .ext_info = kxcjk1013_ext_info, \
1178 .num_event_specs = 1 \
1179 }
1180
1181 static const struct iio_chan_spec kxcjk1013_channels[] = {
1182 KXCJK1013_CHANNEL(X),
1183 KXCJK1013_CHANNEL(Y),
1184 KXCJK1013_CHANNEL(Z),
1185 IIO_CHAN_SOFT_TIMESTAMP(3),
1186 };
1187
1188 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = {
1189 .preenable = kxcjk1013_buffer_preenable,
1190 .postdisable = kxcjk1013_buffer_postdisable,
1191 };
1192
1193 static const struct iio_info kxcjk1013_info = {
1194 .attrs = &kxcjk1013_attrs_group,
1195 .read_raw = kxcjk1013_read_raw,
1196 .write_raw = kxcjk1013_write_raw,
1197 .read_event_value = kxcjk1013_read_event,
1198 .write_event_value = kxcjk1013_write_event,
1199 .write_event_config = kxcjk1013_write_event_config,
1200 .read_event_config = kxcjk1013_read_event_config,
1201 };
1202
1203 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0};
1204
1205 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p)
1206 {
1207 struct iio_poll_func *pf = p;
1208 struct iio_dev *indio_dev = pf->indio_dev;
1209 struct kxcjk1013_data *data = iio_priv(indio_dev);
1210 int ret;
1211
1212 mutex_lock(&data->mutex);
1213 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client,
1214 KXCJK1013_REG_XOUT_L,
1215 AXIS_MAX * 2,
1216 (u8 *)data->scan.chans);
1217 mutex_unlock(&data->mutex);
1218 if (ret < 0)
1219 goto err;
1220
1221 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
1222 data->timestamp);
1223 err:
1224 iio_trigger_notify_done(indio_dev->trig);
1225
1226 return IRQ_HANDLED;
1227 }
1228
1229 static void kxcjk1013_trig_reen(struct iio_trigger *trig)
1230 {
1231 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1232 struct kxcjk1013_data *data = iio_priv(indio_dev);
1233 int ret;
1234
1235 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1236 if (ret < 0)
1237 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1238 }
1239
1240 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig,
1241 bool state)
1242 {
1243 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1244 struct kxcjk1013_data *data = iio_priv(indio_dev);
1245 int ret;
1246
1247 mutex_lock(&data->mutex);
1248
1249 if (!state && data->ev_enable_state && data->motion_trigger_on) {
1250 data->motion_trigger_on = false;
1251 mutex_unlock(&data->mutex);
1252 return 0;
1253 }
1254
1255 ret = kxcjk1013_set_power_state(data, state);
1256 if (ret < 0) {
1257 mutex_unlock(&data->mutex);
1258 return ret;
1259 }
1260 if (data->motion_trig == trig)
1261 ret = kxcjk1013_setup_any_motion_interrupt(data, state);
1262 else
1263 ret = kxcjk1013_setup_new_data_interrupt(data, state);
1264 if (ret < 0) {
1265 kxcjk1013_set_power_state(data, false);
1266 mutex_unlock(&data->mutex);
1267 return ret;
1268 }
1269 if (data->motion_trig == trig)
1270 data->motion_trigger_on = state;
1271 else
1272 data->dready_trigger_on = state;
1273
1274 mutex_unlock(&data->mutex);
1275
1276 return 0;
1277 }
1278
1279 static const struct iio_trigger_ops kxcjk1013_trigger_ops = {
1280 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state,
1281 .reenable = kxcjk1013_trig_reen,
1282 };
1283
1284 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev)
1285 {
1286 struct kxcjk1013_data *data = iio_priv(indio_dev);
1287
1288 int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2);
1289 if (ret < 0) {
1290 dev_err(&data->client->dev, "Error reading reg_int_src2\n");
1291 return;
1292 }
1293
1294 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN)
1295 iio_push_event(indio_dev,
1296 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1297 0,
1298 IIO_MOD_X,
1299 IIO_EV_TYPE_THRESH,
1300 IIO_EV_DIR_FALLING),
1301 data->timestamp);
1302
1303 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP)
1304 iio_push_event(indio_dev,
1305 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1306 0,
1307 IIO_MOD_X,
1308 IIO_EV_TYPE_THRESH,
1309 IIO_EV_DIR_RISING),
1310 data->timestamp);
1311
1312 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN)
1313 iio_push_event(indio_dev,
1314 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1315 0,
1316 IIO_MOD_Y,
1317 IIO_EV_TYPE_THRESH,
1318 IIO_EV_DIR_FALLING),
1319 data->timestamp);
1320
1321 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP)
1322 iio_push_event(indio_dev,
1323 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1324 0,
1325 IIO_MOD_Y,
1326 IIO_EV_TYPE_THRESH,
1327 IIO_EV_DIR_RISING),
1328 data->timestamp);
1329
1330 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN)
1331 iio_push_event(indio_dev,
1332 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1333 0,
1334 IIO_MOD_Z,
1335 IIO_EV_TYPE_THRESH,
1336 IIO_EV_DIR_FALLING),
1337 data->timestamp);
1338
1339 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP)
1340 iio_push_event(indio_dev,
1341 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1342 0,
1343 IIO_MOD_Z,
1344 IIO_EV_TYPE_THRESH,
1345 IIO_EV_DIR_RISING),
1346 data->timestamp);
1347 }
1348
1349 static irqreturn_t kxcjk1013_event_handler(int irq, void *private)
1350 {
1351 struct iio_dev *indio_dev = private;
1352 struct kxcjk1013_data *data = iio_priv(indio_dev);
1353 int ret;
1354
1355 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1);
1356 if (ret < 0) {
1357 dev_err(&data->client->dev, "Error reading reg_int_src1\n");
1358 goto ack_intr;
1359 }
1360
1361 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) {
1362 if (data->chipset == KXTF9)
1363 iio_push_event(indio_dev,
1364 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1365 0,
1366 IIO_MOD_X_AND_Y_AND_Z,
1367 IIO_EV_TYPE_THRESH,
1368 IIO_EV_DIR_RISING),
1369 data->timestamp);
1370 else
1371 kxcjk1013_report_motion_event(indio_dev);
1372 }
1373
1374 ack_intr:
1375 if (data->dready_trigger_on)
1376 return IRQ_HANDLED;
1377
1378 ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel);
1379 if (ret < 0)
1380 dev_err(&data->client->dev, "Error reading reg_int_rel\n");
1381
1382 return IRQ_HANDLED;
1383 }
1384
1385 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private)
1386 {
1387 struct iio_dev *indio_dev = private;
1388 struct kxcjk1013_data *data = iio_priv(indio_dev);
1389
1390 data->timestamp = iio_get_time_ns(indio_dev);
1391
1392 if (data->dready_trigger_on)
1393 iio_trigger_poll(data->dready_trig);
1394 else if (data->motion_trigger_on)
1395 iio_trigger_poll(data->motion_trig);
1396
1397 if (data->ev_enable_state)
1398 return IRQ_WAKE_THREAD;
1399 else
1400 return IRQ_HANDLED;
1401 }
1402
1403 static const char *kxcjk1013_match_acpi_device(struct device *dev,
1404 enum kx_chipset *chipset,
1405 enum kx_acpi_type *acpi_type,
1406 const char **label)
1407 {
1408 const struct acpi_device_id *id;
1409
1410 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1411 if (!id)
1412 return NULL;
1413
1414 if (strcmp(id->id, "SMO8500") == 0) {
1415 *acpi_type = ACPI_SMO8500;
1416 } else if (strcmp(id->id, "KIOX010A") == 0) {
1417 *acpi_type = ACPI_KIOX010A;
1418 *label = "accel-display";
1419 } else if (strcmp(id->id, "KIOX020A") == 0) {
1420 *label = "accel-base";
1421 }
1422
1423 *chipset = (enum kx_chipset)id->driver_data;
1424
1425 return dev_name(dev);
1426 }
1427
1428 static void kxcjk1013_disable_regulators(void *d)
1429 {
1430 struct kxcjk1013_data *data = d;
1431
1432 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
1433 }
1434
1435 static int kxcjk1013_probe(struct i2c_client *client,
1436 const struct i2c_device_id *id)
1437 {
1438 struct kxcjk1013_data *data;
1439 struct iio_dev *indio_dev;
1440 struct kxcjk_1013_platform_data *pdata;
1441 const char *name;
1442 int ret;
1443
1444 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1445 if (!indio_dev)
1446 return -ENOMEM;
1447
1448 data = iio_priv(indio_dev);
1449 i2c_set_clientdata(client, indio_dev);
1450 data->client = client;
1451
1452 pdata = dev_get_platdata(&client->dev);
1453 if (pdata) {
1454 data->active_high_intr = pdata->active_high_intr;
1455 data->orientation = pdata->orientation;
1456 } else {
1457 data->active_high_intr = true;
1458
1459 ret = iio_read_mount_matrix(&client->dev, &data->orientation);
1460 if (ret)
1461 return ret;
1462 }
1463
1464 data->regulators[0].supply = "vdd";
1465 data->regulators[1].supply = "vddio";
1466 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(data->regulators),
1467 data->regulators);
1468 if (ret)
1469 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n");
1470
1471 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
1472 data->regulators);
1473 if (ret)
1474 return ret;
1475
1476 ret = devm_add_action_or_reset(&client->dev, kxcjk1013_disable_regulators, data);
1477 if (ret)
1478 return ret;
1479
1480
1481
1482
1483
1484
1485 msleep(20);
1486
1487 if (id) {
1488 data->chipset = (enum kx_chipset)(id->driver_data);
1489 name = id->name;
1490 } else if (ACPI_HANDLE(&client->dev)) {
1491 name = kxcjk1013_match_acpi_device(&client->dev,
1492 &data->chipset,
1493 &data->acpi_type,
1494 &indio_dev->label);
1495 } else
1496 return -ENODEV;
1497
1498 switch (data->chipset) {
1499 case KXCJK1013:
1500 case KXCJ91008:
1501 case KXTJ21009:
1502 data->regs = &kxcjk1013_regs;
1503 break;
1504 case KXTF9:
1505 data->regs = &kxtf9_regs;
1506 break;
1507 case KX0231025:
1508 data->regs = &kx0231025_regs;
1509 break;
1510 default:
1511 return -EINVAL;
1512 }
1513
1514 ret = kxcjk1013_chip_init(data);
1515 if (ret < 0)
1516 return ret;
1517
1518 mutex_init(&data->mutex);
1519
1520 indio_dev->channels = kxcjk1013_channels;
1521 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels);
1522 indio_dev->available_scan_masks = kxcjk1013_scan_masks;
1523 indio_dev->name = name;
1524 indio_dev->modes = INDIO_DIRECT_MODE;
1525 indio_dev->info = &kxcjk1013_info;
1526
1527 if (client->irq > 0 && data->acpi_type != ACPI_SMO8500) {
1528 ret = devm_request_threaded_irq(&client->dev, client->irq,
1529 kxcjk1013_data_rdy_trig_poll,
1530 kxcjk1013_event_handler,
1531 IRQF_TRIGGER_RISING,
1532 KXCJK1013_IRQ_NAME,
1533 indio_dev);
1534 if (ret)
1535 goto err_poweroff;
1536
1537 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1538 "%s-dev%d",
1539 indio_dev->name,
1540 iio_device_id(indio_dev));
1541 if (!data->dready_trig) {
1542 ret = -ENOMEM;
1543 goto err_poweroff;
1544 }
1545
1546 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1547 "%s-any-motion-dev%d",
1548 indio_dev->name,
1549 iio_device_id(indio_dev));
1550 if (!data->motion_trig) {
1551 ret = -ENOMEM;
1552 goto err_poweroff;
1553 }
1554
1555 data->dready_trig->ops = &kxcjk1013_trigger_ops;
1556 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1557 ret = iio_trigger_register(data->dready_trig);
1558 if (ret)
1559 goto err_poweroff;
1560
1561 indio_dev->trig = iio_trigger_get(data->dready_trig);
1562
1563 data->motion_trig->ops = &kxcjk1013_trigger_ops;
1564 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1565 ret = iio_trigger_register(data->motion_trig);
1566 if (ret) {
1567 data->motion_trig = NULL;
1568 goto err_trigger_unregister;
1569 }
1570 }
1571
1572 ret = iio_triggered_buffer_setup(indio_dev,
1573 &iio_pollfunc_store_time,
1574 kxcjk1013_trigger_handler,
1575 &kxcjk1013_buffer_setup_ops);
1576 if (ret < 0) {
1577 dev_err(&client->dev, "iio triggered buffer setup failed\n");
1578 goto err_trigger_unregister;
1579 }
1580
1581 ret = pm_runtime_set_active(&client->dev);
1582 if (ret)
1583 goto err_buffer_cleanup;
1584
1585 pm_runtime_enable(&client->dev);
1586 pm_runtime_set_autosuspend_delay(&client->dev,
1587 KXCJK1013_SLEEP_DELAY_MS);
1588 pm_runtime_use_autosuspend(&client->dev);
1589
1590 ret = iio_device_register(indio_dev);
1591 if (ret < 0) {
1592 dev_err(&client->dev, "unable to register iio device\n");
1593 goto err_pm_cleanup;
1594 }
1595
1596 return 0;
1597
1598 err_pm_cleanup:
1599 pm_runtime_dont_use_autosuspend(&client->dev);
1600 pm_runtime_disable(&client->dev);
1601 err_buffer_cleanup:
1602 iio_triggered_buffer_cleanup(indio_dev);
1603 err_trigger_unregister:
1604 if (data->dready_trig)
1605 iio_trigger_unregister(data->dready_trig);
1606 if (data->motion_trig)
1607 iio_trigger_unregister(data->motion_trig);
1608 err_poweroff:
1609 kxcjk1013_set_mode(data, STANDBY);
1610
1611 return ret;
1612 }
1613
1614 static int kxcjk1013_remove(struct i2c_client *client)
1615 {
1616 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1617 struct kxcjk1013_data *data = iio_priv(indio_dev);
1618
1619 iio_device_unregister(indio_dev);
1620
1621 pm_runtime_disable(&client->dev);
1622 pm_runtime_set_suspended(&client->dev);
1623
1624 iio_triggered_buffer_cleanup(indio_dev);
1625 if (data->dready_trig) {
1626 iio_trigger_unregister(data->dready_trig);
1627 iio_trigger_unregister(data->motion_trig);
1628 }
1629
1630 mutex_lock(&data->mutex);
1631 kxcjk1013_set_mode(data, STANDBY);
1632 mutex_unlock(&data->mutex);
1633
1634 return 0;
1635 }
1636
1637 #ifdef CONFIG_PM_SLEEP
1638 static int kxcjk1013_suspend(struct device *dev)
1639 {
1640 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1641 struct kxcjk1013_data *data = iio_priv(indio_dev);
1642 int ret;
1643
1644 mutex_lock(&data->mutex);
1645 ret = kxcjk1013_set_mode(data, STANDBY);
1646 mutex_unlock(&data->mutex);
1647
1648 return ret;
1649 }
1650
1651 static int kxcjk1013_resume(struct device *dev)
1652 {
1653 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1654 struct kxcjk1013_data *data = iio_priv(indio_dev);
1655 int ret = 0;
1656
1657 mutex_lock(&data->mutex);
1658 ret = kxcjk1013_set_mode(data, OPERATION);
1659 if (ret == 0)
1660 ret = kxcjk1013_set_range(data, data->range);
1661 mutex_unlock(&data->mutex);
1662
1663 return ret;
1664 }
1665 #endif
1666
1667 #ifdef CONFIG_PM
1668 static int kxcjk1013_runtime_suspend(struct device *dev)
1669 {
1670 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1671 struct kxcjk1013_data *data = iio_priv(indio_dev);
1672 int ret;
1673
1674 ret = kxcjk1013_set_mode(data, STANDBY);
1675 if (ret < 0) {
1676 dev_err(&data->client->dev, "powering off device failed\n");
1677 return -EAGAIN;
1678 }
1679 return 0;
1680 }
1681
1682 static int kxcjk1013_runtime_resume(struct device *dev)
1683 {
1684 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1685 struct kxcjk1013_data *data = iio_priv(indio_dev);
1686 int ret;
1687 int sleep_val;
1688
1689 ret = kxcjk1013_set_mode(data, OPERATION);
1690 if (ret < 0)
1691 return ret;
1692
1693 sleep_val = kxcjk1013_get_startup_times(data);
1694 if (sleep_val < 20000)
1695 usleep_range(sleep_val, 20000);
1696 else
1697 msleep_interruptible(sleep_val/1000);
1698
1699 return 0;
1700 }
1701 #endif
1702
1703 static const struct dev_pm_ops kxcjk1013_pm_ops = {
1704 SET_SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume)
1705 SET_RUNTIME_PM_OPS(kxcjk1013_runtime_suspend,
1706 kxcjk1013_runtime_resume, NULL)
1707 };
1708
1709 static const struct acpi_device_id kx_acpi_match[] = {
1710 {"KXCJ1013", KXCJK1013},
1711 {"KXCJ1008", KXCJ91008},
1712 {"KXCJ9000", KXCJ91008},
1713 {"KIOX0008", KXCJ91008},
1714 {"KIOX0009", KXTJ21009},
1715 {"KIOX000A", KXCJ91008},
1716 {"KIOX010A", KXCJ91008},
1717 {"KIOX020A", KXCJ91008},
1718 {"KXTJ1009", KXTJ21009},
1719 {"KXJ2109", KXTJ21009},
1720 {"SMO8500", KXCJ91008},
1721 { },
1722 };
1723 MODULE_DEVICE_TABLE(acpi, kx_acpi_match);
1724
1725 static const struct i2c_device_id kxcjk1013_id[] = {
1726 {"kxcjk1013", KXCJK1013},
1727 {"kxcj91008", KXCJ91008},
1728 {"kxtj21009", KXTJ21009},
1729 {"kxtf9", KXTF9},
1730 {"kx023-1025", KX0231025},
1731 {"SMO8500", KXCJ91008},
1732 {}
1733 };
1734
1735 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id);
1736
1737 static const struct of_device_id kxcjk1013_of_match[] = {
1738 { .compatible = "kionix,kxcjk1013", },
1739 { .compatible = "kionix,kxcj91008", },
1740 { .compatible = "kionix,kxtj21009", },
1741 { .compatible = "kionix,kxtf9", },
1742 { .compatible = "kionix,kx023-1025", },
1743 { }
1744 };
1745 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match);
1746
1747 static struct i2c_driver kxcjk1013_driver = {
1748 .driver = {
1749 .name = KXCJK1013_DRV_NAME,
1750 .acpi_match_table = ACPI_PTR(kx_acpi_match),
1751 .of_match_table = kxcjk1013_of_match,
1752 .pm = &kxcjk1013_pm_ops,
1753 },
1754 .probe = kxcjk1013_probe,
1755 .remove = kxcjk1013_remove,
1756 .id_table = kxcjk1013_id,
1757 };
1758 module_i2c_driver(kxcjk1013_driver);
1759
1760 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1761 MODULE_LICENSE("GPL v2");
1762 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver");