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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * NXP FXLS8962AF/FXLS8964AF Accelerometer Core Driver
0004  *
0005  * Copyright 2021 Connected Cars A/S
0006  *
0007  * Datasheet:
0008  * https://www.nxp.com/docs/en/data-sheet/FXLS8962AF.pdf
0009  * https://www.nxp.com/docs/en/data-sheet/FXLS8964AF.pdf
0010  *
0011  * Errata:
0012  * https://www.nxp.com/docs/en/errata/ES_FXLS8962AF.pdf
0013  */
0014 
0015 #include <linux/bits.h>
0016 #include <linux/bitfield.h>
0017 #include <linux/i2c.h>
0018 #include <linux/module.h>
0019 #include <linux/of_irq.h>
0020 #include <linux/pm_runtime.h>
0021 #include <linux/regulator/consumer.h>
0022 #include <linux/regmap.h>
0023 
0024 #include <linux/iio/buffer.h>
0025 #include <linux/iio/events.h>
0026 #include <linux/iio/iio.h>
0027 #include <linux/iio/kfifo_buf.h>
0028 #include <linux/iio/sysfs.h>
0029 
0030 #include "fxls8962af.h"
0031 
0032 #define FXLS8962AF_INT_STATUS           0x00
0033 #define FXLS8962AF_INT_STATUS_SRC_BOOT      BIT(0)
0034 #define FXLS8962AF_INT_STATUS_SRC_SDCD_OT   BIT(4)
0035 #define FXLS8962AF_INT_STATUS_SRC_BUF       BIT(5)
0036 #define FXLS8962AF_INT_STATUS_SRC_DRDY      BIT(7)
0037 #define FXLS8962AF_TEMP_OUT         0x01
0038 #define FXLS8962AF_VECM_LSB         0x02
0039 #define FXLS8962AF_OUT_X_LSB            0x04
0040 #define FXLS8962AF_OUT_Y_LSB            0x06
0041 #define FXLS8962AF_OUT_Z_LSB            0x08
0042 #define FXLS8962AF_BUF_STATUS           0x0b
0043 #define FXLS8962AF_BUF_STATUS_BUF_CNT       GENMASK(5, 0)
0044 #define FXLS8962AF_BUF_STATUS_BUF_OVF       BIT(6)
0045 #define FXLS8962AF_BUF_STATUS_BUF_WMRK      BIT(7)
0046 #define FXLS8962AF_BUF_X_LSB            0x0c
0047 #define FXLS8962AF_BUF_Y_LSB            0x0e
0048 #define FXLS8962AF_BUF_Z_LSB            0x10
0049 
0050 #define FXLS8962AF_PROD_REV         0x12
0051 #define FXLS8962AF_WHO_AM_I         0x13
0052 
0053 #define FXLS8962AF_SYS_MODE         0x14
0054 #define FXLS8962AF_SENS_CONFIG1         0x15
0055 #define FXLS8962AF_SENS_CONFIG1_ACTIVE      BIT(0)
0056 #define FXLS8962AF_SENS_CONFIG1_RST     BIT(7)
0057 #define FXLS8962AF_SC1_FSR_MASK         GENMASK(2, 1)
0058 #define FXLS8962AF_SC1_FSR_PREP(x)      FIELD_PREP(FXLS8962AF_SC1_FSR_MASK, (x))
0059 #define FXLS8962AF_SC1_FSR_GET(x)       FIELD_GET(FXLS8962AF_SC1_FSR_MASK, (x))
0060 
0061 #define FXLS8962AF_SENS_CONFIG2         0x16
0062 #define FXLS8962AF_SENS_CONFIG3         0x17
0063 #define FXLS8962AF_SC3_WAKE_ODR_MASK        GENMASK(7, 4)
0064 #define FXLS8962AF_SC3_WAKE_ODR_PREP(x)     FIELD_PREP(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
0065 #define FXLS8962AF_SC3_WAKE_ODR_GET(x)      FIELD_GET(FXLS8962AF_SC3_WAKE_ODR_MASK, (x))
0066 #define FXLS8962AF_SENS_CONFIG4         0x18
0067 #define FXLS8962AF_SC4_INT_PP_OD_MASK       BIT(1)
0068 #define FXLS8962AF_SC4_INT_PP_OD_PREP(x)    FIELD_PREP(FXLS8962AF_SC4_INT_PP_OD_MASK, (x))
0069 #define FXLS8962AF_SC4_INT_POL_MASK     BIT(0)
0070 #define FXLS8962AF_SC4_INT_POL_PREP(x)      FIELD_PREP(FXLS8962AF_SC4_INT_POL_MASK, (x))
0071 #define FXLS8962AF_SENS_CONFIG5         0x19
0072 
0073 #define FXLS8962AF_WAKE_IDLE_LSB        0x1b
0074 #define FXLS8962AF_SLEEP_IDLE_LSB       0x1c
0075 #define FXLS8962AF_ASLP_COUNT_LSB       0x1e
0076 
0077 #define FXLS8962AF_INT_EN           0x20
0078 #define FXLS8962AF_INT_EN_SDCD_OT_EN        BIT(5)
0079 #define FXLS8962AF_INT_EN_BUF_EN        BIT(6)
0080 #define FXLS8962AF_INT_PIN_SEL          0x21
0081 #define FXLS8962AF_INT_PIN_SEL_MASK     GENMASK(7, 0)
0082 #define FXLS8962AF_INT_PIN_SEL_INT1     0x00
0083 #define FXLS8962AF_INT_PIN_SEL_INT2     GENMASK(7, 0)
0084 
0085 #define FXLS8962AF_OFF_X            0x22
0086 #define FXLS8962AF_OFF_Y            0x23
0087 #define FXLS8962AF_OFF_Z            0x24
0088 
0089 #define FXLS8962AF_BUF_CONFIG1          0x26
0090 #define FXLS8962AF_BC1_BUF_MODE_MASK        GENMASK(6, 5)
0091 #define FXLS8962AF_BC1_BUF_MODE_PREP(x)     FIELD_PREP(FXLS8962AF_BC1_BUF_MODE_MASK, (x))
0092 #define FXLS8962AF_BUF_CONFIG2          0x27
0093 #define FXLS8962AF_BUF_CONFIG2_BUF_WMRK     GENMASK(5, 0)
0094 
0095 #define FXLS8962AF_ORIENT_STATUS        0x28
0096 #define FXLS8962AF_ORIENT_CONFIG        0x29
0097 #define FXLS8962AF_ORIENT_DBCOUNT       0x2a
0098 #define FXLS8962AF_ORIENT_BF_ZCOMP      0x2b
0099 #define FXLS8962AF_ORIENT_THS_REG       0x2c
0100 
0101 #define FXLS8962AF_SDCD_INT_SRC1        0x2d
0102 #define FXLS8962AF_SDCD_INT_SRC1_X_OT       BIT(5)
0103 #define FXLS8962AF_SDCD_INT_SRC1_X_POL      BIT(4)
0104 #define FXLS8962AF_SDCD_INT_SRC1_Y_OT       BIT(3)
0105 #define FXLS8962AF_SDCD_INT_SRC1_Y_POL      BIT(2)
0106 #define FXLS8962AF_SDCD_INT_SRC1_Z_OT       BIT(1)
0107 #define FXLS8962AF_SDCD_INT_SRC1_Z_POL      BIT(0)
0108 #define FXLS8962AF_SDCD_INT_SRC2        0x2e
0109 #define FXLS8962AF_SDCD_CONFIG1         0x2f
0110 #define FXLS8962AF_SDCD_CONFIG1_Z_OT_EN     BIT(3)
0111 #define FXLS8962AF_SDCD_CONFIG1_Y_OT_EN     BIT(4)
0112 #define FXLS8962AF_SDCD_CONFIG1_X_OT_EN     BIT(5)
0113 #define FXLS8962AF_SDCD_CONFIG1_OT_ELE      BIT(7)
0114 #define FXLS8962AF_SDCD_CONFIG2         0x30
0115 #define FXLS8962AF_SDCD_CONFIG2_SDCD_EN     BIT(7)
0116 #define FXLS8962AF_SC2_REF_UPDM_AC      GENMASK(6, 5)
0117 #define FXLS8962AF_SDCD_OT_DBCNT        0x31
0118 #define FXLS8962AF_SDCD_WT_DBCNT        0x32
0119 #define FXLS8962AF_SDCD_LTHS_LSB        0x33
0120 #define FXLS8962AF_SDCD_UTHS_LSB        0x35
0121 
0122 #define FXLS8962AF_SELF_TEST_CONFIG1        0x37
0123 #define FXLS8962AF_SELF_TEST_CONFIG2        0x38
0124 
0125 #define FXLS8962AF_MAX_REG          0x38
0126 
0127 #define FXLS8962AF_DEVICE_ID            0x62
0128 #define FXLS8964AF_DEVICE_ID            0x84
0129 
0130 /* Raw temp channel offset */
0131 #define FXLS8962AF_TEMP_CENTER_VAL      25
0132 
0133 #define FXLS8962AF_AUTO_SUSPEND_DELAY_MS    2000
0134 
0135 #define FXLS8962AF_FIFO_LENGTH          32
0136 #define FXLS8962AF_SCALE_TABLE_LEN      4
0137 #define FXLS8962AF_SAMP_FREQ_TABLE_LEN      13
0138 
0139 static const int fxls8962af_scale_table[FXLS8962AF_SCALE_TABLE_LEN][2] = {
0140     {0, IIO_G_TO_M_S_2(980000)},
0141     {0, IIO_G_TO_M_S_2(1950000)},
0142     {0, IIO_G_TO_M_S_2(3910000)},
0143     {0, IIO_G_TO_M_S_2(7810000)},
0144 };
0145 
0146 static const int fxls8962af_samp_freq_table[FXLS8962AF_SAMP_FREQ_TABLE_LEN][2] = {
0147     {3200, 0}, {1600, 0}, {800, 0}, {400, 0}, {200, 0}, {100, 0},
0148     {50, 0}, {25, 0}, {12, 500000}, {6, 250000}, {3, 125000},
0149     {1, 563000}, {0, 781000},
0150 };
0151 
0152 struct fxls8962af_chip_info {
0153     const char *name;
0154     const struct iio_chan_spec *channels;
0155     int num_channels;
0156     u8 chip_id;
0157 };
0158 
0159 struct fxls8962af_data {
0160     struct regmap *regmap;
0161     const struct fxls8962af_chip_info *chip_info;
0162     struct regulator *vdd_reg;
0163     struct {
0164         __le16 channels[3];
0165         s64 ts __aligned(8);
0166     } scan;
0167     int64_t timestamp, old_timestamp;   /* Only used in hw fifo mode. */
0168     struct iio_mount_matrix orientation;
0169     int irq;
0170     u8 watermark;
0171     u8 enable_event;
0172     u16 lower_thres;
0173     u16 upper_thres;
0174 };
0175 
0176 const struct regmap_config fxls8962af_i2c_regmap_conf = {
0177     .reg_bits = 8,
0178     .val_bits = 8,
0179     .max_register = FXLS8962AF_MAX_REG,
0180 };
0181 EXPORT_SYMBOL_NS_GPL(fxls8962af_i2c_regmap_conf, IIO_FXLS8962AF);
0182 
0183 const struct regmap_config fxls8962af_spi_regmap_conf = {
0184     .reg_bits = 8,
0185     .pad_bits = 8,
0186     .val_bits = 8,
0187     .max_register = FXLS8962AF_MAX_REG,
0188 };
0189 EXPORT_SYMBOL_NS_GPL(fxls8962af_spi_regmap_conf, IIO_FXLS8962AF);
0190 
0191 enum {
0192     fxls8962af_idx_x,
0193     fxls8962af_idx_y,
0194     fxls8962af_idx_z,
0195     fxls8962af_idx_ts,
0196 };
0197 
0198 enum fxls8962af_int_pin {
0199     FXLS8962AF_PIN_INT1,
0200     FXLS8962AF_PIN_INT2,
0201 };
0202 
0203 static int fxls8962af_power_on(struct fxls8962af_data *data)
0204 {
0205     struct device *dev = regmap_get_device(data->regmap);
0206     int ret;
0207 
0208     ret = pm_runtime_resume_and_get(dev);
0209     if (ret)
0210         dev_err(dev, "failed to power on\n");
0211 
0212     return ret;
0213 }
0214 
0215 static int fxls8962af_power_off(struct fxls8962af_data *data)
0216 {
0217     struct device *dev = regmap_get_device(data->regmap);
0218     int ret;
0219 
0220     pm_runtime_mark_last_busy(dev);
0221     ret = pm_runtime_put_autosuspend(dev);
0222     if (ret)
0223         dev_err(dev, "failed to power off\n");
0224 
0225     return ret;
0226 }
0227 
0228 static int fxls8962af_standby(struct fxls8962af_data *data)
0229 {
0230     return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
0231                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 0);
0232 }
0233 
0234 static int fxls8962af_active(struct fxls8962af_data *data)
0235 {
0236     return regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
0237                   FXLS8962AF_SENS_CONFIG1_ACTIVE, 1);
0238 }
0239 
0240 static int fxls8962af_is_active(struct fxls8962af_data *data)
0241 {
0242     unsigned int reg;
0243     int ret;
0244 
0245     ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
0246     if (ret)
0247         return ret;
0248 
0249     return reg & FXLS8962AF_SENS_CONFIG1_ACTIVE;
0250 }
0251 
0252 static int fxls8962af_get_out(struct fxls8962af_data *data,
0253                   struct iio_chan_spec const *chan, int *val)
0254 {
0255     struct device *dev = regmap_get_device(data->regmap);
0256     __le16 raw_val;
0257     int is_active;
0258     int ret;
0259 
0260     is_active = fxls8962af_is_active(data);
0261     if (!is_active) {
0262         ret = fxls8962af_power_on(data);
0263         if (ret)
0264             return ret;
0265     }
0266 
0267     ret = regmap_bulk_read(data->regmap, chan->address,
0268                    &raw_val, sizeof(data->lower_thres));
0269 
0270     if (!is_active)
0271         fxls8962af_power_off(data);
0272 
0273     if (ret) {
0274         dev_err(dev, "failed to get out reg 0x%lx\n", chan->address);
0275         return ret;
0276     }
0277 
0278     *val = sign_extend32(le16_to_cpu(raw_val),
0279                  chan->scan_type.realbits - 1);
0280 
0281     return IIO_VAL_INT;
0282 }
0283 
0284 static int fxls8962af_read_avail(struct iio_dev *indio_dev,
0285                  struct iio_chan_spec const *chan,
0286                  const int **vals, int *type, int *length,
0287                  long mask)
0288 {
0289     switch (mask) {
0290     case IIO_CHAN_INFO_SCALE:
0291         *type = IIO_VAL_INT_PLUS_NANO;
0292         *vals = (int *)fxls8962af_scale_table;
0293         *length = ARRAY_SIZE(fxls8962af_scale_table) * 2;
0294         return IIO_AVAIL_LIST;
0295     case IIO_CHAN_INFO_SAMP_FREQ:
0296         *type = IIO_VAL_INT_PLUS_MICRO;
0297         *vals = (int *)fxls8962af_samp_freq_table;
0298         *length = ARRAY_SIZE(fxls8962af_samp_freq_table) * 2;
0299         return IIO_AVAIL_LIST;
0300     default:
0301         return -EINVAL;
0302     }
0303 }
0304 
0305 static int fxls8962af_write_raw_get_fmt(struct iio_dev *indio_dev,
0306                     struct iio_chan_spec const *chan,
0307                     long mask)
0308 {
0309     switch (mask) {
0310     case IIO_CHAN_INFO_SCALE:
0311         return IIO_VAL_INT_PLUS_NANO;
0312     case IIO_CHAN_INFO_SAMP_FREQ:
0313         return IIO_VAL_INT_PLUS_MICRO;
0314     default:
0315         return IIO_VAL_INT_PLUS_NANO;
0316     }
0317 }
0318 
0319 static int fxls8962af_update_config(struct fxls8962af_data *data, u8 reg,
0320                     u8 mask, u8 val)
0321 {
0322     int ret;
0323     int is_active;
0324 
0325     is_active = fxls8962af_is_active(data);
0326     if (is_active) {
0327         ret = fxls8962af_standby(data);
0328         if (ret)
0329             return ret;
0330     }
0331 
0332     ret = regmap_update_bits(data->regmap, reg, mask, val);
0333     if (ret)
0334         return ret;
0335 
0336     if (is_active) {
0337         ret = fxls8962af_active(data);
0338         if (ret)
0339             return ret;
0340     }
0341 
0342     return 0;
0343 }
0344 
0345 static int fxls8962af_set_full_scale(struct fxls8962af_data *data, u32 scale)
0346 {
0347     int i;
0348 
0349     for (i = 0; i < ARRAY_SIZE(fxls8962af_scale_table); i++)
0350         if (scale == fxls8962af_scale_table[i][1])
0351             break;
0352 
0353     if (i == ARRAY_SIZE(fxls8962af_scale_table))
0354         return -EINVAL;
0355 
0356     return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG1,
0357                     FXLS8962AF_SC1_FSR_MASK,
0358                     FXLS8962AF_SC1_FSR_PREP(i));
0359 }
0360 
0361 static unsigned int fxls8962af_read_full_scale(struct fxls8962af_data *data,
0362                            int *val)
0363 {
0364     int ret;
0365     unsigned int reg;
0366     u8 range_idx;
0367 
0368     ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG1, &reg);
0369     if (ret)
0370         return ret;
0371 
0372     range_idx = FXLS8962AF_SC1_FSR_GET(reg);
0373 
0374     *val = fxls8962af_scale_table[range_idx][1];
0375 
0376     return IIO_VAL_INT_PLUS_NANO;
0377 }
0378 
0379 static int fxls8962af_set_samp_freq(struct fxls8962af_data *data, u32 val,
0380                     u32 val2)
0381 {
0382     int i;
0383 
0384     for (i = 0; i < ARRAY_SIZE(fxls8962af_samp_freq_table); i++)
0385         if (val == fxls8962af_samp_freq_table[i][0] &&
0386             val2 == fxls8962af_samp_freq_table[i][1])
0387             break;
0388 
0389     if (i == ARRAY_SIZE(fxls8962af_samp_freq_table))
0390         return -EINVAL;
0391 
0392     return fxls8962af_update_config(data, FXLS8962AF_SENS_CONFIG3,
0393                     FXLS8962AF_SC3_WAKE_ODR_MASK,
0394                     FXLS8962AF_SC3_WAKE_ODR_PREP(i));
0395 }
0396 
0397 static unsigned int fxls8962af_read_samp_freq(struct fxls8962af_data *data,
0398                           int *val, int *val2)
0399 {
0400     int ret;
0401     unsigned int reg;
0402     u8 range_idx;
0403 
0404     ret = regmap_read(data->regmap, FXLS8962AF_SENS_CONFIG3, &reg);
0405     if (ret)
0406         return ret;
0407 
0408     range_idx = FXLS8962AF_SC3_WAKE_ODR_GET(reg);
0409 
0410     *val = fxls8962af_samp_freq_table[range_idx][0];
0411     *val2 = fxls8962af_samp_freq_table[range_idx][1];
0412 
0413     return IIO_VAL_INT_PLUS_MICRO;
0414 }
0415 
0416 static int fxls8962af_read_raw(struct iio_dev *indio_dev,
0417                    struct iio_chan_spec const *chan,
0418                    int *val, int *val2, long mask)
0419 {
0420     struct fxls8962af_data *data = iio_priv(indio_dev);
0421 
0422     switch (mask) {
0423     case IIO_CHAN_INFO_RAW:
0424         switch (chan->type) {
0425         case IIO_TEMP:
0426         case IIO_ACCEL:
0427             return fxls8962af_get_out(data, chan, val);
0428         default:
0429             return -EINVAL;
0430         }
0431     case IIO_CHAN_INFO_OFFSET:
0432         if (chan->type != IIO_TEMP)
0433             return -EINVAL;
0434 
0435         *val = FXLS8962AF_TEMP_CENTER_VAL;
0436         return IIO_VAL_INT;
0437     case IIO_CHAN_INFO_SCALE:
0438         *val = 0;
0439         return fxls8962af_read_full_scale(data, val2);
0440     case IIO_CHAN_INFO_SAMP_FREQ:
0441         return fxls8962af_read_samp_freq(data, val, val2);
0442     default:
0443         return -EINVAL;
0444     }
0445 }
0446 
0447 static int fxls8962af_write_raw(struct iio_dev *indio_dev,
0448                 struct iio_chan_spec const *chan,
0449                 int val, int val2, long mask)
0450 {
0451     struct fxls8962af_data *data = iio_priv(indio_dev);
0452     int ret;
0453 
0454     switch (mask) {
0455     case IIO_CHAN_INFO_SCALE:
0456         if (val != 0)
0457             return -EINVAL;
0458 
0459         ret = iio_device_claim_direct_mode(indio_dev);
0460         if (ret)
0461             return ret;
0462 
0463         ret = fxls8962af_set_full_scale(data, val2);
0464 
0465         iio_device_release_direct_mode(indio_dev);
0466         return ret;
0467     case IIO_CHAN_INFO_SAMP_FREQ:
0468         ret = iio_device_claim_direct_mode(indio_dev);
0469         if (ret)
0470             return ret;
0471 
0472         ret = fxls8962af_set_samp_freq(data, val, val2);
0473 
0474         iio_device_release_direct_mode(indio_dev);
0475         return ret;
0476     default:
0477         return -EINVAL;
0478     }
0479 }
0480 
0481 static int fxls8962af_event_setup(struct fxls8962af_data *data, int state)
0482 {
0483     /* Enable wakeup interrupt */
0484     int mask = FXLS8962AF_INT_EN_SDCD_OT_EN;
0485     int value = state ? mask : 0;
0486 
0487     return regmap_update_bits(data->regmap, FXLS8962AF_INT_EN, mask, value);
0488 }
0489 
0490 static int fxls8962af_set_watermark(struct iio_dev *indio_dev, unsigned val)
0491 {
0492     struct fxls8962af_data *data = iio_priv(indio_dev);
0493 
0494     if (val > FXLS8962AF_FIFO_LENGTH)
0495         val = FXLS8962AF_FIFO_LENGTH;
0496 
0497     data->watermark = val;
0498 
0499     return 0;
0500 }
0501 
0502 static int __fxls8962af_set_thresholds(struct fxls8962af_data *data,
0503                        const struct iio_chan_spec *chan,
0504                        enum iio_event_direction dir,
0505                        int val)
0506 {
0507     switch (dir) {
0508     case IIO_EV_DIR_FALLING:
0509         data->lower_thres = val;
0510         return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
0511                 &data->lower_thres, sizeof(data->lower_thres));
0512     case IIO_EV_DIR_RISING:
0513         data->upper_thres = val;
0514         return regmap_bulk_write(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
0515                 &data->upper_thres, sizeof(data->upper_thres));
0516     default:
0517         return -EINVAL;
0518     }
0519 }
0520 
0521 static int fxls8962af_read_event(struct iio_dev *indio_dev,
0522                  const struct iio_chan_spec *chan,
0523                  enum iio_event_type type,
0524                  enum iio_event_direction dir,
0525                  enum iio_event_info info,
0526                  int *val, int *val2)
0527 {
0528     struct fxls8962af_data *data = iio_priv(indio_dev);
0529     int ret;
0530 
0531     if (type != IIO_EV_TYPE_THRESH)
0532         return -EINVAL;
0533 
0534     switch (dir) {
0535     case IIO_EV_DIR_FALLING:
0536         ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_LTHS_LSB,
0537                        &data->lower_thres, sizeof(data->lower_thres));
0538         if (ret)
0539             return ret;
0540 
0541         *val = sign_extend32(data->lower_thres, chan->scan_type.realbits - 1);
0542         return IIO_VAL_INT;
0543     case IIO_EV_DIR_RISING:
0544         ret = regmap_bulk_read(data->regmap, FXLS8962AF_SDCD_UTHS_LSB,
0545                        &data->upper_thres, sizeof(data->upper_thres));
0546         if (ret)
0547             return ret;
0548 
0549         *val = sign_extend32(data->upper_thres, chan->scan_type.realbits - 1);
0550         return IIO_VAL_INT;
0551     default:
0552         return -EINVAL;
0553     }
0554 }
0555 
0556 static int fxls8962af_write_event(struct iio_dev *indio_dev,
0557                   const struct iio_chan_spec *chan,
0558                   enum iio_event_type type,
0559                   enum iio_event_direction dir,
0560                   enum iio_event_info info,
0561                   int val, int val2)
0562 {
0563     struct fxls8962af_data *data = iio_priv(indio_dev);
0564     int ret, val_masked;
0565 
0566     if (type != IIO_EV_TYPE_THRESH)
0567         return -EINVAL;
0568 
0569     if (val < -2048 || val > 2047)
0570         return -EINVAL;
0571 
0572     if (data->enable_event)
0573         return -EBUSY;
0574 
0575     val_masked = val & GENMASK(11, 0);
0576     if (fxls8962af_is_active(data)) {
0577         ret = fxls8962af_standby(data);
0578         if (ret)
0579             return ret;
0580 
0581         ret = __fxls8962af_set_thresholds(data, chan, dir, val_masked);
0582         if (ret)
0583             return ret;
0584 
0585         return fxls8962af_active(data);
0586     } else {
0587         return __fxls8962af_set_thresholds(data, chan, dir, val_masked);
0588     }
0589 }
0590 
0591 static int
0592 fxls8962af_read_event_config(struct iio_dev *indio_dev,
0593                  const struct iio_chan_spec *chan,
0594                  enum iio_event_type type,
0595                  enum iio_event_direction dir)
0596 {
0597     struct fxls8962af_data *data = iio_priv(indio_dev);
0598 
0599     if (type != IIO_EV_TYPE_THRESH)
0600         return -EINVAL;
0601 
0602     switch (chan->channel2) {
0603     case IIO_MOD_X:
0604         return !!(FXLS8962AF_SDCD_CONFIG1_X_OT_EN & data->enable_event);
0605     case IIO_MOD_Y:
0606         return !!(FXLS8962AF_SDCD_CONFIG1_Y_OT_EN & data->enable_event);
0607     case IIO_MOD_Z:
0608         return !!(FXLS8962AF_SDCD_CONFIG1_Z_OT_EN & data->enable_event);
0609     default:
0610         return -EINVAL;
0611     }
0612 }
0613 
0614 static int
0615 fxls8962af_write_event_config(struct iio_dev *indio_dev,
0616                   const struct iio_chan_spec *chan,
0617                   enum iio_event_type type,
0618                   enum iio_event_direction dir, int state)
0619 {
0620     struct fxls8962af_data *data = iio_priv(indio_dev);
0621     u8 enable_event, enable_bits;
0622     int ret, value;
0623 
0624     if (type != IIO_EV_TYPE_THRESH)
0625         return -EINVAL;
0626 
0627     switch (chan->channel2) {
0628     case IIO_MOD_X:
0629         enable_bits = FXLS8962AF_SDCD_CONFIG1_X_OT_EN;
0630         break;
0631     case IIO_MOD_Y:
0632         enable_bits = FXLS8962AF_SDCD_CONFIG1_Y_OT_EN;
0633         break;
0634     case IIO_MOD_Z:
0635         enable_bits = FXLS8962AF_SDCD_CONFIG1_Z_OT_EN;
0636         break;
0637     default:
0638         return -EINVAL;
0639     }
0640 
0641     if (state)
0642         enable_event = data->enable_event | enable_bits;
0643     else
0644         enable_event = data->enable_event & ~enable_bits;
0645 
0646     if (data->enable_event == enable_event)
0647         return 0;
0648 
0649     ret = fxls8962af_standby(data);
0650     if (ret)
0651         return ret;
0652 
0653     /* Enable events */
0654     value = enable_event | FXLS8962AF_SDCD_CONFIG1_OT_ELE;
0655     ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG1, value);
0656     if (ret)
0657         return ret;
0658 
0659     /*
0660      * Enable update of SDCD_REF_X/Y/Z values with the current decimated and
0661      * trimmed X/Y/Z acceleration input data. This allows for acceleration
0662      * slope detection with Data(n) to Data(n–1) always used as the input
0663      * to the window comparator.
0664      */
0665     value = enable_event ?
0666         FXLS8962AF_SDCD_CONFIG2_SDCD_EN | FXLS8962AF_SC2_REF_UPDM_AC :
0667         0x00;
0668     ret = regmap_write(data->regmap, FXLS8962AF_SDCD_CONFIG2, value);
0669     if (ret)
0670         return ret;
0671 
0672     ret = fxls8962af_event_setup(data, state);
0673     if (ret)
0674         return ret;
0675 
0676     data->enable_event = enable_event;
0677 
0678     if (data->enable_event) {
0679         fxls8962af_active(data);
0680         ret = fxls8962af_power_on(data);
0681     } else {
0682         ret = iio_device_claim_direct_mode(indio_dev);
0683         if (ret)
0684             return ret;
0685 
0686         /* Not in buffered mode so disable power */
0687         ret = fxls8962af_power_off(data);
0688 
0689         iio_device_release_direct_mode(indio_dev);
0690     }
0691 
0692     return ret;
0693 }
0694 
0695 static const struct iio_event_spec fxls8962af_event[] = {
0696     {
0697         .type = IIO_EV_TYPE_THRESH,
0698         .dir = IIO_EV_DIR_EITHER,
0699         .mask_separate = BIT(IIO_EV_INFO_ENABLE),
0700     },
0701     {
0702         .type = IIO_EV_TYPE_THRESH,
0703         .dir = IIO_EV_DIR_FALLING,
0704         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0705     },
0706     {
0707         .type = IIO_EV_TYPE_THRESH,
0708         .dir = IIO_EV_DIR_RISING,
0709         .mask_separate = BIT(IIO_EV_INFO_VALUE),
0710     },
0711 };
0712 
0713 #define FXLS8962AF_CHANNEL(axis, reg, idx) { \
0714     .type = IIO_ACCEL, \
0715     .address = reg, \
0716     .modified = 1, \
0717     .channel2 = IIO_MOD_##axis, \
0718     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0719     .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
0720                     BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0721     .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
0722                           BIT(IIO_CHAN_INFO_SAMP_FREQ), \
0723     .scan_index = idx, \
0724     .scan_type = { \
0725         .sign = 's', \
0726         .realbits = 12, \
0727         .storagebits = 16, \
0728         .shift = 4, \
0729         .endianness = IIO_BE, \
0730     }, \
0731     .event_spec = fxls8962af_event, \
0732     .num_event_specs = ARRAY_SIZE(fxls8962af_event), \
0733 }
0734 
0735 #define FXLS8962AF_TEMP_CHANNEL { \
0736     .type = IIO_TEMP, \
0737     .address = FXLS8962AF_TEMP_OUT, \
0738     .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
0739                   BIT(IIO_CHAN_INFO_OFFSET),\
0740     .scan_index = -1, \
0741     .scan_type = { \
0742         .realbits = 8, \
0743         .storagebits = 8, \
0744     }, \
0745 }
0746 
0747 static const struct iio_chan_spec fxls8962af_channels[] = {
0748     FXLS8962AF_CHANNEL(X, FXLS8962AF_OUT_X_LSB, fxls8962af_idx_x),
0749     FXLS8962AF_CHANNEL(Y, FXLS8962AF_OUT_Y_LSB, fxls8962af_idx_y),
0750     FXLS8962AF_CHANNEL(Z, FXLS8962AF_OUT_Z_LSB, fxls8962af_idx_z),
0751     IIO_CHAN_SOFT_TIMESTAMP(fxls8962af_idx_ts),
0752     FXLS8962AF_TEMP_CHANNEL,
0753 };
0754 
0755 static const struct fxls8962af_chip_info fxls_chip_info_table[] = {
0756     [fxls8962af] = {
0757         .chip_id = FXLS8962AF_DEVICE_ID,
0758         .name = "fxls8962af",
0759         .channels = fxls8962af_channels,
0760         .num_channels = ARRAY_SIZE(fxls8962af_channels),
0761     },
0762     [fxls8964af] = {
0763         .chip_id = FXLS8964AF_DEVICE_ID,
0764         .name = "fxls8964af",
0765         .channels = fxls8962af_channels,
0766         .num_channels = ARRAY_SIZE(fxls8962af_channels),
0767     },
0768 };
0769 
0770 static const struct iio_info fxls8962af_info = {
0771     .read_raw = &fxls8962af_read_raw,
0772     .write_raw = &fxls8962af_write_raw,
0773     .write_raw_get_fmt = fxls8962af_write_raw_get_fmt,
0774     .read_event_value = fxls8962af_read_event,
0775     .write_event_value = fxls8962af_write_event,
0776     .read_event_config = fxls8962af_read_event_config,
0777     .write_event_config = fxls8962af_write_event_config,
0778     .read_avail = fxls8962af_read_avail,
0779     .hwfifo_set_watermark = fxls8962af_set_watermark,
0780 };
0781 
0782 static int fxls8962af_reset(struct fxls8962af_data *data)
0783 {
0784     struct device *dev = regmap_get_device(data->regmap);
0785     unsigned int reg;
0786     int ret;
0787 
0788     ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG1,
0789                  FXLS8962AF_SENS_CONFIG1_RST,
0790                  FXLS8962AF_SENS_CONFIG1_RST);
0791     if (ret)
0792         return ret;
0793 
0794     /* TBOOT1, TBOOT2, specifies we have to wait between 1 - 17.7ms */
0795     ret = regmap_read_poll_timeout(data->regmap, FXLS8962AF_INT_STATUS, reg,
0796                        (reg & FXLS8962AF_INT_STATUS_SRC_BOOT),
0797                        1000, 18000);
0798     if (ret == -ETIMEDOUT)
0799         dev_err(dev, "reset timeout, int_status = 0x%x\n", reg);
0800 
0801     return ret;
0802 }
0803 
0804 static int __fxls8962af_fifo_set_mode(struct fxls8962af_data *data, bool onoff)
0805 {
0806     int ret;
0807 
0808     /* Enable watermark at max fifo size */
0809     ret = regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG2,
0810                  FXLS8962AF_BUF_CONFIG2_BUF_WMRK,
0811                  data->watermark);
0812     if (ret)
0813         return ret;
0814 
0815     return regmap_update_bits(data->regmap, FXLS8962AF_BUF_CONFIG1,
0816                   FXLS8962AF_BC1_BUF_MODE_MASK,
0817                   FXLS8962AF_BC1_BUF_MODE_PREP(onoff));
0818 }
0819 
0820 static int fxls8962af_buffer_preenable(struct iio_dev *indio_dev)
0821 {
0822     return fxls8962af_power_on(iio_priv(indio_dev));
0823 }
0824 
0825 static int fxls8962af_buffer_postenable(struct iio_dev *indio_dev)
0826 {
0827     struct fxls8962af_data *data = iio_priv(indio_dev);
0828     int ret;
0829 
0830     fxls8962af_standby(data);
0831 
0832     /* Enable buffer interrupt */
0833     ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
0834                  FXLS8962AF_INT_EN_BUF_EN,
0835                  FXLS8962AF_INT_EN_BUF_EN);
0836     if (ret)
0837         return ret;
0838 
0839     ret = __fxls8962af_fifo_set_mode(data, true);
0840 
0841     fxls8962af_active(data);
0842 
0843     return ret;
0844 }
0845 
0846 static int fxls8962af_buffer_predisable(struct iio_dev *indio_dev)
0847 {
0848     struct fxls8962af_data *data = iio_priv(indio_dev);
0849     int ret;
0850 
0851     fxls8962af_standby(data);
0852 
0853     /* Disable buffer interrupt */
0854     ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_EN,
0855                  FXLS8962AF_INT_EN_BUF_EN, 0);
0856     if (ret)
0857         return ret;
0858 
0859     ret = __fxls8962af_fifo_set_mode(data, false);
0860 
0861     if (data->enable_event)
0862         fxls8962af_active(data);
0863 
0864     return ret;
0865 }
0866 
0867 static int fxls8962af_buffer_postdisable(struct iio_dev *indio_dev)
0868 {
0869     struct fxls8962af_data *data = iio_priv(indio_dev);
0870 
0871     if (!data->enable_event)
0872         fxls8962af_power_off(data);
0873 
0874     return 0;
0875 }
0876 
0877 static const struct iio_buffer_setup_ops fxls8962af_buffer_ops = {
0878     .preenable = fxls8962af_buffer_preenable,
0879     .postenable = fxls8962af_buffer_postenable,
0880     .predisable = fxls8962af_buffer_predisable,
0881     .postdisable = fxls8962af_buffer_postdisable,
0882 };
0883 
0884 static int fxls8962af_i2c_raw_read_errata3(struct fxls8962af_data *data,
0885                        u16 *buffer, int samples,
0886                        int sample_length)
0887 {
0888     int i, ret;
0889 
0890     for (i = 0; i < samples; i++) {
0891         ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB,
0892                       &buffer[i * 3], sample_length);
0893         if (ret)
0894             return ret;
0895     }
0896 
0897     return 0;
0898 }
0899 
0900 static int fxls8962af_fifo_transfer(struct fxls8962af_data *data,
0901                     u16 *buffer, int samples)
0902 {
0903     struct device *dev = regmap_get_device(data->regmap);
0904     int sample_length = 3 * sizeof(*buffer);
0905     int total_length = samples * sample_length;
0906     int ret;
0907 
0908     if (i2c_verify_client(dev))
0909         /*
0910          * Due to errata bug:
0911          * E3: FIFO burst read operation error using I2C interface
0912          * We have to avoid burst reads on I2C..
0913          */
0914         ret = fxls8962af_i2c_raw_read_errata3(data, buffer, samples,
0915                               sample_length);
0916     else
0917         ret = regmap_raw_read(data->regmap, FXLS8962AF_BUF_X_LSB, buffer,
0918                       total_length);
0919 
0920     if (ret)
0921         dev_err(dev, "Error transferring data from fifo: %d\n", ret);
0922 
0923     return ret;
0924 }
0925 
0926 static int fxls8962af_fifo_flush(struct iio_dev *indio_dev)
0927 {
0928     struct fxls8962af_data *data = iio_priv(indio_dev);
0929     struct device *dev = regmap_get_device(data->regmap);
0930     u16 buffer[FXLS8962AF_FIFO_LENGTH * 3];
0931     uint64_t sample_period;
0932     unsigned int reg;
0933     int64_t tstamp;
0934     int ret, i;
0935     u8 count;
0936 
0937     ret = regmap_read(data->regmap, FXLS8962AF_BUF_STATUS, &reg);
0938     if (ret)
0939         return ret;
0940 
0941     if (reg & FXLS8962AF_BUF_STATUS_BUF_OVF) {
0942         dev_err(dev, "Buffer overflow");
0943         return -EOVERFLOW;
0944     }
0945 
0946     count = reg & FXLS8962AF_BUF_STATUS_BUF_CNT;
0947     if (!count)
0948         return 0;
0949 
0950     data->old_timestamp = data->timestamp;
0951     data->timestamp = iio_get_time_ns(indio_dev);
0952 
0953     /*
0954      * Approximate timestamps for each of the sample based on the sampling,
0955      * frequency, timestamp for last sample and number of samples.
0956      */
0957     sample_period = (data->timestamp - data->old_timestamp);
0958     do_div(sample_period, count);
0959     tstamp = data->timestamp - (count - 1) * sample_period;
0960 
0961     ret = fxls8962af_fifo_transfer(data, buffer, count);
0962     if (ret)
0963         return ret;
0964 
0965     /* Demux hw FIFO into kfifo. */
0966     for (i = 0; i < count; i++) {
0967         int j, bit;
0968 
0969         j = 0;
0970         for_each_set_bit(bit, indio_dev->active_scan_mask,
0971                  indio_dev->masklength) {
0972             memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
0973                    sizeof(data->scan.channels[0]));
0974         }
0975 
0976         iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
0977                            tstamp);
0978 
0979         tstamp += sample_period;
0980     }
0981 
0982     return count;
0983 }
0984 
0985 static int fxls8962af_event_interrupt(struct iio_dev *indio_dev)
0986 {
0987     struct fxls8962af_data *data = iio_priv(indio_dev);
0988     s64 ts = iio_get_time_ns(indio_dev);
0989     unsigned int reg;
0990     u64 ev_code;
0991     int ret;
0992 
0993     ret = regmap_read(data->regmap, FXLS8962AF_SDCD_INT_SRC1, &reg);
0994     if (ret)
0995         return ret;
0996 
0997     if (reg & FXLS8962AF_SDCD_INT_SRC1_X_OT) {
0998         ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_X_POL ?
0999             IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1000         iio_push_event(indio_dev,
1001                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1002                     IIO_EV_TYPE_THRESH, ev_code), ts);
1003     }
1004 
1005     if (reg & FXLS8962AF_SDCD_INT_SRC1_Y_OT) {
1006         ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Y_POL ?
1007             IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1008         iio_push_event(indio_dev,
1009                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1010                     IIO_EV_TYPE_THRESH, ev_code), ts);
1011     }
1012 
1013     if (reg & FXLS8962AF_SDCD_INT_SRC1_Z_OT) {
1014         ev_code = reg & FXLS8962AF_SDCD_INT_SRC1_Z_POL ?
1015             IIO_EV_DIR_RISING : IIO_EV_DIR_FALLING;
1016         iio_push_event(indio_dev,
1017                 IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X,
1018                     IIO_EV_TYPE_THRESH, ev_code), ts);
1019     }
1020 
1021     return 0;
1022 }
1023 
1024 static irqreturn_t fxls8962af_interrupt(int irq, void *p)
1025 {
1026     struct iio_dev *indio_dev = p;
1027     struct fxls8962af_data *data = iio_priv(indio_dev);
1028     unsigned int reg;
1029     int ret;
1030 
1031     ret = regmap_read(data->regmap, FXLS8962AF_INT_STATUS, &reg);
1032     if (ret)
1033         return IRQ_NONE;
1034 
1035     if (reg & FXLS8962AF_INT_STATUS_SRC_BUF) {
1036         ret = fxls8962af_fifo_flush(indio_dev);
1037         if (ret < 0)
1038             return IRQ_NONE;
1039 
1040         return IRQ_HANDLED;
1041     }
1042 
1043     if (reg & FXLS8962AF_INT_STATUS_SRC_SDCD_OT) {
1044         ret = fxls8962af_event_interrupt(indio_dev);
1045         if (ret < 0)
1046             return IRQ_NONE;
1047 
1048         return IRQ_HANDLED;
1049     }
1050 
1051     return IRQ_NONE;
1052 }
1053 
1054 static void fxls8962af_regulator_disable(void *data_ptr)
1055 {
1056     struct fxls8962af_data *data = data_ptr;
1057 
1058     regulator_disable(data->vdd_reg);
1059 }
1060 
1061 static void fxls8962af_pm_disable(void *dev_ptr)
1062 {
1063     struct device *dev = dev_ptr;
1064     struct iio_dev *indio_dev = dev_get_drvdata(dev);
1065 
1066     pm_runtime_disable(dev);
1067     pm_runtime_set_suspended(dev);
1068     pm_runtime_put_noidle(dev);
1069 
1070     fxls8962af_standby(iio_priv(indio_dev));
1071 }
1072 
1073 static void fxls8962af_get_irq(struct device_node *of_node,
1074                    enum fxls8962af_int_pin *pin)
1075 {
1076     int irq;
1077 
1078     irq = of_irq_get_byname(of_node, "INT2");
1079     if (irq > 0) {
1080         *pin = FXLS8962AF_PIN_INT2;
1081         return;
1082     }
1083 
1084     *pin = FXLS8962AF_PIN_INT1;
1085 }
1086 
1087 static int fxls8962af_irq_setup(struct iio_dev *indio_dev, int irq)
1088 {
1089     struct fxls8962af_data *data = iio_priv(indio_dev);
1090     struct device *dev = regmap_get_device(data->regmap);
1091     unsigned long irq_type;
1092     bool irq_active_high;
1093     enum fxls8962af_int_pin int_pin;
1094     u8 int_pin_sel;
1095     int ret;
1096 
1097     fxls8962af_get_irq(dev->of_node, &int_pin);
1098     switch (int_pin) {
1099     case FXLS8962AF_PIN_INT1:
1100         int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT1;
1101         break;
1102     case FXLS8962AF_PIN_INT2:
1103         int_pin_sel = FXLS8962AF_INT_PIN_SEL_INT2;
1104         break;
1105     default:
1106         dev_err(dev, "unsupported int pin selected\n");
1107         return -EINVAL;
1108     }
1109 
1110     ret = regmap_update_bits(data->regmap, FXLS8962AF_INT_PIN_SEL,
1111                  FXLS8962AF_INT_PIN_SEL_MASK, int_pin_sel);
1112     if (ret)
1113         return ret;
1114 
1115     irq_type = irqd_get_trigger_type(irq_get_irq_data(irq));
1116 
1117     switch (irq_type) {
1118     case IRQF_TRIGGER_HIGH:
1119     case IRQF_TRIGGER_RISING:
1120         irq_active_high = true;
1121         break;
1122     case IRQF_TRIGGER_LOW:
1123     case IRQF_TRIGGER_FALLING:
1124         irq_active_high = false;
1125         break;
1126     default:
1127         dev_info(dev, "mode %lx unsupported\n", irq_type);
1128         return -EINVAL;
1129     }
1130 
1131     ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1132                  FXLS8962AF_SC4_INT_POL_MASK,
1133                  FXLS8962AF_SC4_INT_POL_PREP(irq_active_high));
1134     if (ret)
1135         return ret;
1136 
1137     if (device_property_read_bool(dev, "drive-open-drain")) {
1138         ret = regmap_update_bits(data->regmap, FXLS8962AF_SENS_CONFIG4,
1139                      FXLS8962AF_SC4_INT_PP_OD_MASK,
1140                      FXLS8962AF_SC4_INT_PP_OD_PREP(1));
1141         if (ret)
1142             return ret;
1143 
1144         irq_type |= IRQF_SHARED;
1145     }
1146 
1147     return devm_request_threaded_irq(dev,
1148                      irq,
1149                      NULL, fxls8962af_interrupt,
1150                      irq_type | IRQF_ONESHOT,
1151                      indio_dev->name, indio_dev);
1152 }
1153 
1154 int fxls8962af_core_probe(struct device *dev, struct regmap *regmap, int irq)
1155 {
1156     struct fxls8962af_data *data;
1157     struct iio_dev *indio_dev;
1158     unsigned int reg;
1159     int ret, i;
1160 
1161     indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1162     if (!indio_dev)
1163         return -ENOMEM;
1164 
1165     data = iio_priv(indio_dev);
1166     dev_set_drvdata(dev, indio_dev);
1167     data->regmap = regmap;
1168     data->irq = irq;
1169 
1170     ret = iio_read_mount_matrix(dev, &data->orientation);
1171     if (ret)
1172         return ret;
1173 
1174     data->vdd_reg = devm_regulator_get(dev, "vdd");
1175     if (IS_ERR(data->vdd_reg))
1176         return dev_err_probe(dev, PTR_ERR(data->vdd_reg),
1177                      "Failed to get vdd regulator\n");
1178 
1179     ret = regulator_enable(data->vdd_reg);
1180     if (ret) {
1181         dev_err(dev, "Failed to enable vdd regulator: %d\n", ret);
1182         return ret;
1183     }
1184 
1185     ret = devm_add_action_or_reset(dev, fxls8962af_regulator_disable, data);
1186     if (ret)
1187         return ret;
1188 
1189     ret = regmap_read(data->regmap, FXLS8962AF_WHO_AM_I, &reg);
1190     if (ret)
1191         return ret;
1192 
1193     for (i = 0; i < ARRAY_SIZE(fxls_chip_info_table); i++) {
1194         if (fxls_chip_info_table[i].chip_id == reg) {
1195             data->chip_info = &fxls_chip_info_table[i];
1196             break;
1197         }
1198     }
1199     if (i == ARRAY_SIZE(fxls_chip_info_table)) {
1200         dev_err(dev, "failed to match device in table\n");
1201         return -ENXIO;
1202     }
1203 
1204     indio_dev->channels = data->chip_info->channels;
1205     indio_dev->num_channels = data->chip_info->num_channels;
1206     indio_dev->name = data->chip_info->name;
1207     indio_dev->info = &fxls8962af_info;
1208     indio_dev->modes = INDIO_DIRECT_MODE;
1209 
1210     ret = fxls8962af_reset(data);
1211     if (ret)
1212         return ret;
1213 
1214     if (irq) {
1215         ret = fxls8962af_irq_setup(indio_dev, irq);
1216         if (ret)
1217             return ret;
1218 
1219         ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
1220                           &fxls8962af_buffer_ops);
1221         if (ret)
1222             return ret;
1223     }
1224 
1225     ret = pm_runtime_set_active(dev);
1226     if (ret)
1227         return ret;
1228 
1229     pm_runtime_enable(dev);
1230     pm_runtime_set_autosuspend_delay(dev, FXLS8962AF_AUTO_SUSPEND_DELAY_MS);
1231     pm_runtime_use_autosuspend(dev);
1232 
1233     ret = devm_add_action_or_reset(dev, fxls8962af_pm_disable, dev);
1234     if (ret)
1235         return ret;
1236 
1237     if (device_property_read_bool(dev, "wakeup-source"))
1238         device_init_wakeup(dev, true);
1239 
1240     return devm_iio_device_register(dev, indio_dev);
1241 }
1242 EXPORT_SYMBOL_NS_GPL(fxls8962af_core_probe, IIO_FXLS8962AF);
1243 
1244 static int __maybe_unused fxls8962af_runtime_suspend(struct device *dev)
1245 {
1246     struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1247     int ret;
1248 
1249     ret = fxls8962af_standby(data);
1250     if (ret) {
1251         dev_err(dev, "powering off device failed\n");
1252         return ret;
1253     }
1254 
1255     return 0;
1256 }
1257 
1258 static int __maybe_unused fxls8962af_runtime_resume(struct device *dev)
1259 {
1260     struct fxls8962af_data *data = iio_priv(dev_get_drvdata(dev));
1261 
1262     return fxls8962af_active(data);
1263 }
1264 
1265 static int __maybe_unused fxls8962af_suspend(struct device *dev)
1266 {
1267     struct iio_dev *indio_dev = dev_get_drvdata(dev);
1268     struct fxls8962af_data *data = iio_priv(indio_dev);
1269 
1270     if (device_may_wakeup(dev) && data->enable_event) {
1271         enable_irq_wake(data->irq);
1272 
1273         /*
1274          * Disable buffer, as the buffer is so small the device will wake
1275          * almost immediately.
1276          */
1277         if (iio_buffer_enabled(indio_dev))
1278             fxls8962af_buffer_predisable(indio_dev);
1279     } else {
1280         fxls8962af_runtime_suspend(dev);
1281     }
1282 
1283     return 0;
1284 }
1285 
1286 static int __maybe_unused fxls8962af_resume(struct device *dev)
1287 {
1288     struct iio_dev *indio_dev = dev_get_drvdata(dev);
1289     struct fxls8962af_data *data = iio_priv(indio_dev);
1290 
1291     if (device_may_wakeup(dev) && data->enable_event) {
1292         disable_irq_wake(data->irq);
1293 
1294         if (iio_buffer_enabled(indio_dev))
1295             fxls8962af_buffer_postenable(indio_dev);
1296     } else {
1297         fxls8962af_runtime_resume(dev);
1298     }
1299 
1300     return 0;
1301 }
1302 
1303 const struct dev_pm_ops fxls8962af_pm_ops = {
1304     SET_SYSTEM_SLEEP_PM_OPS(fxls8962af_suspend, fxls8962af_resume)
1305     SET_RUNTIME_PM_OPS(fxls8962af_runtime_suspend,
1306                fxls8962af_runtime_resume, NULL)
1307 };
1308 EXPORT_SYMBOL_NS_GPL(fxls8962af_pm_ops, IIO_FXLS8962AF);
1309 
1310 MODULE_AUTHOR("Sean Nyekjaer <sean@geanix.com>");
1311 MODULE_DESCRIPTION("NXP FXLS8962AF/FXLS8964AF accelerometer driver");
1312 MODULE_LICENSE("GPL v2");
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