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0009 #include <linux/module.h>
0010 #include <linux/i2c.h>
0011 #include <linux/iio/iio.h>
0012 #include <linux/iio/sysfs.h>
0013 #include <linux/byteorder/generic.h>
0014
0015 #define DMARD10_REG_ACTR 0x00
0016 #define DMARD10_REG_AFEM 0x0c
0017 #define DMARD10_REG_STADR 0x12
0018 #define DMARD10_REG_STAINT 0x1c
0019 #define DMARD10_REG_MISC2 0x1f
0020 #define DMARD10_REG_PD 0x21
0021
0022 #define DMARD10_MODE_OFF 0x00
0023 #define DMARD10_MODE_STANDBY 0x02
0024 #define DMARD10_MODE_ACTIVE 0x06
0025 #define DMARD10_MODE_READ_OTP 0x12
0026 #define DMARD10_MODE_RESET_DATA_PATH 0x82
0027
0028
0029 #define DMARD10_VALUE_AFEM_AFEN_NORMAL 0x8f
0030
0031 #define DMARD10_VALUE_CKSEL_ODR_100_204 0x74
0032
0033 #define DMARD10_VALUE_INTC 0x00
0034
0035 #define DMARD10_VALUE_TAPNS_AVE_2 0x11
0036
0037 #define DMARD10_VALUE_STADR 0x55
0038 #define DMARD10_VALUE_STAINT 0xaa
0039 #define DMARD10_VALUE_MISC2_OSCA_EN 0x08
0040 #define DMARD10_VALUE_PD_RST 0x52
0041
0042
0043 #define DMARD10_X_OFFSET 1
0044 #define DMARD10_Y_OFFSET 2
0045 #define DMARD10_Z_OFFSET 3
0046
0047
0048
0049
0050
0051
0052 static const int dmard10_nscale = 76640625;
0053
0054 #define DMARD10_CHANNEL(reg, axis) { \
0055 .type = IIO_ACCEL, \
0056 .address = reg, \
0057 .modified = 1, \
0058 .channel2 = IIO_MOD_##axis, \
0059 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
0060 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
0061 }
0062
0063 static const struct iio_chan_spec dmard10_channels[] = {
0064 DMARD10_CHANNEL(DMARD10_X_OFFSET, X),
0065 DMARD10_CHANNEL(DMARD10_Y_OFFSET, Y),
0066 DMARD10_CHANNEL(DMARD10_Z_OFFSET, Z),
0067 };
0068
0069 struct dmard10_data {
0070 struct i2c_client *client;
0071 };
0072
0073
0074 static int dmard10_reset(struct i2c_client *client)
0075 {
0076 unsigned char buffer[7];
0077 int ret;
0078
0079
0080 ret = i2c_smbus_write_byte_data(client, DMARD10_REG_PD,
0081 DMARD10_VALUE_PD_RST);
0082 if (ret < 0)
0083 return ret;
0084
0085
0086
0087
0088
0089 buffer[0] = DMARD10_REG_ACTR;
0090 buffer[1] = DMARD10_MODE_STANDBY;
0091 buffer[2] = DMARD10_MODE_READ_OTP;
0092 buffer[3] = DMARD10_MODE_STANDBY;
0093 buffer[4] = DMARD10_MODE_RESET_DATA_PATH;
0094 buffer[5] = DMARD10_MODE_STANDBY;
0095 ret = i2c_master_send(client, buffer, 6);
0096 if (ret < 0)
0097 return ret;
0098
0099
0100 ret = i2c_smbus_write_byte_data(client, DMARD10_REG_MISC2,
0101 DMARD10_VALUE_MISC2_OSCA_EN);
0102 if (ret < 0)
0103 return ret;
0104
0105
0106 buffer[0] = DMARD10_REG_AFEM;
0107 buffer[1] = DMARD10_VALUE_AFEM_AFEN_NORMAL;
0108 buffer[2] = DMARD10_VALUE_CKSEL_ODR_100_204;
0109 buffer[3] = DMARD10_VALUE_INTC;
0110 buffer[4] = DMARD10_VALUE_TAPNS_AVE_2;
0111 buffer[5] = 0x00;
0112 buffer[6] = 0x07;
0113 ret = i2c_master_send(client, buffer, 7);
0114 if (ret < 0)
0115 return ret;
0116
0117
0118 ret = i2c_smbus_write_byte_data(client, DMARD10_REG_ACTR,
0119 DMARD10_MODE_ACTIVE);
0120 if (ret < 0)
0121 return ret;
0122
0123 return 0;
0124 }
0125
0126
0127 static int dmard10_shutdown(struct i2c_client *client)
0128 {
0129 unsigned char buffer[3];
0130
0131 buffer[0] = DMARD10_REG_ACTR;
0132 buffer[1] = DMARD10_MODE_STANDBY;
0133 buffer[2] = DMARD10_MODE_OFF;
0134
0135 return i2c_master_send(client, buffer, 3);
0136 }
0137
0138 static int dmard10_read_raw(struct iio_dev *indio_dev,
0139 struct iio_chan_spec const *chan,
0140 int *val, int *val2, long mask)
0141 {
0142 struct dmard10_data *data = iio_priv(indio_dev);
0143 __le16 buf[4];
0144 int ret;
0145
0146 switch (mask) {
0147 case IIO_CHAN_INFO_RAW:
0148
0149
0150
0151
0152 ret = i2c_smbus_read_i2c_block_data(data->client,
0153 DMARD10_REG_STADR,
0154 sizeof(buf), (u8 *)buf);
0155 if (ret < 0)
0156 return ret;
0157 ret = le16_to_cpu(buf[chan->address]);
0158 *val = sign_extend32(ret, 12);
0159 return IIO_VAL_INT;
0160 case IIO_CHAN_INFO_SCALE:
0161 *val = 0;
0162 *val2 = dmard10_nscale;
0163 return IIO_VAL_INT_PLUS_NANO;
0164 default:
0165 return -EINVAL;
0166 }
0167 }
0168
0169 static const struct iio_info dmard10_info = {
0170 .read_raw = dmard10_read_raw,
0171 };
0172
0173 static void dmard10_shutdown_cleanup(void *client)
0174 {
0175 dmard10_shutdown(client);
0176 }
0177
0178 static int dmard10_probe(struct i2c_client *client,
0179 const struct i2c_device_id *id)
0180 {
0181 int ret;
0182 struct iio_dev *indio_dev;
0183 struct dmard10_data *data;
0184
0185
0186 ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STADR);
0187 if (ret != DMARD10_VALUE_STADR)
0188 return (ret < 0) ? ret : -ENODEV;
0189
0190 ret = i2c_smbus_read_byte_data(client, DMARD10_REG_STAINT);
0191 if (ret != DMARD10_VALUE_STAINT)
0192 return (ret < 0) ? ret : -ENODEV;
0193
0194 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
0195 if (!indio_dev) {
0196 dev_err(&client->dev, "iio allocation failed!\n");
0197 return -ENOMEM;
0198 }
0199
0200 data = iio_priv(indio_dev);
0201 data->client = client;
0202
0203 indio_dev->info = &dmard10_info;
0204 indio_dev->name = "dmard10";
0205 indio_dev->modes = INDIO_DIRECT_MODE;
0206 indio_dev->channels = dmard10_channels;
0207 indio_dev->num_channels = ARRAY_SIZE(dmard10_channels);
0208
0209 ret = dmard10_reset(client);
0210 if (ret < 0)
0211 return ret;
0212
0213 ret = devm_add_action_or_reset(&client->dev, dmard10_shutdown_cleanup,
0214 client);
0215 if (ret)
0216 return ret;
0217
0218 return devm_iio_device_register(&client->dev, indio_dev);
0219 }
0220
0221 static int dmard10_suspend(struct device *dev)
0222 {
0223 return dmard10_shutdown(to_i2c_client(dev));
0224 }
0225
0226 static int dmard10_resume(struct device *dev)
0227 {
0228 return dmard10_reset(to_i2c_client(dev));
0229 }
0230
0231 static DEFINE_SIMPLE_DEV_PM_OPS(dmard10_pm_ops, dmard10_suspend,
0232 dmard10_resume);
0233
0234 static const struct i2c_device_id dmard10_i2c_id[] = {
0235 {"dmard10", 0},
0236 {}
0237 };
0238 MODULE_DEVICE_TABLE(i2c, dmard10_i2c_id);
0239
0240 static struct i2c_driver dmard10_driver = {
0241 .driver = {
0242 .name = "dmard10",
0243 .pm = pm_sleep_ptr(&dmard10_pm_ops),
0244 },
0245 .probe = dmard10_probe,
0246 .id_table = dmard10_i2c_id,
0247 };
0248
0249 module_i2c_driver(dmard10_driver);
0250
0251 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
0252 MODULE_DESCRIPTION("Domintech ARD10 3-Axis Accelerometer driver");
0253 MODULE_LICENSE("GPL v2");