iio/accel/bma400.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Register constants and other forward declarations needed by the bma400
0004  * sources.
0005  *
0006  * Copyright 2019 Dan Robertson <dan@dlrobertson.com>
0007  */
0008
0009 #ifndef _BMA400_H_
0010 #define _BMA400_H_
0011
0012 #include <linux/bits.h>
0013 #include <linux/regmap.h>
0014
0015 /*
0016  * Read-Only Registers
0017  */
0018
0019 /* Status and ID registers */
0020 #define BMA400_CHIP_ID_REG          0x00
0021 #define BMA400_ERR_REG              0x02
0022 #define BMA400_STATUS_REG           0x03
0023
0024 /* Acceleration registers */
0025 #define BMA400_X_AXIS_LSB_REG       0x04
0026 #define BMA400_X_AXIS_MSB_REG       0x05
0027 #define BMA400_Y_AXIS_LSB_REG       0x06
0028 #define BMA400_Y_AXIS_MSB_REG       0x07
0029 #define BMA400_Z_AXIS_LSB_REG       0x08
0030 #define BMA400_Z_AXIS_MSB_REG       0x09
0031
0032 /* Sensor time registers */
0033 #define BMA400_SENSOR_TIME0         0x0a
0034 #define BMA400_SENSOR_TIME1         0x0b
0035 #define BMA400_SENSOR_TIME2         0x0c
0036
0037 /* Event and interrupt registers */
0038 #define BMA400_EVENT_REG            0x0d
0039 #define BMA400_INT_STAT0_REG        0x0e
0040 #define BMA400_INT_STAT1_REG        0x0f
0041 #define BMA400_INT_STAT2_REG        0x10
0042 #define BMA400_INT12_MAP_REG        0x23
0043
0044 /* Temperature register */
0045 #define BMA400_TEMP_DATA_REG        0x11
0046
0047 /* FIFO length and data registers */
0048 #define BMA400_FIFO_LENGTH0_REG     0x12
0049 #define BMA400_FIFO_LENGTH1_REG     0x13
0050 #define BMA400_FIFO_DATA_REG        0x14
0051
0052 /* Step count registers */
0053 #define BMA400_STEP_CNT0_REG        0x15
0054 #define BMA400_STEP_CNT1_REG        0x16
0055 #define BMA400_STEP_CNT3_REG        0x17
0056 #define BMA400_STEP_STAT_REG        0x18
0057 #define BMA400_STEP_INT_MSK         BIT(0)
0058 #define BMA400_STEP_RAW_LEN         0x03
0059 #define BMA400_STEP_STAT_MASK       GENMASK(9, 8)
0060
0061 /*
0062  * Read-write configuration registers
0063  */
0064 #define BMA400_ACC_CONFIG0_REG      0x19
0065 #define BMA400_ACC_CONFIG1_REG      0x1a
0066 #define BMA400_ACC_CONFIG2_REG      0x1b
0067 #define BMA400_CMD_REG              0x7e
0068
0069 /* Interrupt registers */
0070 #define BMA400_INT_CONFIG0_REG      0x1f
0071 #define BMA400_INT_CONFIG1_REG      0x20
0072 #define BMA400_INT1_MAP_REG     0x21
0073 #define BMA400_INT_IO_CTRL_REG      0x24
0074 #define BMA400_INT_DRDY_MSK     BIT(7)
0075
0076 /* Chip ID of BMA 400 devices found in the chip ID register. */
0077 #define BMA400_ID_REG_VAL           0x90
0078
0079 #define BMA400_LP_OSR_SHIFT         5
0080 #define BMA400_NP_OSR_SHIFT         4
0081 #define BMA400_SCALE_SHIFT          6
0082
0083 #define BMA400_TWO_BITS_MASK        GENMASK(1, 0)
0084 #define BMA400_LP_OSR_MASK          GENMASK(6, 5)
0085 #define BMA400_NP_OSR_MASK          GENMASK(5, 4)
0086 #define BMA400_ACC_ODR_MASK         GENMASK(3, 0)
0087 #define BMA400_ACC_SCALE_MASK       GENMASK(7, 6)
0088
0089 #define BMA400_ACC_ODR_MIN_RAW      0x05
0090 #define BMA400_ACC_ODR_LP_RAW       0x06
0091 #define BMA400_ACC_ODR_MAX_RAW      0x0b
0092
0093 #define BMA400_ACC_ODR_MAX_HZ       800
0094 #define BMA400_ACC_ODR_MIN_WHOLE_HZ 25
0095 #define BMA400_ACC_ODR_MIN_HZ       12
0096
0097 /* Generic interrupts register */
0098 #define BMA400_GEN1INT_CONFIG0      0x3f
0099 #define BMA400_GEN2INT_CONFIG0      0x4A
0100 #define BMA400_GEN_CONFIG1_OFF      0x01
0101 #define BMA400_GEN_CONFIG2_OFF      0x02
0102 #define BMA400_GEN_CONFIG3_OFF      0x03
0103 #define BMA400_GEN_CONFIG31_OFF     0x04
0104 #define BMA400_INT_GEN1_MSK         BIT(2)
0105 #define BMA400_INT_GEN2_MSK         BIT(3)
0106 #define BMA400_GEN_HYST_MSK         GENMASK(1, 0)
0107
0108 /*
0109  * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
0110  * converting to micro values for +-2g range.
0111  *
0112  * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
0113  * For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2
0114  * For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2
0115  *
0116  * The raw value which is used to select the different ranges is determined
0117  * by the first bit set position from the scale value, so BMA400_SCALE_MIN
0118  * should be odd.
0119  *
0120  * Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales
0121  * array by left shifting BMA400_SCALE_MIN.
0122  * e.g.:
0123  * To select +-2g = 9577 << 0 = raw value to write is 0.
0124  * To select +-8g = 9577 << 2 = raw value to write is 2.
0125  * To select +-16g = 9577 << 3 = raw value to write is 3.
0126  */
0127 #define BMA400_SCALE_MIN            9577
0128 #define BMA400_SCALE_MAX            76617
0129
0130 #define BMA400_NUM_REGULATORS       2
0131 #define BMA400_VDD_REGULATOR        0
0132 #define BMA400_VDDIO_REGULATOR      1
0133
0134 extern const struct regmap_config bma400_regmap_config;
0135
0136 int bma400_probe(struct device *dev, struct regmap *regmap, int irq,
0137          const char *name);
0138
0139 #endif