iio/accel/adxl313.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * ADXL313 3-Axis Digital Accelerometer
0004  *
0005  * Copyright (c) 2021 Lucas Stankus <lucas.p.stankus@gmail.com>
0006  */
0007
0008 #ifndef _ADXL313_H_
0009 #define _ADXL313_H_
0010
0011 /* ADXL313 register definitions */
0012 #define ADXL313_REG_DEVID0      0x00
0013 #define ADXL313_REG_DEVID1      0x01
0014 #define ADXL313_REG_PARTID      0x02
0015 #define ADXL313_REG_XID         0x04
0016 #define ADXL313_REG_SOFT_RESET      0x18
0017 #define ADXL313_REG_OFS_AXIS(index) (0x1E + (index))
0018 #define ADXL313_REG_THRESH_ACT      0x24
0019 #define ADXL313_REG_ACT_INACT_CTL   0x27
0020 #define ADXL313_REG_BW_RATE     0x2C
0021 #define ADXL313_REG_POWER_CTL       0x2D
0022 #define ADXL313_REG_INT_MAP     0x2F
0023 #define ADXL313_REG_DATA_FORMAT     0x31
0024 #define ADXL313_REG_DATA_AXIS(index)    (0x32 + ((index) * 2))
0025 #define ADXL313_REG_FIFO_CTL        0x38
0026 #define ADXL313_REG_FIFO_STATUS     0x39
0027
0028 #define ADXL313_DEVID0          0xAD
0029 #define ADXL313_DEVID1          0x1D
0030 #define ADXL313_PARTID          0xCB
0031 #define ADXL313_SOFT_RESET      0x52
0032
0033 #define ADXL313_RATE_MSK        GENMASK(3, 0)
0034 #define ADXL313_RATE_BASE       6
0035
0036 #define ADXL313_POWER_CTL_MSK       GENMASK(3, 2)
0037 #define ADXL313_MEASUREMENT_MODE    BIT(3)
0038
0039 #define ADXL313_RANGE_MSK       GENMASK(1, 0)
0040 #define ADXL313_RANGE_4G        3
0041
0042 #define ADXL313_FULL_RES        BIT(3)
0043 #define ADXL313_SPI_3WIRE       BIT(6)
0044 #define ADXL313_I2C_DISABLE     BIT(6)
0045
0046 extern const struct regmap_access_table adxl313_readable_regs_table;
0047
0048 extern const struct regmap_access_table adxl313_writable_regs_table;
0049
0050 int adxl313_core_probe(struct device *dev,
0051                struct regmap *regmap,
0052                const char *name,
0053                int (*setup)(struct device *, struct regmap *));
0054 #endif /* _ADXL313_H_ */