i2c/busses/scx200_acb.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
0004
0005     National Semiconductor SCx200 ACCESS.bus support
0006     Also supports the AMD CS5535 and AMD CS5536
0007
0008     Based on i2c-keywest.c which is:
0009         Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
0010         Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
0011
0012 */
0013
0014 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0015
0016 #include <linux/module.h>
0017 #include <linux/errno.h>
0018 #include <linux/kernel.h>
0019 #include <linux/init.h>
0020 #include <linux/i2c.h>
0021 #include <linux/pci.h>
0022 #include <linux/platform_device.h>
0023 #include <linux/delay.h>
0024 #include <linux/mutex.h>
0025 #include <linux/slab.h>
0026 #include <linux/io.h>
0027
0028 #include <linux/scx200.h>
0029
0030 MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
0031 MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
0032 MODULE_ALIAS("platform:cs5535-smb");
0033 MODULE_LICENSE("GPL");
0034
0035 #define MAX_DEVICES 4
0036 static int base[MAX_DEVICES] = { 0x820, 0x840 };
0037 module_param_hw_array(base, int, ioport, NULL, 0);
0038 MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
0039
0040 #define POLL_TIMEOUT    (HZ/5)
0041
0042 enum scx200_acb_state {
0043     state_idle,
0044     state_address,
0045     state_command,
0046     state_repeat_start,
0047     state_quick,
0048     state_read,
0049     state_write,
0050 };
0051
0052 static const char *scx200_acb_state_name[] = {
0053     "idle",
0054     "address",
0055     "command",
0056     "repeat_start",
0057     "quick",
0058     "read",
0059     "write",
0060 };
0061
0062 /* Physical interface */
0063 struct scx200_acb_iface {
0064     struct scx200_acb_iface *next;
0065     struct i2c_adapter adapter;
0066     unsigned base;
0067     struct mutex mutex;
0068
0069     /* State machine data */
0070     enum scx200_acb_state state;
0071     int result;
0072     u8 address_byte;
0073     u8 command;
0074     u8 *ptr;
0075     char needs_reset;
0076     unsigned len;
0077 };
0078
0079 /* Register Definitions */
0080 #define ACBSDA      (iface->base + 0)
0081 #define ACBST       (iface->base + 1)
0082 #define    ACBST_SDAST      0x40 /* SDA Status */
0083 #define    ACBST_BER        0x20
0084 #define    ACBST_NEGACK     0x10 /* Negative Acknowledge */
0085 #define    ACBST_STASTR     0x08 /* Stall After Start */
0086 #define    ACBST_MASTER     0x02
0087 #define ACBCST      (iface->base + 2)
0088 #define    ACBCST_BB        0x02
0089 #define ACBCTL1     (iface->base + 3)
0090 #define    ACBCTL1_STASTRE  0x80
0091 #define    ACBCTL1_NMINTE   0x40
0092 #define    ACBCTL1_ACK      0x10
0093 #define    ACBCTL1_STOP     0x02
0094 #define    ACBCTL1_START    0x01
0095 #define ACBADDR     (iface->base + 4)
0096 #define ACBCTL2     (iface->base + 5)
0097 #define    ACBCTL2_ENABLE   0x01
0098
0099 /************************************************************************/
0100
0101 static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
0102 {
0103     const char *errmsg;
0104
0105     dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
0106         scx200_acb_state_name[iface->state], status);
0107
0108     if (status & ACBST_BER) {
0109         errmsg = "bus error";
0110         goto error;
0111     }
0112     if (!(status & ACBST_MASTER)) {
0113         errmsg = "not master";
0114         goto error;
0115     }
0116     if (status & ACBST_NEGACK) {
0117         dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
0118             scx200_acb_state_name[iface->state]);
0119
0120         iface->state = state_idle;
0121         iface->result = -ENXIO;
0122
0123         outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
0124         outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
0125
0126         /* Reset the status register */
0127         outb(0, ACBST);
0128         return;
0129     }
0130
0131     switch (iface->state) {
0132     case state_idle:
0133         dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
0134         break;
0135
0136     case state_address:
0137         /* Do a pointer write first */
0138         outb(iface->address_byte & ~1, ACBSDA);
0139
0140         iface->state = state_command;
0141         break;
0142
0143     case state_command:
0144         outb(iface->command, ACBSDA);
0145
0146         if (iface->address_byte & 1)
0147             iface->state = state_repeat_start;
0148         else
0149             iface->state = state_write;
0150         break;
0151
0152     case state_repeat_start:
0153         outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
0154         fallthrough;
0155
0156     case state_quick:
0157         if (iface->address_byte & 1) {
0158             if (iface->len == 1)
0159                 outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
0160             else
0161                 outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
0162             outb(iface->address_byte, ACBSDA);
0163
0164             iface->state = state_read;
0165         } else {
0166             outb(iface->address_byte, ACBSDA);
0167
0168             iface->state = state_write;
0169         }
0170         break;
0171
0172     case state_read:
0173         /* Set ACK if _next_ byte will be the last one */
0174         if (iface->len == 2)
0175             outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
0176         else
0177             outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
0178
0179         if (iface->len == 1) {
0180             iface->result = 0;
0181             iface->state = state_idle;
0182             outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
0183         }
0184
0185         *iface->ptr++ = inb(ACBSDA);
0186         --iface->len;
0187
0188         break;
0189
0190     case state_write:
0191         if (iface->len == 0) {
0192             iface->result = 0;
0193             iface->state = state_idle;
0194             outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
0195             break;
0196         }
0197
0198         outb(*iface->ptr++, ACBSDA);
0199         --iface->len;
0200
0201         break;
0202     }
0203
0204     return;
0205
0206  error:
0207     dev_err(&iface->adapter.dev,
0208         "%s in state %s (addr=0x%02x, len=%d, status=0x%02x)\n", errmsg,
0209         scx200_acb_state_name[iface->state], iface->address_byte,
0210         iface->len, status);
0211
0212     iface->state = state_idle;
0213     iface->result = -EIO;
0214     iface->needs_reset = 1;
0215 }
0216
0217 static void scx200_acb_poll(struct scx200_acb_iface *iface)
0218 {
0219     u8 status;
0220     unsigned long timeout;
0221
0222     timeout = jiffies + POLL_TIMEOUT;
0223     while (1) {
0224         status = inb(ACBST);
0225
0226         /* Reset the status register to avoid the hang */
0227         outb(0, ACBST);
0228
0229         if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
0230             scx200_acb_machine(iface, status);
0231             return;
0232         }
0233         if (time_after(jiffies, timeout))
0234             break;
0235         cpu_relax();
0236         cond_resched();
0237     }
0238
0239     dev_err(&iface->adapter.dev, "timeout in state %s\n",
0240         scx200_acb_state_name[iface->state]);
0241
0242     iface->state = state_idle;
0243     iface->result = -EIO;
0244     iface->needs_reset = 1;
0245 }
0246
0247 static void scx200_acb_reset(struct scx200_acb_iface *iface)
0248 {
0249     /* Disable the ACCESS.bus device and Configure the SCL
0250        frequency: 16 clock cycles */
0251     outb(0x70, ACBCTL2);
0252     /* Polling mode */
0253     outb(0, ACBCTL1);
0254     /* Disable slave address */
0255     outb(0, ACBADDR);
0256     /* Enable the ACCESS.bus device */
0257     outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
0258     /* Free STALL after START */
0259     outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
0260     /* Send a STOP */
0261     outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
0262     /* Clear BER, NEGACK and STASTR bits */
0263     outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
0264     /* Clear BB bit */
0265     outb(inb(ACBCST) | ACBCST_BB, ACBCST);
0266 }
0267
0268 static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
0269                  u16 address, unsigned short flags,
0270                  char rw, u8 command, int size,
0271                  union i2c_smbus_data *data)
0272 {
0273     struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
0274     int len;
0275     u8 *buffer;
0276     u16 cur_word;
0277     int rc;
0278
0279     switch (size) {
0280     case I2C_SMBUS_QUICK:
0281         len = 0;
0282         buffer = NULL;
0283         break;
0284
0285     case I2C_SMBUS_BYTE:
0286         len = 1;
0287         buffer = rw ? &data->byte : &command;
0288         break;
0289
0290     case I2C_SMBUS_BYTE_DATA:
0291         len = 1;
0292         buffer = &data->byte;
0293         break;
0294
0295     case I2C_SMBUS_WORD_DATA:
0296         len = 2;
0297         cur_word = cpu_to_le16(data->word);
0298         buffer = (u8 *)&cur_word;
0299         break;
0300
0301     case I2C_SMBUS_I2C_BLOCK_DATA:
0302         len = data->block[0];
0303         if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
0304             return -EINVAL;
0305         buffer = &data->block[1];
0306         break;
0307
0308     default:
0309         return -EINVAL;
0310     }
0311
0312     dev_dbg(&adapter->dev,
0313         "size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
0314         size, address, command, len, rw);
0315
0316     if (!len && rw == I2C_SMBUS_READ) {
0317         dev_dbg(&adapter->dev, "zero length read\n");
0318         return -EINVAL;
0319     }
0320
0321     mutex_lock(&iface->mutex);
0322
0323     iface->address_byte = (address << 1) | rw;
0324     iface->command = command;
0325     iface->ptr = buffer;
0326     iface->len = len;
0327     iface->result = -EINVAL;
0328     iface->needs_reset = 0;
0329
0330     outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
0331
0332     if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
0333         iface->state = state_quick;
0334     else
0335         iface->state = state_address;
0336
0337     while (iface->state != state_idle)
0338         scx200_acb_poll(iface);
0339
0340     if (iface->needs_reset)
0341         scx200_acb_reset(iface);
0342
0343     rc = iface->result;
0344
0345     mutex_unlock(&iface->mutex);
0346
0347     if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
0348         data->word = le16_to_cpu(cur_word);
0349
0350 #ifdef DEBUG
0351     dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
0352     if (buffer) {
0353         int i;
0354         printk(" data:");
0355         for (i = 0; i < len; ++i)
0356             printk(" %02x", buffer[i]);
0357     }
0358     printk("\n");
0359 #endif
0360
0361     return rc;
0362 }
0363
0364 static u32 scx200_acb_func(struct i2c_adapter *adapter)
0365 {
0366     return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
0367            I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
0368            I2C_FUNC_SMBUS_I2C_BLOCK;
0369 }
0370
0371 /* For now, we only handle combined mode (smbus) */
0372 static const struct i2c_algorithm scx200_acb_algorithm = {
0373     .smbus_xfer = scx200_acb_smbus_xfer,
0374     .functionality  = scx200_acb_func,
0375 };
0376
0377 static struct scx200_acb_iface *scx200_acb_list;
0378 static DEFINE_MUTEX(scx200_acb_list_mutex);
0379
0380 static int scx200_acb_probe(struct scx200_acb_iface *iface)
0381 {
0382     u8 val;
0383
0384     /* Disable the ACCESS.bus device and Configure the SCL
0385        frequency: 16 clock cycles */
0386     outb(0x70, ACBCTL2);
0387
0388     if (inb(ACBCTL2) != 0x70) {
0389         pr_debug("ACBCTL2 readback failed\n");
0390         return -ENXIO;
0391     }
0392
0393     outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
0394
0395     val = inb(ACBCTL1);
0396     if (val) {
0397         pr_debug("disabled, but ACBCTL1=0x%02x\n", val);
0398         return -ENXIO;
0399     }
0400
0401     outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
0402
0403     outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
0404
0405     val = inb(ACBCTL1);
0406     if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
0407         pr_debug("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n",
0408              val);
0409         return -ENXIO;
0410     }
0411
0412     return 0;
0413 }
0414
0415 static struct scx200_acb_iface *scx200_create_iface(const char *text,
0416         struct device *dev, int index)
0417 {
0418     struct scx200_acb_iface *iface;
0419     struct i2c_adapter *adapter;
0420
0421     iface = kzalloc(sizeof(*iface), GFP_KERNEL);
0422     if (!iface)
0423         return NULL;
0424
0425     adapter = &iface->adapter;
0426     i2c_set_adapdata(adapter, iface);
0427     snprintf(adapter->name, sizeof(adapter->name), "%s ACB%d", text, index);
0428     adapter->owner = THIS_MODULE;
0429     adapter->algo = &scx200_acb_algorithm;
0430     adapter->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
0431     adapter->dev.parent = dev;
0432
0433     mutex_init(&iface->mutex);
0434
0435     return iface;
0436 }
0437
0438 static int scx200_acb_create(struct scx200_acb_iface *iface)
0439 {
0440     struct i2c_adapter *adapter;
0441     int rc;
0442
0443     adapter = &iface->adapter;
0444
0445     rc = scx200_acb_probe(iface);
0446     if (rc) {
0447         pr_warn("probe failed\n");
0448         return rc;
0449     }
0450
0451     scx200_acb_reset(iface);
0452
0453     if (i2c_add_adapter(adapter) < 0) {
0454         pr_err("failed to register\n");
0455         return -ENODEV;
0456     }
0457
0458     if (!adapter->dev.parent) {
0459         /* If there's no dev, we're tracking (ISA) ifaces manually */
0460         mutex_lock(&scx200_acb_list_mutex);
0461         iface->next = scx200_acb_list;
0462         scx200_acb_list = iface;
0463         mutex_unlock(&scx200_acb_list_mutex);
0464     }
0465
0466     return 0;
0467 }
0468
0469 static struct scx200_acb_iface *scx200_create_dev(const char *text,
0470         unsigned long base, int index, struct device *dev)
0471 {
0472     struct scx200_acb_iface *iface;
0473     int rc;
0474
0475     iface = scx200_create_iface(text, dev, index);
0476
0477     if (iface == NULL)
0478         return NULL;
0479
0480     if (!request_region(base, 8, iface->adapter.name)) {
0481         pr_err("can't allocate io 0x%lx-0x%lx\n", base, base + 8 - 1);
0482         goto errout_free;
0483     }
0484
0485     iface->base = base;
0486     rc = scx200_acb_create(iface);
0487
0488     if (rc == 0)
0489         return iface;
0490
0491     release_region(base, 8);
0492  errout_free:
0493     kfree(iface);
0494     return NULL;
0495 }
0496
0497 static int scx200_probe(struct platform_device *pdev)
0498 {
0499     struct scx200_acb_iface *iface;
0500     struct resource *res;
0501
0502     res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0503     if (!res) {
0504         dev_err(&pdev->dev, "can't fetch device resource info\n");
0505         return -ENODEV;
0506     }
0507
0508     iface = scx200_create_dev("CS5535", res->start, 0, &pdev->dev);
0509     if (!iface)
0510         return -EIO;
0511
0512     dev_info(&pdev->dev, "SCx200 device '%s' registered\n",
0513             iface->adapter.name);
0514     platform_set_drvdata(pdev, iface);
0515
0516     return 0;
0517 }
0518
0519 static void scx200_cleanup_iface(struct scx200_acb_iface *iface)
0520 {
0521     i2c_del_adapter(&iface->adapter);
0522     release_region(iface->base, 8);
0523     kfree(iface);
0524 }
0525
0526 static int scx200_remove(struct platform_device *pdev)
0527 {
0528     struct scx200_acb_iface *iface;
0529
0530     iface = platform_get_drvdata(pdev);
0531     scx200_cleanup_iface(iface);
0532
0533     return 0;
0534 }
0535
0536 static struct platform_driver scx200_pci_driver = {
0537     .driver = {
0538         .name = "cs5535-smb",
0539     },
0540     .probe = scx200_probe,
0541     .remove = scx200_remove,
0542 };
0543
0544 static const struct pci_device_id scx200_isa[] = {
0545     { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
0546     { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
0547     { 0, }
0548 };
0549
0550 static __init void scx200_scan_isa(void)
0551 {
0552     int i;
0553
0554     if (!pci_dev_present(scx200_isa))
0555         return;
0556
0557     for (i = 0; i < MAX_DEVICES; ++i) {
0558         if (base[i] == 0)
0559             continue;
0560
0561         /* XXX: should we care about failures? */
0562         scx200_create_dev("SCx200", base[i], i, NULL);
0563     }
0564 }
0565
0566 static int __init scx200_acb_init(void)
0567 {
0568     pr_debug("NatSemi SCx200 ACCESS.bus Driver\n");
0569
0570     /* First scan for ISA-based devices */
0571     scx200_scan_isa();  /* XXX: should we care about errors? */
0572
0573     /* If at least one bus was created, init must succeed */
0574     if (scx200_acb_list)
0575         return 0;
0576
0577     /* No ISA devices; register the platform driver for PCI-based devices */
0578     return platform_driver_register(&scx200_pci_driver);
0579 }
0580
0581 static void __exit scx200_acb_cleanup(void)
0582 {
0583     struct scx200_acb_iface *iface;
0584
0585     platform_driver_unregister(&scx200_pci_driver);
0586
0587     mutex_lock(&scx200_acb_list_mutex);
0588     while ((iface = scx200_acb_list) != NULL) {
0589         scx200_acb_list = iface->next;
0590         mutex_unlock(&scx200_acb_list_mutex);
0591
0592         scx200_cleanup_iface(iface);
0593
0594         mutex_lock(&scx200_acb_list_mutex);
0595     }
0596     mutex_unlock(&scx200_acb_list_mutex);
0597 }
0598
0599 module_init(scx200_acb_init);
0600 module_exit(scx200_acb_cleanup);