i2c/busses/i2c-stm32.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * i2c-stm32.c
0004  *
0005  * Copyright (C) M'boumba Cedric Madianga 2017
0006  * Author: M'boumba Cedric Madianga <cedric.madianga@gmail.com>
0007  */
0008
0009 #include "i2c-stm32.h"
0010
0011 /* Functions for DMA support */
0012 struct stm32_i2c_dma *stm32_i2c_dma_request(struct device *dev,
0013                         dma_addr_t phy_addr,
0014                         u32 txdr_offset,
0015                         u32 rxdr_offset)
0016 {
0017     struct stm32_i2c_dma *dma;
0018     struct dma_slave_config dma_sconfig;
0019     int ret;
0020
0021     dma = devm_kzalloc(dev, sizeof(*dma), GFP_KERNEL);
0022     if (!dma)
0023         return ERR_PTR(-ENOMEM);
0024
0025     /* Request and configure I2C TX dma channel */
0026     dma->chan_tx = dma_request_chan(dev, "tx");
0027     if (IS_ERR(dma->chan_tx)) {
0028         ret = PTR_ERR(dma->chan_tx);
0029         if (ret != -ENODEV)
0030             ret = dev_err_probe(dev, ret,
0031                         "can't request DMA tx channel\n");
0032         goto fail_al;
0033     }
0034
0035     memset(&dma_sconfig, 0, sizeof(dma_sconfig));
0036     dma_sconfig.dst_addr = phy_addr + txdr_offset;
0037     dma_sconfig.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
0038     dma_sconfig.dst_maxburst = 1;
0039     dma_sconfig.direction = DMA_MEM_TO_DEV;
0040     ret = dmaengine_slave_config(dma->chan_tx, &dma_sconfig);
0041     if (ret < 0) {
0042         dev_err(dev, "can't configure tx channel\n");
0043         goto fail_tx;
0044     }
0045
0046     /* Request and configure I2C RX dma channel */
0047     dma->chan_rx = dma_request_chan(dev, "rx");
0048     if (IS_ERR(dma->chan_rx)) {
0049         ret = PTR_ERR(dma->chan_rx);
0050         if (ret != -ENODEV)
0051             ret = dev_err_probe(dev, ret,
0052                         "can't request DMA rx channel\n");
0053
0054         goto fail_tx;
0055     }
0056
0057     memset(&dma_sconfig, 0, sizeof(dma_sconfig));
0058     dma_sconfig.src_addr = phy_addr + rxdr_offset;
0059     dma_sconfig.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
0060     dma_sconfig.src_maxburst = 1;
0061     dma_sconfig.direction = DMA_DEV_TO_MEM;
0062     ret = dmaengine_slave_config(dma->chan_rx, &dma_sconfig);
0063     if (ret < 0) {
0064         dev_err(dev, "can't configure rx channel\n");
0065         goto fail_rx;
0066     }
0067
0068     init_completion(&dma->dma_complete);
0069
0070     dev_info(dev, "using %s (tx) and %s (rx) for DMA transfers\n",
0071          dma_chan_name(dma->chan_tx), dma_chan_name(dma->chan_rx));
0072
0073     return dma;
0074
0075 fail_rx:
0076     dma_release_channel(dma->chan_rx);
0077 fail_tx:
0078     dma_release_channel(dma->chan_tx);
0079 fail_al:
0080     devm_kfree(dev, dma);
0081
0082     return ERR_PTR(ret);
0083 }
0084
0085 void stm32_i2c_dma_free(struct stm32_i2c_dma *dma)
0086 {
0087     dma->dma_buf = 0;
0088     dma->dma_len = 0;
0089
0090     dma_release_channel(dma->chan_tx);
0091     dma->chan_tx = NULL;
0092
0093     dma_release_channel(dma->chan_rx);
0094     dma->chan_rx = NULL;
0095
0096     dma->chan_using = NULL;
0097 }
0098
0099 int stm32_i2c_prep_dma_xfer(struct device *dev, struct stm32_i2c_dma *dma,
0100                 bool rd_wr, u32 len, u8 *buf,
0101                 dma_async_tx_callback callback,
0102                 void *dma_async_param)
0103 {
0104     struct dma_async_tx_descriptor *txdesc;
0105     struct device *chan_dev;
0106     int ret;
0107
0108     if (rd_wr) {
0109         dma->chan_using = dma->chan_rx;
0110         dma->dma_transfer_dir = DMA_DEV_TO_MEM;
0111         dma->dma_data_dir = DMA_FROM_DEVICE;
0112     } else {
0113         dma->chan_using = dma->chan_tx;
0114         dma->dma_transfer_dir = DMA_MEM_TO_DEV;
0115         dma->dma_data_dir = DMA_TO_DEVICE;
0116     }
0117
0118     dma->dma_len = len;
0119     chan_dev = dma->chan_using->device->dev;
0120
0121     dma->dma_buf = dma_map_single(chan_dev, buf, dma->dma_len,
0122                       dma->dma_data_dir);
0123     if (dma_mapping_error(chan_dev, dma->dma_buf)) {
0124         dev_err(dev, "DMA mapping failed\n");
0125         return -EINVAL;
0126     }
0127
0128     txdesc = dmaengine_prep_slave_single(dma->chan_using, dma->dma_buf,
0129                          dma->dma_len,
0130                          dma->dma_transfer_dir,
0131                          DMA_PREP_INTERRUPT);
0132     if (!txdesc) {
0133         dev_err(dev, "Not able to get desc for DMA xfer\n");
0134         ret = -EINVAL;
0135         goto err;
0136     }
0137
0138     reinit_completion(&dma->dma_complete);
0139
0140     txdesc->callback = callback;
0141     txdesc->callback_param = dma_async_param;
0142     ret = dma_submit_error(dmaengine_submit(txdesc));
0143     if (ret < 0) {
0144         dev_err(dev, "DMA submit failed\n");
0145         goto err;
0146     }
0147
0148     dma_async_issue_pending(dma->chan_using);
0149
0150     return 0;
0151
0152 err:
0153     dma_unmap_single(chan_dev, dma->dma_buf, dma->dma_len,
0154              dma->dma_data_dir);
0155     return ret;
0156 }