i2c/busses/i2c-nforce2.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     SMBus driver for nVidia nForce2 MCP
0004
0005     Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
0006     Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
0007     Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
0008     Based on
0009     SMBus 2.0 driver for AMD-8111 IO-Hub
0010     Copyright (c) 2002 Vojtech Pavlik
0011
0012 */
0013
0014 /*
0015     SUPPORTED DEVICES       PCI ID
0016     nForce2 MCP         0064
0017     nForce2 Ultra 400 MCP   0084
0018     nForce3 Pro150 MCP      00D4
0019     nForce3 250Gb MCP       00E4
0020     nForce4 MCP         0052
0021     nForce4 MCP-04      0034
0022     nForce MCP51        0264
0023     nForce MCP55        0368
0024     nForce MCP61        03EB
0025     nForce MCP65        0446
0026     nForce MCP67        0542
0027     nForce MCP73        07D8
0028     nForce MCP78S       0752
0029     nForce MCP79        0AA2
0030
0031     This driver supports the 2 SMBuses that are included in the MCP of the
0032     nForce2/3/4/5xx chipsets.
0033 */
0034
0035 /* Note: we assume there can only be one nForce2, with two SMBus interfaces */
0036
0037 #include <linux/module.h>
0038 #include <linux/pci.h>
0039 #include <linux/kernel.h>
0040 #include <linux/stddef.h>
0041 #include <linux/ioport.h>
0042 #include <linux/i2c.h>
0043 #include <linux/delay.h>
0044 #include <linux/dmi.h>
0045 #include <linux/acpi.h>
0046 #include <linux/slab.h>
0047 #include <linux/io.h>
0048
0049 MODULE_LICENSE("GPL");
0050 MODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
0051 MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
0052
0053
0054 struct nforce2_smbus {
0055     struct i2c_adapter adapter;
0056     int base;
0057     int size;
0058     int blockops;
0059     int can_abort;
0060 };
0061
0062
0063 /*
0064  * nVidia nForce2 SMBus control register definitions
0065  * (Newer incarnations use standard BARs 4 and 5 instead)
0066  */
0067 #define NFORCE_PCI_SMB1 0x50
0068 #define NFORCE_PCI_SMB2 0x54
0069
0070
0071 /*
0072  * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
0073  */
0074 #define NVIDIA_SMB_PRTCL    (smbus->base + 0x00)    /* protocol, PEC */
0075 #define NVIDIA_SMB_STS      (smbus->base + 0x01)    /* status */
0076 #define NVIDIA_SMB_ADDR     (smbus->base + 0x02)    /* address */
0077 #define NVIDIA_SMB_CMD      (smbus->base + 0x03)    /* command */
0078 #define NVIDIA_SMB_DATA     (smbus->base + 0x04)    /* 32 data registers */
0079 #define NVIDIA_SMB_BCNT     (smbus->base + 0x24)    /* number of data
0080                                bytes */
0081 #define NVIDIA_SMB_STATUS_ABRT  (smbus->base + 0x3c)    /* register used to
0082                                check the status of
0083                                the abort command */
0084 #define NVIDIA_SMB_CTRL     (smbus->base + 0x3e)    /* control register */
0085
0086 #define NVIDIA_SMB_STATUS_ABRT_STS  0x01        /* Bit to notify that
0087                                abort succeeded */
0088 #define NVIDIA_SMB_CTRL_ABORT   0x20
0089 #define NVIDIA_SMB_STS_DONE 0x80
0090 #define NVIDIA_SMB_STS_ALRM 0x40
0091 #define NVIDIA_SMB_STS_RES  0x20
0092 #define NVIDIA_SMB_STS_STATUS   0x1f
0093
0094 #define NVIDIA_SMB_PRTCL_WRITE          0x00
0095 #define NVIDIA_SMB_PRTCL_READ           0x01
0096 #define NVIDIA_SMB_PRTCL_QUICK          0x02
0097 #define NVIDIA_SMB_PRTCL_BYTE           0x04
0098 #define NVIDIA_SMB_PRTCL_BYTE_DATA      0x06
0099 #define NVIDIA_SMB_PRTCL_WORD_DATA      0x08
0100 #define NVIDIA_SMB_PRTCL_BLOCK_DATA     0x0a
0101 #define NVIDIA_SMB_PRTCL_PEC            0x80
0102
0103 /* Misc definitions */
0104 #define MAX_TIMEOUT 100
0105
0106 /* We disable the second SMBus channel on these boards */
0107 static const struct dmi_system_id nforce2_dmi_blacklist2[] = {
0108     {
0109         .ident = "DFI Lanparty NF4 Expert",
0110         .matches = {
0111             DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
0112             DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
0113         },
0114     },
0115     { }
0116 };
0117
0118 static struct pci_driver nforce2_driver;
0119
0120 /* For multiplexing support, we need a global reference to the 1st
0121    SMBus channel */
0122 #if IS_ENABLED(CONFIG_I2C_NFORCE2_S4985)
0123 struct i2c_adapter *nforce2_smbus;
0124 EXPORT_SYMBOL_GPL(nforce2_smbus);
0125
0126 static void nforce2_set_reference(struct i2c_adapter *adap)
0127 {
0128     nforce2_smbus = adap;
0129 }
0130 #else
0131 static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
0132 #endif
0133
0134 static void nforce2_abort(struct i2c_adapter *adap)
0135 {
0136     struct nforce2_smbus *smbus = adap->algo_data;
0137     int timeout = 0;
0138     unsigned char temp;
0139
0140     dev_dbg(&adap->dev, "Aborting current transaction\n");
0141
0142     outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
0143     do {
0144         msleep(1);
0145         temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
0146     } while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
0147             (timeout++ < MAX_TIMEOUT));
0148     if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
0149         dev_err(&adap->dev, "Can't reset the smbus\n");
0150     outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
0151 }
0152
0153 static int nforce2_check_status(struct i2c_adapter *adap)
0154 {
0155     struct nforce2_smbus *smbus = adap->algo_data;
0156     int timeout = 0;
0157     unsigned char temp;
0158
0159     do {
0160         msleep(1);
0161         temp = inb_p(NVIDIA_SMB_STS);
0162     } while ((!temp) && (timeout++ < MAX_TIMEOUT));
0163
0164     if (timeout > MAX_TIMEOUT) {
0165         dev_dbg(&adap->dev, "SMBus Timeout!\n");
0166         if (smbus->can_abort)
0167             nforce2_abort(adap);
0168         return -ETIMEDOUT;
0169     }
0170     if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
0171         dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
0172         return -EIO;
0173     }
0174     return 0;
0175 }
0176
0177 /* Return negative errno on error */
0178 static s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
0179         unsigned short flags, char read_write,
0180         u8 command, int size, union i2c_smbus_data *data)
0181 {
0182     struct nforce2_smbus *smbus = adap->algo_data;
0183     unsigned char protocol, pec;
0184     u8 len;
0185     int i, status;
0186
0187     protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
0188         NVIDIA_SMB_PRTCL_WRITE;
0189     pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
0190
0191     switch (size) {
0192     case I2C_SMBUS_QUICK:
0193         protocol |= NVIDIA_SMB_PRTCL_QUICK;
0194         read_write = I2C_SMBUS_WRITE;
0195         break;
0196
0197     case I2C_SMBUS_BYTE:
0198         if (read_write == I2C_SMBUS_WRITE)
0199             outb_p(command, NVIDIA_SMB_CMD);
0200         protocol |= NVIDIA_SMB_PRTCL_BYTE;
0201         break;
0202
0203     case I2C_SMBUS_BYTE_DATA:
0204         outb_p(command, NVIDIA_SMB_CMD);
0205         if (read_write == I2C_SMBUS_WRITE)
0206             outb_p(data->byte, NVIDIA_SMB_DATA);
0207         protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
0208         break;
0209
0210     case I2C_SMBUS_WORD_DATA:
0211         outb_p(command, NVIDIA_SMB_CMD);
0212         if (read_write == I2C_SMBUS_WRITE) {
0213             outb_p(data->word, NVIDIA_SMB_DATA);
0214             outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
0215         }
0216         protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
0217         break;
0218
0219     case I2C_SMBUS_BLOCK_DATA:
0220         outb_p(command, NVIDIA_SMB_CMD);
0221         if (read_write == I2C_SMBUS_WRITE) {
0222             len = data->block[0];
0223             if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
0224                 dev_err(&adap->dev,
0225                     "Transaction failed (requested block size: %d)\n",
0226                     len);
0227                 return -EINVAL;
0228             }
0229             outb_p(len, NVIDIA_SMB_BCNT);
0230             for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
0231                 outb_p(data->block[i + 1],
0232                        NVIDIA_SMB_DATA + i);
0233         }
0234         protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
0235         break;
0236
0237     default:
0238         dev_err(&adap->dev, "Unsupported transaction %d\n", size);
0239         return -EOPNOTSUPP;
0240     }
0241
0242     outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
0243     outb_p(protocol, NVIDIA_SMB_PRTCL);
0244
0245     status = nforce2_check_status(adap);
0246     if (status)
0247         return status;
0248
0249     if (read_write == I2C_SMBUS_WRITE)
0250         return 0;
0251
0252     switch (size) {
0253     case I2C_SMBUS_BYTE:
0254     case I2C_SMBUS_BYTE_DATA:
0255         data->byte = inb_p(NVIDIA_SMB_DATA);
0256         break;
0257
0258     case I2C_SMBUS_WORD_DATA:
0259         data->word = inb_p(NVIDIA_SMB_DATA) |
0260                  (inb_p(NVIDIA_SMB_DATA + 1) << 8);
0261         break;
0262
0263     case I2C_SMBUS_BLOCK_DATA:
0264         len = inb_p(NVIDIA_SMB_BCNT);
0265         if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
0266             dev_err(&adap->dev,
0267                 "Transaction failed (received block size: 0x%02x)\n",
0268                 len);
0269             return -EPROTO;
0270         }
0271         for (i = 0; i < len; i++)
0272             data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
0273         data->block[0] = len;
0274         break;
0275     }
0276
0277     return 0;
0278 }
0279
0280
0281 static u32 nforce2_func(struct i2c_adapter *adapter)
0282 {
0283     /* other functionality might be possible, but is not tested */
0284     return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
0285            I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
0286            I2C_FUNC_SMBUS_PEC |
0287            (((struct nforce2_smbus *)adapter->algo_data)->blockops ?
0288         I2C_FUNC_SMBUS_BLOCK_DATA : 0);
0289 }
0290
0291 static const struct i2c_algorithm smbus_algorithm = {
0292     .smbus_xfer = nforce2_access,
0293     .functionality  = nforce2_func,
0294 };
0295
0296
0297 static const struct pci_device_id nforce2_ids[] = {
0298     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
0299     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
0300     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
0301     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
0302     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
0303     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
0304     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
0305     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
0306     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
0307     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
0308     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
0309     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
0310     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
0311     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
0312     { 0 }
0313 };
0314
0315 MODULE_DEVICE_TABLE(pci, nforce2_ids);
0316
0317
0318 static int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
0319                  struct nforce2_smbus *smbus, const char *name)
0320 {
0321     int error;
0322
0323     smbus->base = pci_resource_start(dev, bar);
0324     if (smbus->base) {
0325         smbus->size = pci_resource_len(dev, bar);
0326     } else {
0327         /* Older incarnations of the device used non-standard BARs */
0328         u16 iobase;
0329
0330         if (pci_read_config_word(dev, alt_reg, &iobase)
0331             != PCIBIOS_SUCCESSFUL) {
0332             dev_err(&dev->dev, "Error reading PCI config for %s\n",
0333                 name);
0334             return -EIO;
0335         }
0336
0337         smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
0338         smbus->size = 64;
0339     }
0340
0341     error = acpi_check_region(smbus->base, smbus->size,
0342                   nforce2_driver.name);
0343     if (error)
0344         return error;
0345
0346     if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
0347         dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
0348             smbus->base, smbus->base+smbus->size-1, name);
0349         return -EBUSY;
0350     }
0351     smbus->adapter.owner = THIS_MODULE;
0352     smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
0353     smbus->adapter.algo = &smbus_algorithm;
0354     smbus->adapter.algo_data = smbus;
0355     smbus->adapter.dev.parent = &dev->dev;
0356     snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
0357         "SMBus nForce2 adapter at %04x", smbus->base);
0358
0359     error = i2c_add_adapter(&smbus->adapter);
0360     if (error) {
0361         release_region(smbus->base, smbus->size);
0362         return error;
0363     }
0364     dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
0365         smbus->base);
0366     return 0;
0367 }
0368
0369
0370 static int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
0371 {
0372     struct nforce2_smbus *smbuses;
0373     int res1, res2;
0374
0375     /* we support 2 SMBus adapters */
0376     smbuses = kcalloc(2, sizeof(struct nforce2_smbus), GFP_KERNEL);
0377     if (!smbuses)
0378         return -ENOMEM;
0379     pci_set_drvdata(dev, smbuses);
0380
0381     switch (dev->device) {
0382     case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
0383     case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
0384     case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
0385         smbuses[0].blockops = 1;
0386         smbuses[1].blockops = 1;
0387         smbuses[0].can_abort = 1;
0388         smbuses[1].can_abort = 1;
0389     }
0390
0391     /* SMBus adapter 1 */
0392     res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
0393     if (res1 < 0)
0394         smbuses[0].base = 0;    /* to have a check value */
0395
0396     /* SMBus adapter 2 */
0397     if (dmi_check_system(nforce2_dmi_blacklist2)) {
0398         dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
0399         res2 = -EPERM;
0400         smbuses[1].base = 0;
0401     } else {
0402         res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
0403                      "SMB2");
0404         if (res2 < 0)
0405             smbuses[1].base = 0;    /* to have a check value */
0406     }
0407
0408     if ((res1 < 0) && (res2 < 0)) {
0409         /* we did not find even one of the SMBuses, so we give up */
0410         kfree(smbuses);
0411         return -ENODEV;
0412     }
0413
0414     nforce2_set_reference(&smbuses[0].adapter);
0415     return 0;
0416 }
0417
0418
0419 static void nforce2_remove(struct pci_dev *dev)
0420 {
0421     struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
0422
0423     nforce2_set_reference(NULL);
0424     if (smbuses[0].base) {
0425         i2c_del_adapter(&smbuses[0].adapter);
0426         release_region(smbuses[0].base, smbuses[0].size);
0427     }
0428     if (smbuses[1].base) {
0429         i2c_del_adapter(&smbuses[1].adapter);
0430         release_region(smbuses[1].base, smbuses[1].size);
0431     }
0432     kfree(smbuses);
0433 }
0434
0435 static struct pci_driver nforce2_driver = {
0436     .name       = "nForce2_smbus",
0437     .id_table   = nforce2_ids,
0438     .probe      = nforce2_probe,
0439     .remove     = nforce2_remove,
0440 };
0441
0442 module_pci_driver(nforce2_driver);