i2c/busses/i2c-designware-slave.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Synopsys DesignWare I2C adapter driver (slave only).
0004  *
0005  * Based on the Synopsys DesignWare I2C adapter driver (master).
0006  *
0007  * Copyright (C) 2016 Synopsys Inc.
0008  */
0009 #include <linux/delay.h>
0010 #include <linux/err.h>
0011 #include <linux/errno.h>
0012 #include <linux/i2c.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/io.h>
0015 #include <linux/module.h>
0016 #include <linux/pm_runtime.h>
0017 #include <linux/regmap.h>
0018
0019 #include "i2c-designware-core.h"
0020
0021 static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
0022 {
0023     /* Configure Tx/Rx FIFO threshold levels. */
0024     regmap_write(dev->map, DW_IC_TX_TL, 0);
0025     regmap_write(dev->map, DW_IC_RX_TL, 0);
0026
0027     /* Configure the I2C slave. */
0028     regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);
0029     regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);
0030 }
0031
0032 /**
0033  * i2c_dw_init_slave() - Initialize the designware i2c slave hardware
0034  * @dev: device private data
0035  *
0036  * This function configures and enables the I2C in slave mode.
0037  * This function is called during I2C init function, and in case of timeout at
0038  * run time.
0039  */
0040 static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
0041 {
0042     int ret;
0043
0044     ret = i2c_dw_acquire_lock(dev);
0045     if (ret)
0046         return ret;
0047
0048     /* Disable the adapter. */
0049     __i2c_dw_disable(dev);
0050
0051     /* Write SDA hold time if supported */
0052     if (dev->sda_hold_time)
0053         regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
0054
0055     i2c_dw_configure_fifo_slave(dev);
0056     i2c_dw_release_lock(dev);
0057
0058     return 0;
0059 }
0060
0061 static int i2c_dw_reg_slave(struct i2c_client *slave)
0062 {
0063     struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
0064
0065     if (dev->slave)
0066         return -EBUSY;
0067     if (slave->flags & I2C_CLIENT_TEN)
0068         return -EAFNOSUPPORT;
0069     pm_runtime_get_sync(dev->dev);
0070
0071     /*
0072      * Set slave address in the IC_SAR register,
0073      * the address to which the DW_apb_i2c responds.
0074      */
0075     __i2c_dw_disable_nowait(dev);
0076     regmap_write(dev->map, DW_IC_SAR, slave->addr);
0077     dev->slave = slave;
0078
0079     __i2c_dw_enable(dev);
0080
0081     dev->cmd_err = 0;
0082     dev->msg_write_idx = 0;
0083     dev->msg_read_idx = 0;
0084     dev->msg_err = 0;
0085     dev->status = STATUS_IDLE;
0086     dev->abort_source = 0;
0087     dev->rx_outstanding = 0;
0088
0089     return 0;
0090 }
0091
0092 static int i2c_dw_unreg_slave(struct i2c_client *slave)
0093 {
0094     struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
0095
0096     dev->disable_int(dev);
0097     dev->disable(dev);
0098     synchronize_irq(dev->irq);
0099     dev->slave = NULL;
0100     pm_runtime_put(dev->dev);
0101
0102     return 0;
0103 }
0104
0105 static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
0106 {
0107     u32 stat, dummy;
0108
0109     /*
0110      * The IC_INTR_STAT register just indicates "enabled" interrupts.
0111      * The unmasked raw version of interrupt status bits is available
0112      * in the IC_RAW_INTR_STAT register.
0113      *
0114      * That is,
0115      *   stat = readl(IC_INTR_STAT);
0116      * equals to,
0117      *   stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
0118      *
0119      * The raw version might be useful for debugging purposes.
0120      */
0121     regmap_read(dev->map, DW_IC_INTR_STAT, &stat);
0122
0123     /*
0124      * Do not use the IC_CLR_INTR register to clear interrupts, or
0125      * you'll miss some interrupts, triggered during the period from
0126      * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
0127      *
0128      * Instead, use the separately-prepared IC_CLR_* registers.
0129      */
0130     if (stat & DW_IC_INTR_TX_ABRT)
0131         regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);
0132     if (stat & DW_IC_INTR_RX_UNDER)
0133         regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);
0134     if (stat & DW_IC_INTR_RX_OVER)
0135         regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);
0136     if (stat & DW_IC_INTR_TX_OVER)
0137         regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);
0138     if (stat & DW_IC_INTR_RX_DONE)
0139         regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
0140     if (stat & DW_IC_INTR_ACTIVITY)
0141         regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
0142     if (stat & DW_IC_INTR_STOP_DET)
0143         regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
0144     if (stat & DW_IC_INTR_START_DET)
0145         regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
0146     if (stat & DW_IC_INTR_GEN_CALL)
0147         regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);
0148
0149     return stat;
0150 }
0151
0152 /*
0153  * Interrupt service routine. This gets called whenever an I2C slave interrupt
0154  * occurs.
0155  */
0156
0157 static int i2c_dw_irq_handler_slave(struct dw_i2c_dev *dev)
0158 {
0159     u32 raw_stat, stat, enabled, tmp;
0160     u8 val = 0, slave_activity;
0161
0162     regmap_read(dev->map, DW_IC_ENABLE, &enabled);
0163     regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat);
0164     regmap_read(dev->map, DW_IC_STATUS, &tmp);
0165     slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
0166
0167     if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave)
0168         return 0;
0169
0170     stat = i2c_dw_read_clear_intrbits_slave(dev);
0171     dev_dbg(dev->dev,
0172         "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
0173         enabled, slave_activity, raw_stat, stat);
0174
0175     if (stat & DW_IC_INTR_RX_FULL) {
0176         if (dev->status != STATUS_WRITE_IN_PROGRESS) {
0177             dev->status = STATUS_WRITE_IN_PROGRESS;
0178             i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
0179                     &val);
0180         }
0181
0182         regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
0183         val = tmp;
0184         if (!i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
0185                      &val))
0186             dev_vdbg(dev->dev, "Byte %X acked!", val);
0187     }
0188
0189     if (stat & DW_IC_INTR_RD_REQ) {
0190         if (slave_activity) {
0191             regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
0192
0193             dev->status = STATUS_READ_IN_PROGRESS;
0194             if (!i2c_slave_event(dev->slave,
0195                          I2C_SLAVE_READ_REQUESTED,
0196                          &val))
0197                 regmap_write(dev->map, DW_IC_DATA_CMD, val);
0198         }
0199     }
0200
0201     if (stat & DW_IC_INTR_RX_DONE) {
0202         if (!i2c_slave_event(dev->slave, I2C_SLAVE_READ_PROCESSED,
0203                      &val))
0204             regmap_read(dev->map, DW_IC_CLR_RX_DONE, &tmp);
0205     }
0206
0207     if (stat & DW_IC_INTR_STOP_DET) {
0208         dev->status = STATUS_IDLE;
0209         i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
0210     }
0211
0212     return 1;
0213 }
0214
0215 static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
0216 {
0217     struct dw_i2c_dev *dev = dev_id;
0218     int ret;
0219
0220     ret = i2c_dw_irq_handler_slave(dev);
0221     if (ret > 0)
0222         complete(&dev->cmd_complete);
0223
0224     return IRQ_RETVAL(ret);
0225 }
0226
0227 static const struct i2c_algorithm i2c_dw_algo = {
0228     .functionality = i2c_dw_func,
0229     .reg_slave = i2c_dw_reg_slave,
0230     .unreg_slave = i2c_dw_unreg_slave,
0231 };
0232
0233 void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
0234 {
0235     dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
0236
0237     dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
0238              DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
0239
0240     dev->mode = DW_IC_SLAVE;
0241 }
0242 EXPORT_SYMBOL_GPL(i2c_dw_configure_slave);
0243
0244 int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
0245 {
0246     struct i2c_adapter *adap = &dev->adapter;
0247     int ret;
0248
0249     init_completion(&dev->cmd_complete);
0250
0251     dev->init = i2c_dw_init_slave;
0252     dev->disable = i2c_dw_disable;
0253     dev->disable_int = i2c_dw_disable_int;
0254
0255     ret = i2c_dw_init_regmap(dev);
0256     if (ret)
0257         return ret;
0258
0259     ret = i2c_dw_set_sda_hold(dev);
0260     if (ret)
0261         return ret;
0262
0263     ret = i2c_dw_set_fifo_size(dev);
0264     if (ret)
0265         return ret;
0266
0267     ret = dev->init(dev);
0268     if (ret)
0269         return ret;
0270
0271     snprintf(adap->name, sizeof(adap->name),
0272          "Synopsys DesignWare I2C Slave adapter");
0273     adap->retries = 3;
0274     adap->algo = &i2c_dw_algo;
0275     adap->dev.parent = dev->dev;
0276     i2c_set_adapdata(adap, dev);
0277
0278     ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
0279                    IRQF_SHARED, dev_name(dev->dev), dev);
0280     if (ret) {
0281         dev_err(dev->dev, "failure requesting irq %i: %d\n",
0282             dev->irq, ret);
0283         return ret;
0284     }
0285
0286     ret = i2c_add_numbered_adapter(adap);
0287     if (ret)
0288         dev_err(dev->dev, "failure adding adapter: %d\n", ret);
0289
0290     return ret;
0291 }
0292 EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
0293
0294 MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>");
0295 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
0296 MODULE_LICENSE("GPL v2");