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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Synopsys DesignWare I2C adapter driver (master only).
0004  *
0005  * Based on the TI DAVINCI I2C adapter driver.
0006  *
0007  * Copyright (C) 2006 Texas Instruments.
0008  * Copyright (C) 2007 MontaVista Software Inc.
0009  * Copyright (C) 2009 Provigent Ltd.
0010  * Copyright (C) 2011, 2015, 2016 Intel Corporation.
0011  */
0012 #include <linux/acpi.h>
0013 #include <linux/delay.h>
0014 #include <linux/err.h>
0015 #include <linux/errno.h>
0016 #include <linux/i2c.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/io.h>
0019 #include <linux/kernel.h>
0020 #include <linux/module.h>
0021 #include <linux/pci.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/sched.h>
0024 #include <linux/slab.h>
0025 
0026 #include "i2c-designware-core.h"
0027 #include "i2c-ccgx-ucsi.h"
0028 
0029 #define DRIVER_NAME "i2c-designware-pci"
0030 #define AMD_CLK_RATE_HZ 100000
0031 
0032 enum dw_pci_ctl_id_t {
0033     medfield,
0034     merrifield,
0035     baytrail,
0036     cherrytrail,
0037     haswell,
0038     elkhartlake,
0039     navi_amd,
0040 };
0041 
0042 /*
0043  * This is a legacy structure to describe the hardware counters
0044  * to configure signal timings on the bus. For Device Tree platforms
0045  * one should use the respective properties and for ACPI there is
0046  * a set of ACPI methods that provide these counters. No new
0047  * platform should use this structure.
0048  */
0049 struct dw_scl_sda_cfg {
0050     u16 ss_hcnt;
0051     u16 fs_hcnt;
0052     u16 ss_lcnt;
0053     u16 fs_lcnt;
0054     u32 sda_hold;
0055 };
0056 
0057 struct dw_pci_controller {
0058     u32 bus_num;
0059     u32 flags;
0060     struct dw_scl_sda_cfg *scl_sda_cfg;
0061     int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
0062     u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
0063 };
0064 
0065 /* Merrifield HCNT/LCNT/SDA hold time */
0066 static struct dw_scl_sda_cfg mrfld_config = {
0067     .ss_hcnt = 0x2f8,
0068     .fs_hcnt = 0x87,
0069     .ss_lcnt = 0x37b,
0070     .fs_lcnt = 0x10a,
0071 };
0072 
0073 /* BayTrail HCNT/LCNT/SDA hold time */
0074 static struct dw_scl_sda_cfg byt_config = {
0075     .ss_hcnt = 0x200,
0076     .fs_hcnt = 0x55,
0077     .ss_lcnt = 0x200,
0078     .fs_lcnt = 0x99,
0079     .sda_hold = 0x6,
0080 };
0081 
0082 /* Haswell HCNT/LCNT/SDA hold time */
0083 static struct dw_scl_sda_cfg hsw_config = {
0084     .ss_hcnt = 0x01b0,
0085     .fs_hcnt = 0x48,
0086     .ss_lcnt = 0x01fb,
0087     .fs_lcnt = 0xa0,
0088     .sda_hold = 0x9,
0089 };
0090 
0091 /* NAVI-AMD HCNT/LCNT/SDA hold time */
0092 static struct dw_scl_sda_cfg navi_amd_config = {
0093     .ss_hcnt = 0x1ae,
0094     .ss_lcnt = 0x23a,
0095     .sda_hold = 0x9,
0096 };
0097 
0098 static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
0099 {
0100     return 25000;
0101 }
0102 
0103 static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev)
0104 {
0105     return AMD_CLK_RATE_HZ;
0106 }
0107 
0108 static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
0109 {
0110     struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
0111 
0112     switch (pdev->device) {
0113     case 0x0817:
0114         dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
0115         fallthrough;
0116     case 0x0818:
0117     case 0x0819:
0118         c->bus_num = pdev->device - 0x817 + 3;
0119         return 0;
0120     case 0x082C:
0121     case 0x082D:
0122     case 0x082E:
0123         c->bus_num = pdev->device - 0x82C + 0;
0124         return 0;
0125     }
0126     return -ENODEV;
0127 }
0128 
0129 static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
0130 {
0131     struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
0132 
0133     dev->flags |= MODEL_AMD_NAVI_GPU;
0134     dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
0135     return 0;
0136 }
0137 
0138 static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
0139 {
0140     /*
0141      * On Intel Merrifield the user visible i2c buses are enumerated
0142      * [1..7]. So, we add 1 to shift the default range. Besides that the
0143      * first PCI slot provides 4 functions, that's why we have to add 0 to
0144      * the first slot and 4 to the next one.
0145      */
0146     switch (PCI_SLOT(pdev->devfn)) {
0147     case 8:
0148         c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
0149         return 0;
0150     case 9:
0151         c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
0152         return 0;
0153     }
0154     return -ENODEV;
0155 }
0156 
0157 static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
0158 {
0159     return 100000;
0160 }
0161 
0162 static struct dw_pci_controller dw_pci_controllers[] = {
0163     [medfield] = {
0164         .bus_num = -1,
0165         .setup = mfld_setup,
0166         .get_clk_rate_khz = mfld_get_clk_rate_khz,
0167     },
0168     [merrifield] = {
0169         .bus_num = -1,
0170         .scl_sda_cfg = &mrfld_config,
0171         .setup = mrfld_setup,
0172     },
0173     [baytrail] = {
0174         .bus_num = -1,
0175         .scl_sda_cfg = &byt_config,
0176     },
0177     [haswell] = {
0178         .bus_num = -1,
0179         .scl_sda_cfg = &hsw_config,
0180     },
0181     [cherrytrail] = {
0182         .bus_num = -1,
0183         .scl_sda_cfg = &byt_config,
0184     },
0185     [elkhartlake] = {
0186         .bus_num = -1,
0187         .get_clk_rate_khz = ehl_get_clk_rate_khz,
0188     },
0189     [navi_amd] = {
0190         .bus_num = -1,
0191         .scl_sda_cfg = &navi_amd_config,
0192         .setup =  navi_amd_setup,
0193         .get_clk_rate_khz = navi_amd_get_clk_rate_khz,
0194     },
0195 };
0196 
0197 static int __maybe_unused i2c_dw_pci_runtime_suspend(struct device *dev)
0198 {
0199     struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
0200 
0201     i_dev->disable(i_dev);
0202     return 0;
0203 }
0204 
0205 static int __maybe_unused i2c_dw_pci_suspend(struct device *dev)
0206 {
0207     struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
0208 
0209     i2c_mark_adapter_suspended(&i_dev->adapter);
0210 
0211     return i2c_dw_pci_runtime_suspend(dev);
0212 }
0213 
0214 static int __maybe_unused i2c_dw_pci_runtime_resume(struct device *dev)
0215 {
0216     struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
0217 
0218     return i_dev->init(i_dev);
0219 }
0220 
0221 static int __maybe_unused i2c_dw_pci_resume(struct device *dev)
0222 {
0223     struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
0224     int ret;
0225 
0226     ret = i2c_dw_pci_runtime_resume(dev);
0227 
0228     i2c_mark_adapter_resumed(&i_dev->adapter);
0229 
0230     return ret;
0231 }
0232 
0233 static const struct dev_pm_ops i2c_dw_pm_ops = {
0234     SET_SYSTEM_SLEEP_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume)
0235     SET_RUNTIME_PM_OPS(i2c_dw_pci_runtime_suspend, i2c_dw_pci_runtime_resume, NULL)
0236 };
0237 
0238 static int i2c_dw_pci_probe(struct pci_dev *pdev,
0239                 const struct pci_device_id *id)
0240 {
0241     struct dw_i2c_dev *dev;
0242     struct i2c_adapter *adap;
0243     int r;
0244     struct dw_pci_controller *controller;
0245     struct dw_scl_sda_cfg *cfg;
0246 
0247     if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers))
0248         return dev_err_probe(&pdev->dev, -EINVAL,
0249                      "Invalid driver data %ld\n",
0250                      id->driver_data);
0251 
0252     controller = &dw_pci_controllers[id->driver_data];
0253 
0254     r = pcim_enable_device(pdev);
0255     if (r)
0256         return dev_err_probe(&pdev->dev, r,
0257                      "Failed to enable I2C PCI device\n");
0258 
0259     pci_set_master(pdev);
0260 
0261     r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
0262     if (r)
0263         return dev_err_probe(&pdev->dev, r,
0264                      "I/O memory remapping failed\n");
0265 
0266     dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
0267     if (!dev)
0268         return -ENOMEM;
0269 
0270     r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
0271     if (r < 0)
0272         return r;
0273 
0274     dev->get_clk_rate_khz = controller->get_clk_rate_khz;
0275     dev->timings.bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
0276     dev->base = pcim_iomap_table(pdev)[0];
0277     dev->dev = &pdev->dev;
0278     dev->irq = pci_irq_vector(pdev, 0);
0279     dev->flags |= controller->flags;
0280 
0281     pci_set_drvdata(pdev, dev);
0282 
0283     if (controller->setup) {
0284         r = controller->setup(pdev, controller);
0285         if (r) {
0286             pci_free_irq_vectors(pdev);
0287             return r;
0288         }
0289     }
0290 
0291     i2c_dw_adjust_bus_speed(dev);
0292 
0293     if (has_acpi_companion(&pdev->dev))
0294         i2c_dw_acpi_configure(&pdev->dev);
0295 
0296     r = i2c_dw_validate_speed(dev);
0297     if (r) {
0298         pci_free_irq_vectors(pdev);
0299         return r;
0300     }
0301 
0302     i2c_dw_configure(dev);
0303 
0304     if (controller->scl_sda_cfg) {
0305         cfg = controller->scl_sda_cfg;
0306         dev->ss_hcnt = cfg->ss_hcnt;
0307         dev->fs_hcnt = cfg->fs_hcnt;
0308         dev->ss_lcnt = cfg->ss_lcnt;
0309         dev->fs_lcnt = cfg->fs_lcnt;
0310         dev->sda_hold_time = cfg->sda_hold;
0311     }
0312 
0313     adap = &dev->adapter;
0314     adap->owner = THIS_MODULE;
0315     adap->class = 0;
0316     ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
0317     adap->nr = controller->bus_num;
0318 
0319     r = i2c_dw_probe(dev);
0320     if (r) {
0321         pci_free_irq_vectors(pdev);
0322         return r;
0323     }
0324 
0325     if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) {
0326         dev->slave = i2c_new_ccgx_ucsi(&dev->adapter, dev->irq, NULL);
0327         if (IS_ERR(dev->slave))
0328             return dev_err_probe(dev->dev, PTR_ERR(dev->slave),
0329                          "register UCSI failed\n");
0330     }
0331 
0332     pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
0333     pm_runtime_use_autosuspend(&pdev->dev);
0334     pm_runtime_put_autosuspend(&pdev->dev);
0335     pm_runtime_allow(&pdev->dev);
0336 
0337     return 0;
0338 }
0339 
0340 static void i2c_dw_pci_remove(struct pci_dev *pdev)
0341 {
0342     struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
0343 
0344     dev->disable(dev);
0345     pm_runtime_forbid(&pdev->dev);
0346     pm_runtime_get_noresume(&pdev->dev);
0347 
0348     i2c_del_adapter(&dev->adapter);
0349     devm_free_irq(&pdev->dev, dev->irq, dev);
0350     pci_free_irq_vectors(pdev);
0351 }
0352 
0353 static const struct pci_device_id i2_designware_pci_ids[] = {
0354     /* Medfield */
0355     { PCI_VDEVICE(INTEL, 0x0817), medfield },
0356     { PCI_VDEVICE(INTEL, 0x0818), medfield },
0357     { PCI_VDEVICE(INTEL, 0x0819), medfield },
0358     { PCI_VDEVICE(INTEL, 0x082C), medfield },
0359     { PCI_VDEVICE(INTEL, 0x082D), medfield },
0360     { PCI_VDEVICE(INTEL, 0x082E), medfield },
0361     /* Merrifield */
0362     { PCI_VDEVICE(INTEL, 0x1195), merrifield },
0363     { PCI_VDEVICE(INTEL, 0x1196), merrifield },
0364     /* Baytrail */
0365     { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
0366     { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
0367     { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
0368     { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
0369     { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
0370     { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
0371     { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
0372     /* Haswell */
0373     { PCI_VDEVICE(INTEL, 0x9c61), haswell },
0374     { PCI_VDEVICE(INTEL, 0x9c62), haswell },
0375     /* Braswell / Cherrytrail */
0376     { PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
0377     { PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
0378     { PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
0379     { PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
0380     { PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
0381     { PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
0382     { PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
0383     /* Elkhart Lake (PSE I2C) */
0384     { PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
0385     { PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
0386     { PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
0387     { PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
0388     { PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
0389     { PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
0390     { PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
0391     { PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
0392     { PCI_VDEVICE(ATI,  0x7314), navi_amd },
0393     { PCI_VDEVICE(ATI,  0x73a4), navi_amd },
0394     { PCI_VDEVICE(ATI,  0x73e4), navi_amd },
0395     { PCI_VDEVICE(ATI,  0x73c4), navi_amd },
0396     { 0,}
0397 };
0398 MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
0399 
0400 static struct pci_driver dw_i2c_driver = {
0401     .name       = DRIVER_NAME,
0402     .id_table   = i2_designware_pci_ids,
0403     .probe      = i2c_dw_pci_probe,
0404     .remove     = i2c_dw_pci_remove,
0405     .driver         = {
0406         .pm     = &i2c_dw_pm_ops,
0407     },
0408 };
0409 module_pci_driver(dw_i2c_driver);
0410 
0411 /* Work with hotplug and coldplug */
0412 MODULE_ALIAS("i2c_designware-pci");
0413 MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
0414 MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
0415 MODULE_LICENSE("GPL");
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