i2c/busses/i2c-amd756.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003     Copyright (c) 1999-2002 Merlin Hughes <merlin@merlin.org>
0004
0005     Shamelessly ripped from i2c-piix4.c:
0006
0007     Copyright (c) 1998, 1999  Frodo Looijaard <frodol@dds.nl> and
0008     Philip Edelbrock <phil@netroedge.com>
0009
0010 */
0011
0012 /*
0013     2002-04-08: Added nForce support. (Csaba Halasz)
0014     2002-10-03: Fixed nForce PnP I/O port. (Michael Steil)
0015     2002-12-28: Rewritten into something that resembles a Linux driver (hch)
0016     2003-11-29: Added back AMD8111 removed by the previous rewrite.
0017                 (Philip Pokorny)
0018 */
0019
0020 /*
0021    Supports AMD756, AMD766, AMD768, AMD8111 and nVidia nForce
0022    Note: we assume there can only be one device, with one SMBus interface.
0023 */
0024
0025 #include <linux/module.h>
0026 #include <linux/pci.h>
0027 #include <linux/kernel.h>
0028 #include <linux/delay.h>
0029 #include <linux/stddef.h>
0030 #include <linux/ioport.h>
0031 #include <linux/i2c.h>
0032 #include <linux/acpi.h>
0033 #include <linux/io.h>
0034
0035 /* AMD756 SMBus address offsets */
0036 #define SMB_ADDR_OFFSET     0xE0
0037 #define SMB_IOSIZE      16
0038 #define SMB_GLOBAL_STATUS   (0x0 + amd756_ioport)
0039 #define SMB_GLOBAL_ENABLE   (0x2 + amd756_ioport)
0040 #define SMB_HOST_ADDRESS    (0x4 + amd756_ioport)
0041 #define SMB_HOST_DATA       (0x6 + amd756_ioport)
0042 #define SMB_HOST_COMMAND    (0x8 + amd756_ioport)
0043 #define SMB_HOST_BLOCK_DATA (0x9 + amd756_ioport)
0044 #define SMB_HAS_DATA        (0xA + amd756_ioport)
0045 #define SMB_HAS_DEVICE_ADDRESS  (0xC + amd756_ioport)
0046 #define SMB_HAS_HOST_ADDRESS    (0xE + amd756_ioport)
0047 #define SMB_SNOOP_ADDRESS   (0xF + amd756_ioport)
0048
0049 /* PCI Address Constants */
0050
0051 /* address of I/O space */
0052 #define SMBBA       0x058       /* mh */
0053 #define SMBBANFORCE 0x014
0054
0055 /* general configuration */
0056 #define SMBGCFG     0x041       /* mh */
0057
0058 /* silicon revision code */
0059 #define SMBREV      0x008
0060
0061 /* Other settings */
0062 #define MAX_TIMEOUT 500
0063
0064 /* AMD756 constants */
0065 #define AMD756_QUICK        0x00
0066 #define AMD756_BYTE     0x01
0067 #define AMD756_BYTE_DATA    0x02
0068 #define AMD756_WORD_DATA    0x03
0069 #define AMD756_PROCESS_CALL 0x04
0070 #define AMD756_BLOCK_DATA   0x05
0071
0072 static struct pci_driver amd756_driver;
0073 static unsigned short amd756_ioport;
0074
0075 /*
0076   SMBUS event = I/O 28-29 bit 11
0077      see E0 for the status bits and enabled in E2
0078
0079 */
0080 #define GS_ABRT_STS (1 << 0)
0081 #define GS_COL_STS  (1 << 1)
0082 #define GS_PRERR_STS    (1 << 2)
0083 #define GS_HST_STS  (1 << 3)
0084 #define GS_HCYC_STS (1 << 4)
0085 #define GS_TO_STS   (1 << 5)
0086 #define GS_SMB_STS  (1 << 11)
0087
0088 #define GS_CLEAR_STS    (GS_ABRT_STS | GS_COL_STS | GS_PRERR_STS | \
0089              GS_HCYC_STS | GS_TO_STS )
0090
0091 #define GE_CYC_TYPE_MASK    (7)
0092 #define GE_HOST_STC     (1 << 3)
0093 #define GE_ABORT        (1 << 5)
0094
0095
0096 static int amd756_transaction(struct i2c_adapter *adap)
0097 {
0098     int temp;
0099     int result = 0;
0100     int timeout = 0;
0101
0102     dev_dbg(&adap->dev, "Transaction (pre): GS=%04x, GE=%04x, ADD=%04x, "
0103         "DAT=%04x\n", inw_p(SMB_GLOBAL_STATUS),
0104         inw_p(SMB_GLOBAL_ENABLE), inw_p(SMB_HOST_ADDRESS),
0105         inb_p(SMB_HOST_DATA));
0106
0107     /* Make sure the SMBus host is ready to start transmitting */
0108     if ((temp = inw_p(SMB_GLOBAL_STATUS)) & (GS_HST_STS | GS_SMB_STS)) {
0109         dev_dbg(&adap->dev, "SMBus busy (%04x). Waiting...\n", temp);
0110         do {
0111             msleep(1);
0112             temp = inw_p(SMB_GLOBAL_STATUS);
0113         } while ((temp & (GS_HST_STS | GS_SMB_STS)) &&
0114                  (timeout++ < MAX_TIMEOUT));
0115         /* If the SMBus is still busy, we give up */
0116         if (timeout > MAX_TIMEOUT) {
0117             dev_dbg(&adap->dev, "Busy wait timeout (%04x)\n", temp);
0118             goto abort;
0119         }
0120         timeout = 0;
0121     }
0122
0123     /* start the transaction by setting the start bit */
0124     outw_p(inw(SMB_GLOBAL_ENABLE) | GE_HOST_STC, SMB_GLOBAL_ENABLE);
0125
0126     /* We will always wait for a fraction of a second! */
0127     do {
0128         msleep(1);
0129         temp = inw_p(SMB_GLOBAL_STATUS);
0130     } while ((temp & GS_HST_STS) && (timeout++ < MAX_TIMEOUT));
0131
0132     /* If the SMBus is still busy, we give up */
0133     if (timeout > MAX_TIMEOUT) {
0134         dev_dbg(&adap->dev, "Completion timeout!\n");
0135         goto abort;
0136     }
0137
0138     if (temp & GS_PRERR_STS) {
0139         result = -ENXIO;
0140         dev_dbg(&adap->dev, "SMBus Protocol error (no response)!\n");
0141     }
0142
0143     if (temp & GS_COL_STS) {
0144         result = -EIO;
0145         dev_warn(&adap->dev, "SMBus collision!\n");
0146     }
0147
0148     if (temp & GS_TO_STS) {
0149         result = -ETIMEDOUT;
0150         dev_dbg(&adap->dev, "SMBus protocol timeout!\n");
0151     }
0152
0153     if (temp & GS_HCYC_STS)
0154         dev_dbg(&adap->dev, "SMBus protocol success!\n");
0155
0156     outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
0157
0158 #ifdef DEBUG
0159     if (((temp = inw_p(SMB_GLOBAL_STATUS)) & GS_CLEAR_STS) != 0x00) {
0160         dev_dbg(&adap->dev,
0161             "Failed reset at end of transaction (%04x)\n", temp);
0162     }
0163 #endif
0164
0165     dev_dbg(&adap->dev,
0166         "Transaction (post): GS=%04x, GE=%04x, ADD=%04x, DAT=%04x\n",
0167         inw_p(SMB_GLOBAL_STATUS), inw_p(SMB_GLOBAL_ENABLE),
0168         inw_p(SMB_HOST_ADDRESS), inb_p(SMB_HOST_DATA));
0169
0170     return result;
0171
0172  abort:
0173     dev_warn(&adap->dev, "Sending abort\n");
0174     outw_p(inw(SMB_GLOBAL_ENABLE) | GE_ABORT, SMB_GLOBAL_ENABLE);
0175     msleep(100);
0176     outw_p(GS_CLEAR_STS, SMB_GLOBAL_STATUS);
0177     return -EIO;
0178 }
0179
0180 /* Return negative errno on error. */
0181 static s32 amd756_access(struct i2c_adapter * adap, u16 addr,
0182           unsigned short flags, char read_write,
0183           u8 command, int size, union i2c_smbus_data * data)
0184 {
0185     int i, len;
0186     int status;
0187
0188     switch (size) {
0189     case I2C_SMBUS_QUICK:
0190         outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
0191                SMB_HOST_ADDRESS);
0192         size = AMD756_QUICK;
0193         break;
0194     case I2C_SMBUS_BYTE:
0195         outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
0196                SMB_HOST_ADDRESS);
0197         if (read_write == I2C_SMBUS_WRITE)
0198             outb_p(command, SMB_HOST_DATA);
0199         size = AMD756_BYTE;
0200         break;
0201     case I2C_SMBUS_BYTE_DATA:
0202         outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
0203                SMB_HOST_ADDRESS);
0204         outb_p(command, SMB_HOST_COMMAND);
0205         if (read_write == I2C_SMBUS_WRITE)
0206             outw_p(data->byte, SMB_HOST_DATA);
0207         size = AMD756_BYTE_DATA;
0208         break;
0209     case I2C_SMBUS_WORD_DATA:
0210         outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
0211                SMB_HOST_ADDRESS);
0212         outb_p(command, SMB_HOST_COMMAND);
0213         if (read_write == I2C_SMBUS_WRITE)
0214             outw_p(data->word, SMB_HOST_DATA);  /* TODO: endian???? */
0215         size = AMD756_WORD_DATA;
0216         break;
0217     case I2C_SMBUS_BLOCK_DATA:
0218         outw_p(((addr & 0x7f) << 1) | (read_write & 0x01),
0219                SMB_HOST_ADDRESS);
0220         outb_p(command, SMB_HOST_COMMAND);
0221         if (read_write == I2C_SMBUS_WRITE) {
0222             len = data->block[0];
0223             if (len < 0)
0224                 len = 0;
0225             if (len > 32)
0226                 len = 32;
0227             outw_p(len, SMB_HOST_DATA);
0228             /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
0229             for (i = 1; i <= len; i++)
0230                 outb_p(data->block[i],
0231                        SMB_HOST_BLOCK_DATA);
0232         }
0233         size = AMD756_BLOCK_DATA;
0234         break;
0235     default:
0236         dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
0237         return -EOPNOTSUPP;
0238     }
0239
0240     /* How about enabling interrupts... */
0241     outw_p(size & GE_CYC_TYPE_MASK, SMB_GLOBAL_ENABLE);
0242
0243     status = amd756_transaction(adap);
0244     if (status)
0245         return status;
0246
0247     if ((read_write == I2C_SMBUS_WRITE) || (size == AMD756_QUICK))
0248         return 0;
0249
0250
0251     switch (size) {
0252     case AMD756_BYTE:
0253         data->byte = inw_p(SMB_HOST_DATA);
0254         break;
0255     case AMD756_BYTE_DATA:
0256         data->byte = inw_p(SMB_HOST_DATA);
0257         break;
0258     case AMD756_WORD_DATA:
0259         data->word = inw_p(SMB_HOST_DATA);  /* TODO: endian???? */
0260         break;
0261     case AMD756_BLOCK_DATA:
0262         data->block[0] = inw_p(SMB_HOST_DATA) & 0x3f;
0263         if(data->block[0] > 32)
0264             data->block[0] = 32;
0265         /* i = inw_p(SMBHSTCNT); Reset SMBBLKDAT */
0266         for (i = 1; i <= data->block[0]; i++)
0267             data->block[i] = inb_p(SMB_HOST_BLOCK_DATA);
0268         break;
0269     }
0270
0271     return 0;
0272 }
0273
0274 static u32 amd756_func(struct i2c_adapter *adapter)
0275 {
0276     return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
0277         I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
0278         I2C_FUNC_SMBUS_BLOCK_DATA;
0279 }
0280
0281 static const struct i2c_algorithm smbus_algorithm = {
0282     .smbus_xfer = amd756_access,
0283     .functionality  = amd756_func,
0284 };
0285
0286 struct i2c_adapter amd756_smbus = {
0287     .owner      = THIS_MODULE,
0288     .class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
0289     .algo       = &smbus_algorithm,
0290 };
0291
0292 enum chiptype { AMD756, AMD766, AMD768, NFORCE, AMD8111 };
0293 static const char* chipname[] = {
0294     "AMD756", "AMD766", "AMD768",
0295     "nVidia nForce", "AMD8111",
0296 };
0297
0298 static const struct pci_device_id amd756_ids[] = {
0299     { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_740B),
0300       .driver_data = AMD756 },
0301     { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7413),
0302       .driver_data = AMD766 },
0303     { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_OPUS_7443),
0304       .driver_data = AMD768 },
0305     { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS),
0306       .driver_data = AMD8111 },
0307     { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_SMBUS),
0308       .driver_data = NFORCE },
0309     { 0, }
0310 };
0311
0312 MODULE_DEVICE_TABLE (pci, amd756_ids);
0313
0314 static int amd756_probe(struct pci_dev *pdev, const struct pci_device_id *id)
0315 {
0316     int nforce = (id->driver_data == NFORCE);
0317     int error;
0318     u8 temp;
0319
0320     if (amd756_ioport) {
0321         dev_err(&pdev->dev, "Only one device supported "
0322                "(you have a strange motherboard, btw)\n");
0323         return -ENODEV;
0324     }
0325
0326     if (nforce) {
0327         if (PCI_FUNC(pdev->devfn) != 1)
0328             return -ENODEV;
0329
0330         pci_read_config_word(pdev, SMBBANFORCE, &amd756_ioport);
0331         amd756_ioport &= 0xfffc;
0332     } else { /* amd */
0333         if (PCI_FUNC(pdev->devfn) != 3)
0334             return -ENODEV;
0335
0336         pci_read_config_byte(pdev, SMBGCFG, &temp);
0337         if ((temp & 128) == 0) {
0338             dev_err(&pdev->dev,
0339                 "Error: SMBus controller I/O not enabled!\n");
0340             return -ENODEV;
0341         }
0342
0343         /* Determine the address of the SMBus areas */
0344         /* Technically it is a dword but... */
0345         pci_read_config_word(pdev, SMBBA, &amd756_ioport);
0346         amd756_ioport &= 0xff00;
0347         amd756_ioport += SMB_ADDR_OFFSET;
0348     }
0349
0350     error = acpi_check_region(amd756_ioport, SMB_IOSIZE,
0351                   amd756_driver.name);
0352     if (error)
0353         return -ENODEV;
0354
0355     if (!request_region(amd756_ioport, SMB_IOSIZE, amd756_driver.name)) {
0356         dev_err(&pdev->dev, "SMB region 0x%x already in use!\n",
0357             amd756_ioport);
0358         return -ENODEV;
0359     }
0360
0361     pci_read_config_byte(pdev, SMBREV, &temp);
0362     dev_dbg(&pdev->dev, "SMBREV = 0x%X\n", temp);
0363     dev_dbg(&pdev->dev, "AMD756_smba = 0x%X\n", amd756_ioport);
0364
0365     /* set up the sysfs linkage to our parent device */
0366     amd756_smbus.dev.parent = &pdev->dev;
0367
0368     snprintf(amd756_smbus.name, sizeof(amd756_smbus.name),
0369          "SMBus %s adapter at %04x", chipname[id->driver_data],
0370          amd756_ioport);
0371
0372     error = i2c_add_adapter(&amd756_smbus);
0373     if (error)
0374         goto out_err;
0375
0376     return 0;
0377
0378  out_err:
0379     release_region(amd756_ioport, SMB_IOSIZE);
0380     return error;
0381 }
0382
0383 static void amd756_remove(struct pci_dev *dev)
0384 {
0385     i2c_del_adapter(&amd756_smbus);
0386     release_region(amd756_ioport, SMB_IOSIZE);
0387 }
0388
0389 static struct pci_driver amd756_driver = {
0390     .name       = "amd756_smbus",
0391     .id_table   = amd756_ids,
0392     .probe      = amd756_probe,
0393     .remove     = amd756_remove,
0394 };
0395
0396 module_pci_driver(amd756_driver);
0397
0398 MODULE_AUTHOR("Merlin Hughes <merlin@merlin.org>");
0399 MODULE_DESCRIPTION("AMD756/766/768/8111 and nVidia nForce SMBus driver");
0400 MODULE_LICENSE("GPL");
0401
0402 EXPORT_SYMBOL(amd756_smbus);