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0001 // SPDX-License-Identifier: GPL-2.0+
0002 /*
0003  * i2c-algo-bit.c: i2c driver algorithms for bit-shift adapters
0004  *
0005  *   Copyright (C) 1995-2000 Simon G. Vogl
0006  *
0007  * With some changes from Frodo Looijaard <frodol@dds.nl>, Kyösti Mälkki
0008  * <kmalkki@cc.hut.fi> and Jean Delvare <jdelvare@suse.de>
0009  */
0010 
0011 #include <linux/kernel.h>
0012 #include <linux/module.h>
0013 #include <linux/delay.h>
0014 #include <linux/errno.h>
0015 #include <linux/sched.h>
0016 #include <linux/i2c.h>
0017 #include <linux/i2c-algo-bit.h>
0018 
0019 
0020 /* ----- global defines ----------------------------------------------- */
0021 
0022 #ifdef DEBUG
0023 #define bit_dbg(level, dev, format, args...) \
0024     do { \
0025         if (i2c_debug >= level) \
0026             dev_dbg(dev, format, ##args); \
0027     } while (0)
0028 #else
0029 #define bit_dbg(level, dev, format, args...) \
0030     do {} while (0)
0031 #endif /* DEBUG */
0032 
0033 /* ----- global variables --------------------------------------------- */
0034 
0035 static int bit_test;    /* see if the line-setting functions work   */
0036 module_param(bit_test, int, S_IRUGO);
0037 MODULE_PARM_DESC(bit_test, "lines testing - 0 off; 1 report; 2 fail if stuck");
0038 
0039 #ifdef DEBUG
0040 static int i2c_debug = 1;
0041 module_param(i2c_debug, int, S_IRUGO | S_IWUSR);
0042 MODULE_PARM_DESC(i2c_debug,
0043          "debug level - 0 off; 1 normal; 2 verbose; 3 very verbose");
0044 #endif
0045 
0046 /* --- setting states on the bus with the right timing: --------------- */
0047 
0048 #define setsda(adap, val)   adap->setsda(adap->data, val)
0049 #define setscl(adap, val)   adap->setscl(adap->data, val)
0050 #define getsda(adap)        adap->getsda(adap->data)
0051 #define getscl(adap)        adap->getscl(adap->data)
0052 
0053 static inline void sdalo(struct i2c_algo_bit_data *adap)
0054 {
0055     setsda(adap, 0);
0056     udelay((adap->udelay + 1) / 2);
0057 }
0058 
0059 static inline void sdahi(struct i2c_algo_bit_data *adap)
0060 {
0061     setsda(adap, 1);
0062     udelay((adap->udelay + 1) / 2);
0063 }
0064 
0065 static inline void scllo(struct i2c_algo_bit_data *adap)
0066 {
0067     setscl(adap, 0);
0068     udelay(adap->udelay / 2);
0069 }
0070 
0071 /*
0072  * Raise scl line, and do checking for delays. This is necessary for slower
0073  * devices.
0074  */
0075 static int sclhi(struct i2c_algo_bit_data *adap)
0076 {
0077     unsigned long start;
0078 
0079     setscl(adap, 1);
0080 
0081     /* Not all adapters have scl sense line... */
0082     if (!adap->getscl)
0083         goto done;
0084 
0085     start = jiffies;
0086     while (!getscl(adap)) {
0087         /* This hw knows how to read the clock line, so we wait
0088          * until it actually gets high.  This is safer as some
0089          * chips may hold it low ("clock stretching") while they
0090          * are processing data internally.
0091          */
0092         if (time_after(jiffies, start + adap->timeout)) {
0093             /* Test one last time, as we may have been preempted
0094              * between last check and timeout test.
0095              */
0096             if (getscl(adap))
0097                 break;
0098             return -ETIMEDOUT;
0099         }
0100         cpu_relax();
0101     }
0102 #ifdef DEBUG
0103     if (jiffies != start && i2c_debug >= 3)
0104         pr_debug("i2c-algo-bit: needed %ld jiffies for SCL to go high\n",
0105              jiffies - start);
0106 #endif
0107 
0108 done:
0109     udelay(adap->udelay);
0110     return 0;
0111 }
0112 
0113 
0114 /* --- other auxiliary functions -------------------------------------- */
0115 static void i2c_start(struct i2c_algo_bit_data *adap)
0116 {
0117     /* assert: scl, sda are high */
0118     setsda(adap, 0);
0119     udelay(adap->udelay);
0120     scllo(adap);
0121 }
0122 
0123 static void i2c_repstart(struct i2c_algo_bit_data *adap)
0124 {
0125     /* assert: scl is low */
0126     sdahi(adap);
0127     sclhi(adap);
0128     setsda(adap, 0);
0129     udelay(adap->udelay);
0130     scllo(adap);
0131 }
0132 
0133 
0134 static void i2c_stop(struct i2c_algo_bit_data *adap)
0135 {
0136     /* assert: scl is low */
0137     sdalo(adap);
0138     sclhi(adap);
0139     setsda(adap, 1);
0140     udelay(adap->udelay);
0141 }
0142 
0143 
0144 
0145 /* send a byte without start cond., look for arbitration,
0146    check ackn. from slave */
0147 /* returns:
0148  * 1 if the device acknowledged
0149  * 0 if the device did not ack
0150  * -ETIMEDOUT if an error occurred (while raising the scl line)
0151  */
0152 static int i2c_outb(struct i2c_adapter *i2c_adap, unsigned char c)
0153 {
0154     int i;
0155     int sb;
0156     int ack;
0157     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0158 
0159     /* assert: scl is low */
0160     for (i = 7; i >= 0; i--) {
0161         sb = (c >> i) & 1;
0162         setsda(adap, sb);
0163         udelay((adap->udelay + 1) / 2);
0164         if (sclhi(adap) < 0) { /* timed out */
0165             bit_dbg(1, &i2c_adap->dev,
0166                 "i2c_outb: 0x%02x, timeout at bit #%d\n",
0167                 (int)c, i);
0168             return -ETIMEDOUT;
0169         }
0170         /* FIXME do arbitration here:
0171          * if (sb && !getsda(adap)) -> ouch! Get out of here.
0172          *
0173          * Report a unique code, so higher level code can retry
0174          * the whole (combined) message and *NOT* issue STOP.
0175          */
0176         scllo(adap);
0177     }
0178     sdahi(adap);
0179     if (sclhi(adap) < 0) { /* timeout */
0180         bit_dbg(1, &i2c_adap->dev,
0181             "i2c_outb: 0x%02x, timeout at ack\n", (int)c);
0182         return -ETIMEDOUT;
0183     }
0184 
0185     /* read ack: SDA should be pulled down by slave, or it may
0186      * NAK (usually to report problems with the data we wrote).
0187      */
0188     ack = !getsda(adap);    /* ack: sda is pulled low -> success */
0189     bit_dbg(2, &i2c_adap->dev, "i2c_outb: 0x%02x %s\n", (int)c,
0190         ack ? "A" : "NA");
0191 
0192     scllo(adap);
0193     return ack;
0194     /* assert: scl is low (sda undef) */
0195 }
0196 
0197 
0198 static int i2c_inb(struct i2c_adapter *i2c_adap)
0199 {
0200     /* read byte via i2c port, without start/stop sequence  */
0201     /* acknowledge is sent in i2c_read.         */
0202     int i;
0203     unsigned char indata = 0;
0204     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0205 
0206     /* assert: scl is low */
0207     sdahi(adap);
0208     for (i = 0; i < 8; i++) {
0209         if (sclhi(adap) < 0) { /* timeout */
0210             bit_dbg(1, &i2c_adap->dev,
0211                 "i2c_inb: timeout at bit #%d\n",
0212                 7 - i);
0213             return -ETIMEDOUT;
0214         }
0215         indata *= 2;
0216         if (getsda(adap))
0217             indata |= 0x01;
0218         setscl(adap, 0);
0219         udelay(i == 7 ? adap->udelay / 2 : adap->udelay);
0220     }
0221     /* assert: scl is low */
0222     return indata;
0223 }
0224 
0225 /*
0226  * Sanity check for the adapter hardware - check the reaction of
0227  * the bus lines only if it seems to be idle.
0228  */
0229 static int test_bus(struct i2c_adapter *i2c_adap)
0230 {
0231     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0232     const char *name = i2c_adap->name;
0233     int scl, sda, ret;
0234 
0235     if (adap->pre_xfer) {
0236         ret = adap->pre_xfer(i2c_adap);
0237         if (ret < 0)
0238             return -ENODEV;
0239     }
0240 
0241     if (adap->getscl == NULL)
0242         pr_info("%s: Testing SDA only, SCL is not readable\n", name);
0243 
0244     sda = getsda(adap);
0245     scl = (adap->getscl == NULL) ? 1 : getscl(adap);
0246     if (!scl || !sda) {
0247         printk(KERN_WARNING
0248                "%s: bus seems to be busy (scl=%d, sda=%d)\n",
0249                name, scl, sda);
0250         goto bailout;
0251     }
0252 
0253     sdalo(adap);
0254     sda = getsda(adap);
0255     scl = (adap->getscl == NULL) ? 1 : getscl(adap);
0256     if (sda) {
0257         printk(KERN_WARNING "%s: SDA stuck high!\n", name);
0258         goto bailout;
0259     }
0260     if (!scl) {
0261         printk(KERN_WARNING
0262                "%s: SCL unexpected low while pulling SDA low!\n",
0263                name);
0264         goto bailout;
0265     }
0266 
0267     sdahi(adap);
0268     sda = getsda(adap);
0269     scl = (adap->getscl == NULL) ? 1 : getscl(adap);
0270     if (!sda) {
0271         printk(KERN_WARNING "%s: SDA stuck low!\n", name);
0272         goto bailout;
0273     }
0274     if (!scl) {
0275         printk(KERN_WARNING
0276                "%s: SCL unexpected low while pulling SDA high!\n",
0277                name);
0278         goto bailout;
0279     }
0280 
0281     scllo(adap);
0282     sda = getsda(adap);
0283     scl = (adap->getscl == NULL) ? 0 : getscl(adap);
0284     if (scl) {
0285         printk(KERN_WARNING "%s: SCL stuck high!\n", name);
0286         goto bailout;
0287     }
0288     if (!sda) {
0289         printk(KERN_WARNING
0290                "%s: SDA unexpected low while pulling SCL low!\n",
0291                name);
0292         goto bailout;
0293     }
0294 
0295     sclhi(adap);
0296     sda = getsda(adap);
0297     scl = (adap->getscl == NULL) ? 1 : getscl(adap);
0298     if (!scl) {
0299         printk(KERN_WARNING "%s: SCL stuck low!\n", name);
0300         goto bailout;
0301     }
0302     if (!sda) {
0303         printk(KERN_WARNING
0304                "%s: SDA unexpected low while pulling SCL high!\n",
0305                name);
0306         goto bailout;
0307     }
0308 
0309     if (adap->post_xfer)
0310         adap->post_xfer(i2c_adap);
0311 
0312     pr_info("%s: Test OK\n", name);
0313     return 0;
0314 bailout:
0315     sdahi(adap);
0316     sclhi(adap);
0317 
0318     if (adap->post_xfer)
0319         adap->post_xfer(i2c_adap);
0320 
0321     return -ENODEV;
0322 }
0323 
0324 /* ----- Utility functions
0325  */
0326 
0327 /* try_address tries to contact a chip for a number of
0328  * times before it gives up.
0329  * return values:
0330  * 1 chip answered
0331  * 0 chip did not answer
0332  * -x transmission error
0333  */
0334 static int try_address(struct i2c_adapter *i2c_adap,
0335                unsigned char addr, int retries)
0336 {
0337     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0338     int i, ret = 0;
0339 
0340     for (i = 0; i <= retries; i++) {
0341         ret = i2c_outb(i2c_adap, addr);
0342         if (ret == 1 || i == retries)
0343             break;
0344         bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
0345         i2c_stop(adap);
0346         udelay(adap->udelay);
0347         yield();
0348         bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
0349         i2c_start(adap);
0350     }
0351     if (i && ret)
0352         bit_dbg(1, &i2c_adap->dev,
0353             "Used %d tries to %s client at 0x%02x: %s\n", i + 1,
0354             addr & 1 ? "read from" : "write to", addr >> 1,
0355             ret == 1 ? "success" : "failed, timeout?");
0356     return ret;
0357 }
0358 
0359 static int sendbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
0360 {
0361     const unsigned char *temp = msg->buf;
0362     int count = msg->len;
0363     unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
0364     int retval;
0365     int wrcount = 0;
0366 
0367     while (count > 0) {
0368         retval = i2c_outb(i2c_adap, *temp);
0369 
0370         /* OK/ACK; or ignored NAK */
0371         if ((retval > 0) || (nak_ok && (retval == 0))) {
0372             count--;
0373             temp++;
0374             wrcount++;
0375 
0376         /* A slave NAKing the master means the slave didn't like
0377          * something about the data it saw.  For example, maybe
0378          * the SMBus PEC was wrong.
0379          */
0380         } else if (retval == 0) {
0381             dev_err(&i2c_adap->dev, "sendbytes: NAK bailout.\n");
0382             return -EIO;
0383 
0384         /* Timeout; or (someday) lost arbitration
0385          *
0386          * FIXME Lost ARB implies retrying the transaction from
0387          * the first message, after the "winning" master issues
0388          * its STOP.  As a rule, upper layer code has no reason
0389          * to know or care about this ... it is *NOT* an error.
0390          */
0391         } else {
0392             dev_err(&i2c_adap->dev, "sendbytes: error %d\n",
0393                     retval);
0394             return retval;
0395         }
0396     }
0397     return wrcount;
0398 }
0399 
0400 static int acknak(struct i2c_adapter *i2c_adap, int is_ack)
0401 {
0402     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0403 
0404     /* assert: sda is high */
0405     if (is_ack)     /* send ack */
0406         setsda(adap, 0);
0407     udelay((adap->udelay + 1) / 2);
0408     if (sclhi(adap) < 0) {  /* timeout */
0409         dev_err(&i2c_adap->dev, "readbytes: ack/nak timeout\n");
0410         return -ETIMEDOUT;
0411     }
0412     scllo(adap);
0413     return 0;
0414 }
0415 
0416 static int readbytes(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
0417 {
0418     int inval;
0419     int rdcount = 0;    /* counts bytes read */
0420     unsigned char *temp = msg->buf;
0421     int count = msg->len;
0422     const unsigned flags = msg->flags;
0423 
0424     while (count > 0) {
0425         inval = i2c_inb(i2c_adap);
0426         if (inval >= 0) {
0427             *temp = inval;
0428             rdcount++;
0429         } else {   /* read timed out */
0430             break;
0431         }
0432 
0433         temp++;
0434         count--;
0435 
0436         /* Some SMBus transactions require that we receive the
0437            transaction length as the first read byte. */
0438         if (rdcount == 1 && (flags & I2C_M_RECV_LEN)) {
0439             if (inval <= 0 || inval > I2C_SMBUS_BLOCK_MAX) {
0440                 if (!(flags & I2C_M_NO_RD_ACK))
0441                     acknak(i2c_adap, 0);
0442                 dev_err(&i2c_adap->dev,
0443                     "readbytes: invalid block length (%d)\n",
0444                     inval);
0445                 return -EPROTO;
0446             }
0447             /* The original count value accounts for the extra
0448                bytes, that is, either 1 for a regular transaction,
0449                or 2 for a PEC transaction. */
0450             count += inval;
0451             msg->len += inval;
0452         }
0453 
0454         bit_dbg(2, &i2c_adap->dev, "readbytes: 0x%02x %s\n",
0455             inval,
0456             (flags & I2C_M_NO_RD_ACK)
0457                 ? "(no ack/nak)"
0458                 : (count ? "A" : "NA"));
0459 
0460         if (!(flags & I2C_M_NO_RD_ACK)) {
0461             inval = acknak(i2c_adap, count);
0462             if (inval < 0)
0463                 return inval;
0464         }
0465     }
0466     return rdcount;
0467 }
0468 
0469 /* doAddress initiates the transfer by generating the start condition (in
0470  * try_address) and transmits the address in the necessary format to handle
0471  * reads, writes as well as 10bit-addresses.
0472  * returns:
0473  *  0 everything went okay, the chip ack'ed, or IGNORE_NAK flag was set
0474  * -x an error occurred (like: -ENXIO if the device did not answer, or
0475  *  -ETIMEDOUT, for example if the lines are stuck...)
0476  */
0477 static int bit_doAddress(struct i2c_adapter *i2c_adap, struct i2c_msg *msg)
0478 {
0479     unsigned short flags = msg->flags;
0480     unsigned short nak_ok = msg->flags & I2C_M_IGNORE_NAK;
0481     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0482 
0483     unsigned char addr;
0484     int ret, retries;
0485 
0486     retries = nak_ok ? 0 : i2c_adap->retries;
0487 
0488     if (flags & I2C_M_TEN) {
0489         /* a ten bit address */
0490         addr = 0xf0 | ((msg->addr >> 7) & 0x06);
0491         bit_dbg(2, &i2c_adap->dev, "addr0: %d\n", addr);
0492         /* try extended address code...*/
0493         ret = try_address(i2c_adap, addr, retries);
0494         if ((ret != 1) && !nak_ok)  {
0495             dev_err(&i2c_adap->dev,
0496                 "died at extended address code\n");
0497             return -ENXIO;
0498         }
0499         /* the remaining 8 bit address */
0500         ret = i2c_outb(i2c_adap, msg->addr & 0xff);
0501         if ((ret != 1) && !nak_ok) {
0502             /* the chip did not ack / xmission error occurred */
0503             dev_err(&i2c_adap->dev, "died at 2nd address code\n");
0504             return -ENXIO;
0505         }
0506         if (flags & I2C_M_RD) {
0507             bit_dbg(3, &i2c_adap->dev,
0508                 "emitting repeated start condition\n");
0509             i2c_repstart(adap);
0510             /* okay, now switch into reading mode */
0511             addr |= 0x01;
0512             ret = try_address(i2c_adap, addr, retries);
0513             if ((ret != 1) && !nak_ok) {
0514                 dev_err(&i2c_adap->dev,
0515                     "died at repeated address code\n");
0516                 return -EIO;
0517             }
0518         }
0519     } else {        /* normal 7bit address  */
0520         addr = i2c_8bit_addr_from_msg(msg);
0521         if (flags & I2C_M_REV_DIR_ADDR)
0522             addr ^= 1;
0523         ret = try_address(i2c_adap, addr, retries);
0524         if ((ret != 1) && !nak_ok)
0525             return -ENXIO;
0526     }
0527 
0528     return 0;
0529 }
0530 
0531 static int bit_xfer(struct i2c_adapter *i2c_adap,
0532             struct i2c_msg msgs[], int num)
0533 {
0534     struct i2c_msg *pmsg;
0535     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0536     int i, ret;
0537     unsigned short nak_ok;
0538 
0539     if (adap->pre_xfer) {
0540         ret = adap->pre_xfer(i2c_adap);
0541         if (ret < 0)
0542             return ret;
0543     }
0544 
0545     bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
0546     i2c_start(adap);
0547     for (i = 0; i < num; i++) {
0548         pmsg = &msgs[i];
0549         nak_ok = pmsg->flags & I2C_M_IGNORE_NAK;
0550         if (!(pmsg->flags & I2C_M_NOSTART)) {
0551             if (i) {
0552                 if (msgs[i - 1].flags & I2C_M_STOP) {
0553                     bit_dbg(3, &i2c_adap->dev,
0554                         "emitting enforced stop/start condition\n");
0555                     i2c_stop(adap);
0556                     i2c_start(adap);
0557                 } else {
0558                     bit_dbg(3, &i2c_adap->dev,
0559                         "emitting repeated start condition\n");
0560                     i2c_repstart(adap);
0561                 }
0562             }
0563             ret = bit_doAddress(i2c_adap, pmsg);
0564             if ((ret != 0) && !nak_ok) {
0565                 bit_dbg(1, &i2c_adap->dev,
0566                     "NAK from device addr 0x%02x msg #%d\n",
0567                     msgs[i].addr, i);
0568                 goto bailout;
0569             }
0570         }
0571         if (pmsg->flags & I2C_M_RD) {
0572             /* read bytes into buffer*/
0573             ret = readbytes(i2c_adap, pmsg);
0574             if (ret >= 1)
0575                 bit_dbg(2, &i2c_adap->dev, "read %d byte%s\n",
0576                     ret, ret == 1 ? "" : "s");
0577             if (ret < pmsg->len) {
0578                 if (ret >= 0)
0579                     ret = -EIO;
0580                 goto bailout;
0581             }
0582         } else {
0583             /* write bytes from buffer */
0584             ret = sendbytes(i2c_adap, pmsg);
0585             if (ret >= 1)
0586                 bit_dbg(2, &i2c_adap->dev, "wrote %d byte%s\n",
0587                     ret, ret == 1 ? "" : "s");
0588             if (ret < pmsg->len) {
0589                 if (ret >= 0)
0590                     ret = -EIO;
0591                 goto bailout;
0592             }
0593         }
0594     }
0595     ret = i;
0596 
0597 bailout:
0598     bit_dbg(3, &i2c_adap->dev, "emitting stop condition\n");
0599     i2c_stop(adap);
0600 
0601     if (adap->post_xfer)
0602         adap->post_xfer(i2c_adap);
0603     return ret;
0604 }
0605 
0606 /*
0607  * We print a warning when we are not flagged to support atomic transfers but
0608  * will try anyhow. That's what the I2C core would do as well. Sadly, we can't
0609  * modify the algorithm struct at probe time because this struct is exported
0610  * 'const'.
0611  */
0612 static int bit_xfer_atomic(struct i2c_adapter *i2c_adap, struct i2c_msg msgs[],
0613                int num)
0614 {
0615     struct i2c_algo_bit_data *adap = i2c_adap->algo_data;
0616 
0617     if (!adap->can_do_atomic)
0618         dev_warn(&i2c_adap->dev, "not flagged for atomic transfers\n");
0619 
0620     return bit_xfer(i2c_adap, msgs, num);
0621 }
0622 
0623 static u32 bit_func(struct i2c_adapter *adap)
0624 {
0625     return I2C_FUNC_I2C | I2C_FUNC_NOSTART | I2C_FUNC_SMBUS_EMUL_ALL |
0626            I2C_FUNC_10BIT_ADDR | I2C_FUNC_PROTOCOL_MANGLING;
0627 }
0628 
0629 
0630 /* -----exported algorithm data: -------------------------------------  */
0631 
0632 const struct i2c_algorithm i2c_bit_algo = {
0633     .master_xfer = bit_xfer,
0634     .master_xfer_atomic = bit_xfer_atomic,
0635     .functionality = bit_func,
0636 };
0637 EXPORT_SYMBOL(i2c_bit_algo);
0638 
0639 static const struct i2c_adapter_quirks i2c_bit_quirk_no_clk_stretch = {
0640     .flags = I2C_AQ_NO_CLK_STRETCH,
0641 };
0642 
0643 /*
0644  * registering functions to load algorithms at runtime
0645  */
0646 static int __i2c_bit_add_bus(struct i2c_adapter *adap,
0647                  int (*add_adapter)(struct i2c_adapter *))
0648 {
0649     struct i2c_algo_bit_data *bit_adap = adap->algo_data;
0650     int ret;
0651 
0652     if (bit_test) {
0653         ret = test_bus(adap);
0654         if (bit_test >= 2 && ret < 0)
0655             return -ENODEV;
0656     }
0657 
0658     /* register new adapter to i2c module... */
0659     adap->algo = &i2c_bit_algo;
0660     adap->retries = 3;
0661     if (bit_adap->getscl == NULL)
0662         adap->quirks = &i2c_bit_quirk_no_clk_stretch;
0663 
0664     /*
0665      * We tried forcing SCL/SDA to an initial state here. But that caused a
0666      * regression, sadly. Check Bugzilla #200045 for details.
0667      */
0668 
0669     ret = add_adapter(adap);
0670     if (ret < 0)
0671         return ret;
0672 
0673     /* Complain if SCL can't be read */
0674     if (bit_adap->getscl == NULL) {
0675         dev_warn(&adap->dev, "Not I2C compliant: can't read SCL\n");
0676         dev_warn(&adap->dev, "Bus may be unreliable\n");
0677     }
0678     return 0;
0679 }
0680 
0681 int i2c_bit_add_bus(struct i2c_adapter *adap)
0682 {
0683     return __i2c_bit_add_bus(adap, i2c_add_adapter);
0684 }
0685 EXPORT_SYMBOL(i2c_bit_add_bus);
0686 
0687 int i2c_bit_add_numbered_bus(struct i2c_adapter *adap)
0688 {
0689     return __i2c_bit_add_bus(adap, i2c_add_numbered_adapter);
0690 }
0691 EXPORT_SYMBOL(i2c_bit_add_numbered_bus);
0692 
0693 MODULE_AUTHOR("Simon G. Vogl <simon@tk.uni-linz.ac.at>");
0694 MODULE_DESCRIPTION("I2C-Bus bit-banging algorithm");
0695 MODULE_LICENSE("GPL");
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