hwtracing/coresight/coresight-priv.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
0004  */
0005
0006 #ifndef _CORESIGHT_PRIV_H
0007 #define _CORESIGHT_PRIV_H
0008
0009 #include <linux/amba/bus.h>
0010 #include <linux/bitops.h>
0011 #include <linux/io.h>
0012 #include <linux/coresight.h>
0013 #include <linux/pm_runtime.h>
0014
0015 /*
0016  * Coresight management registers (0xf00-0xfcc)
0017  * 0xfa0 - 0xfa4: Management    registers in PFTv1.0
0018  *        Trace     registers in PFTv1.1
0019  */
0020 #define CORESIGHT_ITCTRL    0xf00
0021 #define CORESIGHT_CLAIMSET  0xfa0
0022 #define CORESIGHT_CLAIMCLR  0xfa4
0023 #define CORESIGHT_LAR       0xfb0
0024 #define CORESIGHT_LSR       0xfb4
0025 #define CORESIGHT_DEVARCH   0xfbc
0026 #define CORESIGHT_AUTHSTATUS    0xfb8
0027 #define CORESIGHT_DEVID     0xfc8
0028 #define CORESIGHT_DEVTYPE   0xfcc
0029
0030
0031 /*
0032  * Coresight device CLAIM protocol.
0033  * See PSCI - ARM DEN 0022D, Section: 6.8.1 Debug and Trace save and restore.
0034  */
0035 #define CORESIGHT_CLAIM_SELF_HOSTED BIT(1)
0036
0037 #define TIMEOUT_US      100
0038 #define BMVAL(val, lsb, msb)    ((val & GENMASK(msb, lsb)) >> lsb)
0039
0040 #define ETM_MODE_EXCL_KERN  BIT(30)
0041 #define ETM_MODE_EXCL_USER  BIT(31)
0042
0043 typedef u32 (*coresight_read_fn)(const struct device *, u32 offset);
0044 #define __coresight_simple_func(type, func, name, lo_off, hi_off)   \
0045 static ssize_t name##_show(struct device *_dev,             \
0046                struct device_attribute *attr, char *buf)    \
0047 {                                   \
0048     type *drvdata = dev_get_drvdata(_dev->parent);          \
0049     coresight_read_fn fn = func;                    \
0050     u64 val;                            \
0051     pm_runtime_get_sync(_dev->parent);              \
0052     if (fn)                             \
0053         val = (u64)fn(_dev->parent, lo_off);            \
0054     else                                \
0055         val = coresight_read_reg_pair(drvdata->base,        \
0056                          lo_off, hi_off);   \
0057     pm_runtime_put_sync(_dev->parent);              \
0058     return scnprintf(buf, PAGE_SIZE, "0x%llx\n", val);      \
0059 }                                   \
0060 static DEVICE_ATTR_RO(name)
0061
0062 #define coresight_simple_func(type, func, name, offset)         \
0063     __coresight_simple_func(type, func, name, offset, -1)
0064 #define coresight_simple_reg32(type, name, offset)          \
0065     __coresight_simple_func(type, NULL, name, offset, -1)
0066 #define coresight_simple_reg64(type, name, lo_off, hi_off)      \
0067     __coresight_simple_func(type, NULL, name, lo_off, hi_off)
0068
0069 extern const u32 coresight_barrier_pkt[4];
0070 #define CORESIGHT_BARRIER_PKT_SIZE (sizeof(coresight_barrier_pkt))
0071
0072 enum etm_addr_type {
0073     ETM_ADDR_TYPE_NONE,
0074     ETM_ADDR_TYPE_SINGLE,
0075     ETM_ADDR_TYPE_RANGE,
0076     ETM_ADDR_TYPE_START,
0077     ETM_ADDR_TYPE_STOP,
0078 };
0079
0080 enum cs_mode {
0081     CS_MODE_DISABLED,
0082     CS_MODE_SYSFS,
0083     CS_MODE_PERF,
0084 };
0085
0086 /**
0087  * struct cs_buffer - keep track of a recording session' specifics
0088  * @cur:    index of the current buffer
0089  * @nr_pages:   max number of pages granted to us
0090  * @pid:    PID this cs_buffer belongs to
0091  * @offset: offset within the current buffer
0092  * @data_size:  how much we collected in this run
0093  * @snapshot:   is this run in snapshot mode
0094  * @data_pages: a handle the ring buffer
0095  */
0096 struct cs_buffers {
0097     unsigned int        cur;
0098     unsigned int        nr_pages;
0099     pid_t           pid;
0100     unsigned long       offset;
0101     local_t         data_size;
0102     bool            snapshot;
0103     void            **data_pages;
0104 };
0105
0106 static inline void coresight_insert_barrier_packet(void *buf)
0107 {
0108     if (buf)
0109         memcpy(buf, coresight_barrier_pkt, CORESIGHT_BARRIER_PKT_SIZE);
0110 }
0111
0112 static inline void CS_LOCK(void __iomem *addr)
0113 {
0114     do {
0115         /* Wait for things to settle */
0116         mb();
0117         writel_relaxed(0x0, addr + CORESIGHT_LAR);
0118     } while (0);
0119 }
0120
0121 static inline void CS_UNLOCK(void __iomem *addr)
0122 {
0123     do {
0124         writel_relaxed(CORESIGHT_UNLOCK, addr + CORESIGHT_LAR);
0125         /* Make sure everyone has seen this */
0126         mb();
0127     } while (0);
0128 }
0129
0130 static inline u64
0131 coresight_read_reg_pair(void __iomem *addr, s32 lo_offset, s32 hi_offset)
0132 {
0133     u64 val;
0134
0135     val = readl_relaxed(addr + lo_offset);
0136     val |= (hi_offset < 0) ? 0 :
0137            (u64)readl_relaxed(addr + hi_offset) << 32;
0138     return val;
0139 }
0140
0141 static inline void coresight_write_reg_pair(void __iomem *addr, u64 val,
0142                          s32 lo_offset, s32 hi_offset)
0143 {
0144     writel_relaxed((u32)val, addr + lo_offset);
0145     if (hi_offset >= 0)
0146         writel_relaxed((u32)(val >> 32), addr + hi_offset);
0147 }
0148
0149 void coresight_disable_path(struct list_head *path);
0150 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data);
0151 struct coresight_device *coresight_get_sink(struct list_head *path);
0152 struct coresight_device *
0153 coresight_get_enabled_sink(struct coresight_device *source);
0154 struct coresight_device *coresight_get_sink_by_id(u32 id);
0155 struct coresight_device *
0156 coresight_find_default_sink(struct coresight_device *csdev);
0157 struct list_head *coresight_build_path(struct coresight_device *csdev,
0158                        struct coresight_device *sink);
0159 void coresight_release_path(struct list_head *path);
0160 int coresight_add_sysfs_link(struct coresight_sysfs_link *info);
0161 void coresight_remove_sysfs_link(struct coresight_sysfs_link *info);
0162 int coresight_create_conns_sysfs_group(struct coresight_device *csdev);
0163 void coresight_remove_conns_sysfs_group(struct coresight_device *csdev);
0164 int coresight_make_links(struct coresight_device *orig,
0165              struct coresight_connection *conn,
0166              struct coresight_device *target);
0167 void coresight_remove_links(struct coresight_device *orig,
0168                 struct coresight_connection *conn);
0169
0170 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
0171 extern int etm_readl_cp14(u32 off, unsigned int *val);
0172 extern int etm_writel_cp14(u32 off, u32 val);
0173 #else
0174 static inline int etm_readl_cp14(u32 off, unsigned int *val) { return 0; }
0175 static inline int etm_writel_cp14(u32 off, u32 val) { return 0; }
0176 #endif
0177
0178 struct cti_assoc_op {
0179     void (*add)(struct coresight_device *csdev);
0180     void (*remove)(struct coresight_device *csdev);
0181 };
0182
0183 extern void coresight_set_cti_ops(const struct cti_assoc_op *cti_op);
0184 extern void coresight_remove_cti_ops(void);
0185
0186 /*
0187  * Macros and inline functions to handle CoreSight UCI data and driver
0188  * private data in AMBA ID table entries, and extract data values.
0189  */
0190
0191 /* coresight AMBA ID, no UCI, no driver data: id table entry */
0192 #define CS_AMBA_ID(pid)         \
0193     {               \
0194         .id = pid,      \
0195         .mask   = 0x000fffff,   \
0196     }
0197
0198 /* coresight AMBA ID, UCI with driver data only: id table entry. */
0199 #define CS_AMBA_ID_DATA(pid, dval)              \
0200     {                           \
0201         .id = pid,                  \
0202         .mask   = 0x000fffff,               \
0203         .data   =  (void *)&(struct amba_cs_uci_id) \
0204             {               \
0205                 .data = (void *)dval,   \
0206             }               \
0207     }
0208
0209 /* coresight AMBA ID, full UCI structure: id table entry. */
0210 #define CS_AMBA_UCI_ID(pid, uci_ptr)        \
0211     {                   \
0212         .id = pid,          \
0213         .mask   = 0x000fffff,       \
0214         .data   = (void *)uci_ptr   \
0215     }
0216
0217 /* extract the data value from a UCI structure given amba_id pointer. */
0218 static inline void *coresight_get_uci_data(const struct amba_id *id)
0219 {
0220     struct amba_cs_uci_id *uci_id = id->data;
0221
0222     if (!uci_id)
0223         return NULL;
0224
0225     return uci_id->data;
0226 }
0227
0228 void coresight_release_platform_data(struct coresight_device *csdev,
0229                      struct coresight_platform_data *pdata);
0230 struct coresight_device *
0231 coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode);
0232 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
0233                       struct coresight_device *ect_csdev);
0234
0235 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev);
0236 struct coresight_device *coresight_get_percpu_sink(int cpu);
0237
0238 #endif