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0007 #include <linux/pid_namespace.h>
0008 #include <linux/pm_runtime.h>
0009 #include <linux/sysfs.h>
0010 #include "coresight-etm4x.h"
0011 #include "coresight-priv.h"
0012 #include "coresight-syscfg.h"
0013
0014 static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
0015 {
0016 u8 idx;
0017 struct etmv4_config *config = &drvdata->config;
0018
0019 idx = config->addr_idx;
0020
0021
0022
0023
0024
0025 if (FIELD_GET(TRCACATRn_TYPE_MASK, config->addr_acc[idx]) == TRCACATRn_TYPE_ADDR) {
0026 if (idx % 2 != 0)
0027 return -EINVAL;
0028
0029
0030
0031
0032
0033
0034 if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
0035 config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
0036 return -EINVAL;
0037
0038 if (exclude == true) {
0039
0040
0041
0042
0043 config->viiectlr |= BIT(idx / 2 + 16);
0044 config->viiectlr &= ~BIT(idx / 2);
0045 } else {
0046
0047
0048
0049
0050 config->viiectlr |= BIT(idx / 2);
0051 config->viiectlr &= ~BIT(idx / 2 + 16);
0052 }
0053 }
0054 return 0;
0055 }
0056
0057 static ssize_t nr_pe_cmp_show(struct device *dev,
0058 struct device_attribute *attr,
0059 char *buf)
0060 {
0061 unsigned long val;
0062 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0063
0064 val = drvdata->nr_pe_cmp;
0065 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0066 }
0067 static DEVICE_ATTR_RO(nr_pe_cmp);
0068
0069 static ssize_t nr_addr_cmp_show(struct device *dev,
0070 struct device_attribute *attr,
0071 char *buf)
0072 {
0073 unsigned long val;
0074 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0075
0076 val = drvdata->nr_addr_cmp;
0077 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0078 }
0079 static DEVICE_ATTR_RO(nr_addr_cmp);
0080
0081 static ssize_t nr_cntr_show(struct device *dev,
0082 struct device_attribute *attr,
0083 char *buf)
0084 {
0085 unsigned long val;
0086 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0087
0088 val = drvdata->nr_cntr;
0089 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0090 }
0091 static DEVICE_ATTR_RO(nr_cntr);
0092
0093 static ssize_t nr_ext_inp_show(struct device *dev,
0094 struct device_attribute *attr,
0095 char *buf)
0096 {
0097 unsigned long val;
0098 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0099
0100 val = drvdata->nr_ext_inp;
0101 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0102 }
0103 static DEVICE_ATTR_RO(nr_ext_inp);
0104
0105 static ssize_t numcidc_show(struct device *dev,
0106 struct device_attribute *attr,
0107 char *buf)
0108 {
0109 unsigned long val;
0110 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0111
0112 val = drvdata->numcidc;
0113 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0114 }
0115 static DEVICE_ATTR_RO(numcidc);
0116
0117 static ssize_t numvmidc_show(struct device *dev,
0118 struct device_attribute *attr,
0119 char *buf)
0120 {
0121 unsigned long val;
0122 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0123
0124 val = drvdata->numvmidc;
0125 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0126 }
0127 static DEVICE_ATTR_RO(numvmidc);
0128
0129 static ssize_t nrseqstate_show(struct device *dev,
0130 struct device_attribute *attr,
0131 char *buf)
0132 {
0133 unsigned long val;
0134 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0135
0136 val = drvdata->nrseqstate;
0137 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0138 }
0139 static DEVICE_ATTR_RO(nrseqstate);
0140
0141 static ssize_t nr_resource_show(struct device *dev,
0142 struct device_attribute *attr,
0143 char *buf)
0144 {
0145 unsigned long val;
0146 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0147
0148 val = drvdata->nr_resource;
0149 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0150 }
0151 static DEVICE_ATTR_RO(nr_resource);
0152
0153 static ssize_t nr_ss_cmp_show(struct device *dev,
0154 struct device_attribute *attr,
0155 char *buf)
0156 {
0157 unsigned long val;
0158 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0159
0160 val = drvdata->nr_ss_cmp;
0161 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0162 }
0163 static DEVICE_ATTR_RO(nr_ss_cmp);
0164
0165 static ssize_t reset_store(struct device *dev,
0166 struct device_attribute *attr,
0167 const char *buf, size_t size)
0168 {
0169 int i;
0170 unsigned long val;
0171 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0172 struct etmv4_config *config = &drvdata->config;
0173
0174 if (kstrtoul(buf, 16, &val))
0175 return -EINVAL;
0176
0177 spin_lock(&drvdata->spinlock);
0178 if (val)
0179 config->mode = 0x0;
0180
0181
0182 config->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
0183 config->cfg &= ~(TRCCONFIGR_INSTP0_LOAD | TRCCONFIGR_INSTP0_STORE);
0184
0185
0186 config->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
0187 ETM_MODE_DATA_TRACE_VAL);
0188 config->cfg &= ~(TRCCONFIGR_DA | TRCCONFIGR_DV);
0189
0190
0191 config->eventctrl0 = 0x0;
0192 config->eventctrl1 = 0x0;
0193
0194
0195 config->ts_ctrl = 0x0;
0196
0197
0198 config->stall_ctrl = 0x0;
0199
0200
0201 if (drvdata->syncpr == false)
0202 config->syncfreq = 0x8;
0203
0204
0205
0206
0207
0208
0209 config->vinst_ctrl = FIELD_PREP(TRCVICTLR_EVENT_MASK, 0x01);
0210 if (drvdata->nr_addr_cmp > 0) {
0211 config->mode |= ETM_MODE_VIEWINST_STARTSTOP;
0212
0213 config->vinst_ctrl |= TRCVICTLR_SSSTATUS;
0214 }
0215
0216
0217 config->viiectlr = 0x0;
0218
0219
0220 config->vissctlr = 0x0;
0221 config->vipcssctlr = 0x0;
0222
0223
0224 for (i = 0; i < drvdata->nrseqstate-1; i++)
0225 config->seq_ctrl[i] = 0x0;
0226 config->seq_rst = 0x0;
0227 config->seq_state = 0x0;
0228
0229
0230 config->ext_inp = 0x0;
0231
0232 config->cntr_idx = 0x0;
0233 for (i = 0; i < drvdata->nr_cntr; i++) {
0234 config->cntrldvr[i] = 0x0;
0235 config->cntr_ctrl[i] = 0x0;
0236 config->cntr_val[i] = 0x0;
0237 }
0238
0239 config->res_idx = 0x0;
0240 for (i = 2; i < 2 * drvdata->nr_resource; i++)
0241 config->res_ctrl[i] = 0x0;
0242
0243 config->ss_idx = 0x0;
0244 for (i = 0; i < drvdata->nr_ss_cmp; i++) {
0245 config->ss_ctrl[i] = 0x0;
0246 config->ss_pe_cmp[i] = 0x0;
0247 }
0248
0249 config->addr_idx = 0x0;
0250 for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
0251 config->addr_val[i] = 0x0;
0252 config->addr_acc[i] = 0x0;
0253 config->addr_type[i] = ETM_ADDR_TYPE_NONE;
0254 }
0255
0256 config->ctxid_idx = 0x0;
0257 for (i = 0; i < drvdata->numcidc; i++)
0258 config->ctxid_pid[i] = 0x0;
0259
0260 config->ctxid_mask0 = 0x0;
0261 config->ctxid_mask1 = 0x0;
0262
0263 config->vmid_idx = 0x0;
0264 for (i = 0; i < drvdata->numvmidc; i++)
0265 config->vmid_val[i] = 0x0;
0266 config->vmid_mask0 = 0x0;
0267 config->vmid_mask1 = 0x0;
0268
0269 drvdata->trcid = drvdata->cpu + 1;
0270
0271 spin_unlock(&drvdata->spinlock);
0272
0273 cscfg_csdev_reset_feats(to_coresight_device(dev));
0274
0275 return size;
0276 }
0277 static DEVICE_ATTR_WO(reset);
0278
0279 static ssize_t mode_show(struct device *dev,
0280 struct device_attribute *attr,
0281 char *buf)
0282 {
0283 unsigned long val;
0284 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0285 struct etmv4_config *config = &drvdata->config;
0286
0287 val = config->mode;
0288 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0289 }
0290
0291 static ssize_t mode_store(struct device *dev,
0292 struct device_attribute *attr,
0293 const char *buf, size_t size)
0294 {
0295 unsigned long val, mode;
0296 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0297 struct etmv4_config *config = &drvdata->config;
0298
0299 if (kstrtoul(buf, 16, &val))
0300 return -EINVAL;
0301
0302 spin_lock(&drvdata->spinlock);
0303 config->mode = val & ETMv4_MODE_ALL;
0304
0305 if (drvdata->instrp0 == true) {
0306
0307 config->cfg &= ~TRCCONFIGR_INSTP0_LOAD_STORE;
0308 if (config->mode & ETM_MODE_LOAD)
0309
0310 config->cfg |= TRCCONFIGR_INSTP0_LOAD;
0311 if (config->mode & ETM_MODE_STORE)
0312
0313 config->cfg |= TRCCONFIGR_INSTP0_STORE;
0314 if (config->mode & ETM_MODE_LOAD_STORE)
0315
0316
0317
0318
0319 config->cfg |= TRCCONFIGR_INSTP0_LOAD_STORE;
0320 }
0321
0322
0323 if ((config->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
0324 config->cfg |= TRCCONFIGR_BB;
0325 else
0326 config->cfg &= ~TRCCONFIGR_BB;
0327
0328
0329 if ((config->mode & ETMv4_MODE_CYCACC) &&
0330 (drvdata->trccci == true))
0331 config->cfg |= TRCCONFIGR_CCI;
0332 else
0333 config->cfg &= ~TRCCONFIGR_CCI;
0334
0335
0336 if ((config->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
0337 config->cfg |= TRCCONFIGR_CID;
0338 else
0339 config->cfg &= ~TRCCONFIGR_CID;
0340
0341 if ((config->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
0342 config->cfg |= TRCCONFIGR_VMID;
0343 else
0344 config->cfg &= ~TRCCONFIGR_VMID;
0345
0346
0347 mode = ETM_MODE_COND(config->mode);
0348 if (drvdata->trccond == true) {
0349 config->cfg &= ~TRCCONFIGR_COND_MASK;
0350 config->cfg |= mode << __bf_shf(TRCCONFIGR_COND_MASK);
0351 }
0352
0353
0354 if ((config->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
0355 config->cfg |= TRCCONFIGR_TS;
0356 else
0357 config->cfg &= ~TRCCONFIGR_TS;
0358
0359
0360 if ((config->mode & ETM_MODE_RETURNSTACK) &&
0361 (drvdata->retstack == true))
0362 config->cfg |= TRCCONFIGR_RS;
0363 else
0364 config->cfg &= ~TRCCONFIGR_RS;
0365
0366
0367 mode = ETM_MODE_QELEM(config->mode);
0368
0369 config->cfg &= ~(TRCCONFIGR_QE_W_COUNTS | TRCCONFIGR_QE_WO_COUNTS);
0370
0371
0372
0373
0374
0375 if (mode && drvdata->q_support)
0376 config->cfg |= TRCCONFIGR_QE_W_COUNTS;
0377
0378
0379
0380
0381 if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
0382 config->cfg |= TRCCONFIGR_QE_WO_COUNTS;
0383
0384
0385 if ((config->mode & ETM_MODE_ATB_TRIGGER) &&
0386 (drvdata->atbtrig == true))
0387 config->eventctrl1 |= TRCEVENTCTL1R_ATB;
0388 else
0389 config->eventctrl1 &= ~TRCEVENTCTL1R_ATB;
0390
0391
0392 if ((config->mode & ETM_MODE_LPOVERRIDE) &&
0393 (drvdata->lpoverride == true))
0394 config->eventctrl1 |= TRCEVENTCTL1R_LPOVERRIDE;
0395 else
0396 config->eventctrl1 &= ~TRCEVENTCTL1R_LPOVERRIDE;
0397
0398
0399 if ((config->mode & ETM_MODE_ISTALL_EN) && (drvdata->stallctl == true))
0400 config->stall_ctrl |= TRCSTALLCTLR_ISTALL;
0401 else
0402 config->stall_ctrl &= ~TRCSTALLCTLR_ISTALL;
0403
0404
0405 if (config->mode & ETM_MODE_INSTPRIO)
0406 config->stall_ctrl |= TRCSTALLCTLR_INSTPRIORITY;
0407 else
0408 config->stall_ctrl &= ~TRCSTALLCTLR_INSTPRIORITY;
0409
0410
0411 if ((config->mode & ETM_MODE_NOOVERFLOW) &&
0412 (drvdata->nooverflow == true))
0413 config->stall_ctrl |= TRCSTALLCTLR_NOOVERFLOW;
0414 else
0415 config->stall_ctrl &= ~TRCSTALLCTLR_NOOVERFLOW;
0416
0417
0418 if (config->mode & ETM_MODE_VIEWINST_STARTSTOP)
0419 config->vinst_ctrl |= TRCVICTLR_SSSTATUS;
0420 else
0421 config->vinst_ctrl &= ~TRCVICTLR_SSSTATUS;
0422
0423
0424 if (config->mode & ETM_MODE_TRACE_RESET)
0425 config->vinst_ctrl |= TRCVICTLR_TRCRESET;
0426 else
0427 config->vinst_ctrl &= ~TRCVICTLR_TRCRESET;
0428
0429
0430 if ((config->mode & ETM_MODE_TRACE_ERR) &&
0431 (drvdata->trc_error == true))
0432 config->vinst_ctrl |= TRCVICTLR_TRCERR;
0433 else
0434 config->vinst_ctrl &= ~TRCVICTLR_TRCERR;
0435
0436 if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER))
0437 etm4_config_trace_mode(config);
0438
0439 spin_unlock(&drvdata->spinlock);
0440
0441 return size;
0442 }
0443 static DEVICE_ATTR_RW(mode);
0444
0445 static ssize_t pe_show(struct device *dev,
0446 struct device_attribute *attr,
0447 char *buf)
0448 {
0449 unsigned long val;
0450 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0451 struct etmv4_config *config = &drvdata->config;
0452
0453 val = config->pe_sel;
0454 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0455 }
0456
0457 static ssize_t pe_store(struct device *dev,
0458 struct device_attribute *attr,
0459 const char *buf, size_t size)
0460 {
0461 unsigned long val;
0462 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0463 struct etmv4_config *config = &drvdata->config;
0464
0465 if (kstrtoul(buf, 16, &val))
0466 return -EINVAL;
0467
0468 spin_lock(&drvdata->spinlock);
0469 if (val > drvdata->nr_pe) {
0470 spin_unlock(&drvdata->spinlock);
0471 return -EINVAL;
0472 }
0473
0474 config->pe_sel = val;
0475 spin_unlock(&drvdata->spinlock);
0476 return size;
0477 }
0478 static DEVICE_ATTR_RW(pe);
0479
0480 static ssize_t event_show(struct device *dev,
0481 struct device_attribute *attr,
0482 char *buf)
0483 {
0484 unsigned long val;
0485 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0486 struct etmv4_config *config = &drvdata->config;
0487
0488 val = config->eventctrl0;
0489 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0490 }
0491
0492 static ssize_t event_store(struct device *dev,
0493 struct device_attribute *attr,
0494 const char *buf, size_t size)
0495 {
0496 unsigned long val;
0497 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0498 struct etmv4_config *config = &drvdata->config;
0499
0500 if (kstrtoul(buf, 16, &val))
0501 return -EINVAL;
0502
0503 spin_lock(&drvdata->spinlock);
0504 switch (drvdata->nr_event) {
0505 case 0x0:
0506
0507 config->eventctrl0 = val & 0xFF;
0508 break;
0509 case 0x1:
0510
0511 config->eventctrl0 = val & 0xFFFF;
0512 break;
0513 case 0x2:
0514
0515 config->eventctrl0 = val & 0xFFFFFF;
0516 break;
0517 case 0x3:
0518
0519 config->eventctrl0 = val;
0520 break;
0521 default:
0522 break;
0523 }
0524 spin_unlock(&drvdata->spinlock);
0525 return size;
0526 }
0527 static DEVICE_ATTR_RW(event);
0528
0529 static ssize_t event_instren_show(struct device *dev,
0530 struct device_attribute *attr,
0531 char *buf)
0532 {
0533 unsigned long val;
0534 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0535 struct etmv4_config *config = &drvdata->config;
0536
0537 val = FIELD_GET(TRCEVENTCTL1R_INSTEN_MASK, config->eventctrl1);
0538 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0539 }
0540
0541 static ssize_t event_instren_store(struct device *dev,
0542 struct device_attribute *attr,
0543 const char *buf, size_t size)
0544 {
0545 unsigned long val;
0546 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0547 struct etmv4_config *config = &drvdata->config;
0548
0549 if (kstrtoul(buf, 16, &val))
0550 return -EINVAL;
0551
0552 spin_lock(&drvdata->spinlock);
0553
0554 config->eventctrl1 &= ~TRCEVENTCTL1R_INSTEN_MASK;
0555 switch (drvdata->nr_event) {
0556 case 0x0:
0557
0558 config->eventctrl1 |= val & TRCEVENTCTL1R_INSTEN_1;
0559 break;
0560 case 0x1:
0561
0562 config->eventctrl1 |= val & (TRCEVENTCTL1R_INSTEN_0 | TRCEVENTCTL1R_INSTEN_1);
0563 break;
0564 case 0x2:
0565
0566 config->eventctrl1 |= val & (TRCEVENTCTL1R_INSTEN_0 |
0567 TRCEVENTCTL1R_INSTEN_1 |
0568 TRCEVENTCTL1R_INSTEN_2);
0569 break;
0570 case 0x3:
0571
0572 config->eventctrl1 |= val & (TRCEVENTCTL1R_INSTEN_0 |
0573 TRCEVENTCTL1R_INSTEN_1 |
0574 TRCEVENTCTL1R_INSTEN_2 |
0575 TRCEVENTCTL1R_INSTEN_3);
0576 break;
0577 default:
0578 break;
0579 }
0580 spin_unlock(&drvdata->spinlock);
0581 return size;
0582 }
0583 static DEVICE_ATTR_RW(event_instren);
0584
0585 static ssize_t event_ts_show(struct device *dev,
0586 struct device_attribute *attr,
0587 char *buf)
0588 {
0589 unsigned long val;
0590 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0591 struct etmv4_config *config = &drvdata->config;
0592
0593 val = config->ts_ctrl;
0594 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0595 }
0596
0597 static ssize_t event_ts_store(struct device *dev,
0598 struct device_attribute *attr,
0599 const char *buf, size_t size)
0600 {
0601 unsigned long val;
0602 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0603 struct etmv4_config *config = &drvdata->config;
0604
0605 if (kstrtoul(buf, 16, &val))
0606 return -EINVAL;
0607 if (!drvdata->ts_size)
0608 return -EINVAL;
0609
0610 config->ts_ctrl = val & ETMv4_EVENT_MASK;
0611 return size;
0612 }
0613 static DEVICE_ATTR_RW(event_ts);
0614
0615 static ssize_t syncfreq_show(struct device *dev,
0616 struct device_attribute *attr,
0617 char *buf)
0618 {
0619 unsigned long val;
0620 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0621 struct etmv4_config *config = &drvdata->config;
0622
0623 val = config->syncfreq;
0624 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0625 }
0626
0627 static ssize_t syncfreq_store(struct device *dev,
0628 struct device_attribute *attr,
0629 const char *buf, size_t size)
0630 {
0631 unsigned long val;
0632 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0633 struct etmv4_config *config = &drvdata->config;
0634
0635 if (kstrtoul(buf, 16, &val))
0636 return -EINVAL;
0637 if (drvdata->syncpr == true)
0638 return -EINVAL;
0639
0640 config->syncfreq = val & ETMv4_SYNC_MASK;
0641 return size;
0642 }
0643 static DEVICE_ATTR_RW(syncfreq);
0644
0645 static ssize_t cyc_threshold_show(struct device *dev,
0646 struct device_attribute *attr,
0647 char *buf)
0648 {
0649 unsigned long val;
0650 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0651 struct etmv4_config *config = &drvdata->config;
0652
0653 val = config->ccctlr;
0654 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0655 }
0656
0657 static ssize_t cyc_threshold_store(struct device *dev,
0658 struct device_attribute *attr,
0659 const char *buf, size_t size)
0660 {
0661 unsigned long val;
0662 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0663 struct etmv4_config *config = &drvdata->config;
0664
0665 if (kstrtoul(buf, 16, &val))
0666 return -EINVAL;
0667
0668
0669 val &= ETM_CYC_THRESHOLD_MASK;
0670 if (val < drvdata->ccitmin)
0671 return -EINVAL;
0672
0673 config->ccctlr = val;
0674 return size;
0675 }
0676 static DEVICE_ATTR_RW(cyc_threshold);
0677
0678 static ssize_t bb_ctrl_show(struct device *dev,
0679 struct device_attribute *attr,
0680 char *buf)
0681 {
0682 unsigned long val;
0683 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0684 struct etmv4_config *config = &drvdata->config;
0685
0686 val = config->bb_ctrl;
0687 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0688 }
0689
0690 static ssize_t bb_ctrl_store(struct device *dev,
0691 struct device_attribute *attr,
0692 const char *buf, size_t size)
0693 {
0694 unsigned long val;
0695 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0696 struct etmv4_config *config = &drvdata->config;
0697
0698 if (kstrtoul(buf, 16, &val))
0699 return -EINVAL;
0700 if (drvdata->trcbb == false)
0701 return -EINVAL;
0702 if (!drvdata->nr_addr_cmp)
0703 return -EINVAL;
0704
0705
0706
0707
0708
0709
0710 if ((val & TRCBBCTLR_MODE) && (FIELD_GET(TRCBBCTLR_RANGE_MASK, val) == 0))
0711 return -EINVAL;
0712
0713 config->bb_ctrl = val & (TRCBBCTLR_MODE | TRCBBCTLR_RANGE_MASK);
0714 return size;
0715 }
0716 static DEVICE_ATTR_RW(bb_ctrl);
0717
0718 static ssize_t event_vinst_show(struct device *dev,
0719 struct device_attribute *attr,
0720 char *buf)
0721 {
0722 unsigned long val;
0723 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0724 struct etmv4_config *config = &drvdata->config;
0725
0726 val = FIELD_GET(TRCVICTLR_EVENT_MASK, config->vinst_ctrl);
0727 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0728 }
0729
0730 static ssize_t event_vinst_store(struct device *dev,
0731 struct device_attribute *attr,
0732 const char *buf, size_t size)
0733 {
0734 unsigned long val;
0735 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0736 struct etmv4_config *config = &drvdata->config;
0737
0738 if (kstrtoul(buf, 16, &val))
0739 return -EINVAL;
0740
0741 spin_lock(&drvdata->spinlock);
0742 val &= TRCVICTLR_EVENT_MASK >> __bf_shf(TRCVICTLR_EVENT_MASK);
0743 config->vinst_ctrl &= ~TRCVICTLR_EVENT_MASK;
0744 config->vinst_ctrl |= FIELD_PREP(TRCVICTLR_EVENT_MASK, val);
0745 spin_unlock(&drvdata->spinlock);
0746 return size;
0747 }
0748 static DEVICE_ATTR_RW(event_vinst);
0749
0750 static ssize_t s_exlevel_vinst_show(struct device *dev,
0751 struct device_attribute *attr,
0752 char *buf)
0753 {
0754 unsigned long val;
0755 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0756 struct etmv4_config *config = &drvdata->config;
0757
0758 val = FIELD_GET(TRCVICTLR_EXLEVEL_S_MASK, config->vinst_ctrl);
0759 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0760 }
0761
0762 static ssize_t s_exlevel_vinst_store(struct device *dev,
0763 struct device_attribute *attr,
0764 const char *buf, size_t size)
0765 {
0766 unsigned long val;
0767 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0768 struct etmv4_config *config = &drvdata->config;
0769
0770 if (kstrtoul(buf, 16, &val))
0771 return -EINVAL;
0772
0773 spin_lock(&drvdata->spinlock);
0774
0775 config->vinst_ctrl &= ~TRCVICTLR_EXLEVEL_S_MASK;
0776
0777 val &= drvdata->s_ex_level;
0778 config->vinst_ctrl |= val << __bf_shf(TRCVICTLR_EXLEVEL_S_MASK);
0779 spin_unlock(&drvdata->spinlock);
0780 return size;
0781 }
0782 static DEVICE_ATTR_RW(s_exlevel_vinst);
0783
0784 static ssize_t ns_exlevel_vinst_show(struct device *dev,
0785 struct device_attribute *attr,
0786 char *buf)
0787 {
0788 unsigned long val;
0789 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0790 struct etmv4_config *config = &drvdata->config;
0791
0792
0793 val = FIELD_GET(TRCVICTLR_EXLEVEL_NS_MASK, config->vinst_ctrl);
0794 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0795 }
0796
0797 static ssize_t ns_exlevel_vinst_store(struct device *dev,
0798 struct device_attribute *attr,
0799 const char *buf, size_t size)
0800 {
0801 unsigned long val;
0802 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0803 struct etmv4_config *config = &drvdata->config;
0804
0805 if (kstrtoul(buf, 16, &val))
0806 return -EINVAL;
0807
0808 spin_lock(&drvdata->spinlock);
0809
0810 config->vinst_ctrl &= ~TRCVICTLR_EXLEVEL_NS_MASK;
0811
0812 val &= drvdata->ns_ex_level;
0813 config->vinst_ctrl |= val << __bf_shf(TRCVICTLR_EXLEVEL_NS_MASK);
0814 spin_unlock(&drvdata->spinlock);
0815 return size;
0816 }
0817 static DEVICE_ATTR_RW(ns_exlevel_vinst);
0818
0819 static ssize_t addr_idx_show(struct device *dev,
0820 struct device_attribute *attr,
0821 char *buf)
0822 {
0823 unsigned long val;
0824 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0825 struct etmv4_config *config = &drvdata->config;
0826
0827 val = config->addr_idx;
0828 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0829 }
0830
0831 static ssize_t addr_idx_store(struct device *dev,
0832 struct device_attribute *attr,
0833 const char *buf, size_t size)
0834 {
0835 unsigned long val;
0836 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0837 struct etmv4_config *config = &drvdata->config;
0838
0839 if (kstrtoul(buf, 16, &val))
0840 return -EINVAL;
0841 if (val >= drvdata->nr_addr_cmp * 2)
0842 return -EINVAL;
0843
0844
0845
0846
0847
0848 spin_lock(&drvdata->spinlock);
0849 config->addr_idx = val;
0850 spin_unlock(&drvdata->spinlock);
0851 return size;
0852 }
0853 static DEVICE_ATTR_RW(addr_idx);
0854
0855 static ssize_t addr_instdatatype_show(struct device *dev,
0856 struct device_attribute *attr,
0857 char *buf)
0858 {
0859 ssize_t len;
0860 u8 val, idx;
0861 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0862 struct etmv4_config *config = &drvdata->config;
0863
0864 spin_lock(&drvdata->spinlock);
0865 idx = config->addr_idx;
0866 val = FIELD_GET(TRCACATRn_TYPE_MASK, config->addr_acc[idx]);
0867 len = scnprintf(buf, PAGE_SIZE, "%s\n",
0868 val == TRCACATRn_TYPE_ADDR ? "instr" :
0869 (val == TRCACATRn_TYPE_DATA_LOAD_ADDR ? "data_load" :
0870 (val == TRCACATRn_TYPE_DATA_STORE_ADDR ? "data_store" :
0871 "data_load_store")));
0872 spin_unlock(&drvdata->spinlock);
0873 return len;
0874 }
0875
0876 static ssize_t addr_instdatatype_store(struct device *dev,
0877 struct device_attribute *attr,
0878 const char *buf, size_t size)
0879 {
0880 u8 idx;
0881 char str[20] = "";
0882 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0883 struct etmv4_config *config = &drvdata->config;
0884
0885 if (strlen(buf) >= 20)
0886 return -EINVAL;
0887 if (sscanf(buf, "%s", str) != 1)
0888 return -EINVAL;
0889
0890 spin_lock(&drvdata->spinlock);
0891 idx = config->addr_idx;
0892 if (!strcmp(str, "instr"))
0893
0894 config->addr_acc[idx] &= ~TRCACATRn_TYPE_MASK;
0895
0896 spin_unlock(&drvdata->spinlock);
0897 return size;
0898 }
0899 static DEVICE_ATTR_RW(addr_instdatatype);
0900
0901 static ssize_t addr_single_show(struct device *dev,
0902 struct device_attribute *attr,
0903 char *buf)
0904 {
0905 u8 idx;
0906 unsigned long val;
0907 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0908 struct etmv4_config *config = &drvdata->config;
0909
0910 idx = config->addr_idx;
0911 spin_lock(&drvdata->spinlock);
0912 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
0913 config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
0914 spin_unlock(&drvdata->spinlock);
0915 return -EPERM;
0916 }
0917 val = (unsigned long)config->addr_val[idx];
0918 spin_unlock(&drvdata->spinlock);
0919 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
0920 }
0921
0922 static ssize_t addr_single_store(struct device *dev,
0923 struct device_attribute *attr,
0924 const char *buf, size_t size)
0925 {
0926 u8 idx;
0927 unsigned long val;
0928 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0929 struct etmv4_config *config = &drvdata->config;
0930
0931 if (kstrtoul(buf, 16, &val))
0932 return -EINVAL;
0933
0934 spin_lock(&drvdata->spinlock);
0935 idx = config->addr_idx;
0936 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
0937 config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
0938 spin_unlock(&drvdata->spinlock);
0939 return -EPERM;
0940 }
0941
0942 config->addr_val[idx] = (u64)val;
0943 config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
0944 spin_unlock(&drvdata->spinlock);
0945 return size;
0946 }
0947 static DEVICE_ATTR_RW(addr_single);
0948
0949 static ssize_t addr_range_show(struct device *dev,
0950 struct device_attribute *attr,
0951 char *buf)
0952 {
0953 u8 idx;
0954 unsigned long val1, val2;
0955 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0956 struct etmv4_config *config = &drvdata->config;
0957
0958 spin_lock(&drvdata->spinlock);
0959 idx = config->addr_idx;
0960 if (idx % 2 != 0) {
0961 spin_unlock(&drvdata->spinlock);
0962 return -EPERM;
0963 }
0964 if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
0965 config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
0966 (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
0967 config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
0968 spin_unlock(&drvdata->spinlock);
0969 return -EPERM;
0970 }
0971
0972 val1 = (unsigned long)config->addr_val[idx];
0973 val2 = (unsigned long)config->addr_val[idx + 1];
0974 spin_unlock(&drvdata->spinlock);
0975 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
0976 }
0977
0978 static ssize_t addr_range_store(struct device *dev,
0979 struct device_attribute *attr,
0980 const char *buf, size_t size)
0981 {
0982 u8 idx;
0983 unsigned long val1, val2;
0984 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
0985 struct etmv4_config *config = &drvdata->config;
0986 int elements, exclude;
0987
0988 elements = sscanf(buf, "%lx %lx %x", &val1, &val2, &exclude);
0989
0990
0991 if (elements < 2)
0992 return -EINVAL;
0993
0994 if (val1 > val2)
0995 return -EINVAL;
0996
0997 spin_lock(&drvdata->spinlock);
0998 idx = config->addr_idx;
0999 if (idx % 2 != 0) {
1000 spin_unlock(&drvdata->spinlock);
1001 return -EPERM;
1002 }
1003
1004 if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
1005 config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
1006 (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
1007 config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
1008 spin_unlock(&drvdata->spinlock);
1009 return -EPERM;
1010 }
1011
1012 config->addr_val[idx] = (u64)val1;
1013 config->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
1014 config->addr_val[idx + 1] = (u64)val2;
1015 config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
1016
1017
1018
1019
1020
1021 if (elements != 3)
1022 exclude = config->mode & ETM_MODE_EXCLUDE;
1023 etm4_set_mode_exclude(drvdata, exclude ? true : false);
1024
1025 spin_unlock(&drvdata->spinlock);
1026 return size;
1027 }
1028 static DEVICE_ATTR_RW(addr_range);
1029
1030 static ssize_t addr_start_show(struct device *dev,
1031 struct device_attribute *attr,
1032 char *buf)
1033 {
1034 u8 idx;
1035 unsigned long val;
1036 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1037 struct etmv4_config *config = &drvdata->config;
1038
1039 spin_lock(&drvdata->spinlock);
1040 idx = config->addr_idx;
1041
1042 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1043 config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1044 spin_unlock(&drvdata->spinlock);
1045 return -EPERM;
1046 }
1047
1048 val = (unsigned long)config->addr_val[idx];
1049 spin_unlock(&drvdata->spinlock);
1050 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1051 }
1052
1053 static ssize_t addr_start_store(struct device *dev,
1054 struct device_attribute *attr,
1055 const char *buf, size_t size)
1056 {
1057 u8 idx;
1058 unsigned long val;
1059 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1060 struct etmv4_config *config = &drvdata->config;
1061
1062 if (kstrtoul(buf, 16, &val))
1063 return -EINVAL;
1064
1065 spin_lock(&drvdata->spinlock);
1066 idx = config->addr_idx;
1067 if (!drvdata->nr_addr_cmp) {
1068 spin_unlock(&drvdata->spinlock);
1069 return -EINVAL;
1070 }
1071 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1072 config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
1073 spin_unlock(&drvdata->spinlock);
1074 return -EPERM;
1075 }
1076
1077 config->addr_val[idx] = (u64)val;
1078 config->addr_type[idx] = ETM_ADDR_TYPE_START;
1079 config->vissctlr |= BIT(idx);
1080 spin_unlock(&drvdata->spinlock);
1081 return size;
1082 }
1083 static DEVICE_ATTR_RW(addr_start);
1084
1085 static ssize_t addr_stop_show(struct device *dev,
1086 struct device_attribute *attr,
1087 char *buf)
1088 {
1089 u8 idx;
1090 unsigned long val;
1091 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1092 struct etmv4_config *config = &drvdata->config;
1093
1094 spin_lock(&drvdata->spinlock);
1095 idx = config->addr_idx;
1096
1097 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1098 config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1099 spin_unlock(&drvdata->spinlock);
1100 return -EPERM;
1101 }
1102
1103 val = (unsigned long)config->addr_val[idx];
1104 spin_unlock(&drvdata->spinlock);
1105 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1106 }
1107
1108 static ssize_t addr_stop_store(struct device *dev,
1109 struct device_attribute *attr,
1110 const char *buf, size_t size)
1111 {
1112 u8 idx;
1113 unsigned long val;
1114 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1115 struct etmv4_config *config = &drvdata->config;
1116
1117 if (kstrtoul(buf, 16, &val))
1118 return -EINVAL;
1119
1120 spin_lock(&drvdata->spinlock);
1121 idx = config->addr_idx;
1122 if (!drvdata->nr_addr_cmp) {
1123 spin_unlock(&drvdata->spinlock);
1124 return -EINVAL;
1125 }
1126 if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
1127 config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
1128 spin_unlock(&drvdata->spinlock);
1129 return -EPERM;
1130 }
1131
1132 config->addr_val[idx] = (u64)val;
1133 config->addr_type[idx] = ETM_ADDR_TYPE_STOP;
1134 config->vissctlr |= BIT(idx + 16);
1135 spin_unlock(&drvdata->spinlock);
1136 return size;
1137 }
1138 static DEVICE_ATTR_RW(addr_stop);
1139
1140 static ssize_t addr_ctxtype_show(struct device *dev,
1141 struct device_attribute *attr,
1142 char *buf)
1143 {
1144 ssize_t len;
1145 u8 idx, val;
1146 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1147 struct etmv4_config *config = &drvdata->config;
1148
1149 spin_lock(&drvdata->spinlock);
1150 idx = config->addr_idx;
1151
1152 val = FIELD_GET(TRCACATRn_CONTEXTTYPE_MASK, config->addr_acc[idx]);
1153 len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
1154 (val == ETM_CTX_CTXID ? "ctxid" :
1155 (val == ETM_CTX_VMID ? "vmid" : "all")));
1156 spin_unlock(&drvdata->spinlock);
1157 return len;
1158 }
1159
1160 static ssize_t addr_ctxtype_store(struct device *dev,
1161 struct device_attribute *attr,
1162 const char *buf, size_t size)
1163 {
1164 u8 idx;
1165 char str[10] = "";
1166 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1167 struct etmv4_config *config = &drvdata->config;
1168
1169 if (strlen(buf) >= 10)
1170 return -EINVAL;
1171 if (sscanf(buf, "%s", str) != 1)
1172 return -EINVAL;
1173
1174 spin_lock(&drvdata->spinlock);
1175 idx = config->addr_idx;
1176 if (!strcmp(str, "none"))
1177
1178 config->addr_acc[idx] &= ~TRCACATRn_CONTEXTTYPE_MASK;
1179 else if (!strcmp(str, "ctxid")) {
1180
1181 if (drvdata->numcidc) {
1182 config->addr_acc[idx] |= TRCACATRn_CONTEXTTYPE_CTXID;
1183 config->addr_acc[idx] &= ~TRCACATRn_CONTEXTTYPE_VMID;
1184 }
1185 } else if (!strcmp(str, "vmid")) {
1186
1187 if (drvdata->numvmidc) {
1188 config->addr_acc[idx] &= ~TRCACATRn_CONTEXTTYPE_CTXID;
1189 config->addr_acc[idx] |= TRCACATRn_CONTEXTTYPE_VMID;
1190 }
1191 } else if (!strcmp(str, "all")) {
1192
1193
1194
1195
1196 if (drvdata->numcidc)
1197 config->addr_acc[idx] |= TRCACATRn_CONTEXTTYPE_CTXID;
1198 if (drvdata->numvmidc)
1199 config->addr_acc[idx] |= TRCACATRn_CONTEXTTYPE_VMID;
1200 }
1201 spin_unlock(&drvdata->spinlock);
1202 return size;
1203 }
1204 static DEVICE_ATTR_RW(addr_ctxtype);
1205
1206 static ssize_t addr_context_show(struct device *dev,
1207 struct device_attribute *attr,
1208 char *buf)
1209 {
1210 u8 idx;
1211 unsigned long val;
1212 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1213 struct etmv4_config *config = &drvdata->config;
1214
1215 spin_lock(&drvdata->spinlock);
1216 idx = config->addr_idx;
1217
1218 val = FIELD_GET(TRCACATRn_CONTEXT_MASK, config->addr_acc[idx]);
1219 spin_unlock(&drvdata->spinlock);
1220 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1221 }
1222
1223 static ssize_t addr_context_store(struct device *dev,
1224 struct device_attribute *attr,
1225 const char *buf, size_t size)
1226 {
1227 u8 idx;
1228 unsigned long val;
1229 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1230 struct etmv4_config *config = &drvdata->config;
1231
1232 if (kstrtoul(buf, 16, &val))
1233 return -EINVAL;
1234 if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
1235 return -EINVAL;
1236 if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
1237 drvdata->numcidc : drvdata->numvmidc))
1238 return -EINVAL;
1239
1240 spin_lock(&drvdata->spinlock);
1241 idx = config->addr_idx;
1242
1243 config->addr_acc[idx] &= ~TRCACATRn_CONTEXT_MASK;
1244 config->addr_acc[idx] |= val << __bf_shf(TRCACATRn_CONTEXT_MASK);
1245 spin_unlock(&drvdata->spinlock);
1246 return size;
1247 }
1248 static DEVICE_ATTR_RW(addr_context);
1249
1250 static ssize_t addr_exlevel_s_ns_show(struct device *dev,
1251 struct device_attribute *attr,
1252 char *buf)
1253 {
1254 u8 idx;
1255 unsigned long val;
1256 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1257 struct etmv4_config *config = &drvdata->config;
1258
1259 spin_lock(&drvdata->spinlock);
1260 idx = config->addr_idx;
1261 val = FIELD_GET(TRCACATRn_EXLEVEL_MASK, config->addr_acc[idx]);
1262 spin_unlock(&drvdata->spinlock);
1263 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1264 }
1265
1266 static ssize_t addr_exlevel_s_ns_store(struct device *dev,
1267 struct device_attribute *attr,
1268 const char *buf, size_t size)
1269 {
1270 u8 idx;
1271 unsigned long val;
1272 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1273 struct etmv4_config *config = &drvdata->config;
1274
1275 if (kstrtoul(buf, 0, &val))
1276 return -EINVAL;
1277
1278 if (val & ~(TRCACATRn_EXLEVEL_MASK >> __bf_shf(TRCACATRn_EXLEVEL_MASK)))
1279 return -EINVAL;
1280
1281 spin_lock(&drvdata->spinlock);
1282 idx = config->addr_idx;
1283
1284 config->addr_acc[idx] &= ~TRCACATRn_EXLEVEL_MASK;
1285 config->addr_acc[idx] |= val << __bf_shf(TRCACATRn_EXLEVEL_MASK);
1286 spin_unlock(&drvdata->spinlock);
1287 return size;
1288 }
1289 static DEVICE_ATTR_RW(addr_exlevel_s_ns);
1290
1291 static const char * const addr_type_names[] = {
1292 "unused",
1293 "single",
1294 "range",
1295 "start",
1296 "stop"
1297 };
1298
1299 static ssize_t addr_cmp_view_show(struct device *dev,
1300 struct device_attribute *attr, char *buf)
1301 {
1302 u8 idx, addr_type;
1303 unsigned long addr_v, addr_v2, addr_ctrl;
1304 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1305 struct etmv4_config *config = &drvdata->config;
1306 int size = 0;
1307 bool exclude = false;
1308
1309 spin_lock(&drvdata->spinlock);
1310 idx = config->addr_idx;
1311 addr_v = config->addr_val[idx];
1312 addr_ctrl = config->addr_acc[idx];
1313 addr_type = config->addr_type[idx];
1314 if (addr_type == ETM_ADDR_TYPE_RANGE) {
1315 if (idx & 0x1) {
1316 idx -= 1;
1317 addr_v2 = addr_v;
1318 addr_v = config->addr_val[idx];
1319 } else {
1320 addr_v2 = config->addr_val[idx + 1];
1321 }
1322 exclude = config->viiectlr & BIT(idx / 2 + 16);
1323 }
1324 spin_unlock(&drvdata->spinlock);
1325 if (addr_type) {
1326 size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] %s %#lx", idx,
1327 addr_type_names[addr_type], addr_v);
1328 if (addr_type == ETM_ADDR_TYPE_RANGE) {
1329 size += scnprintf(buf + size, PAGE_SIZE - size,
1330 " %#lx %s", addr_v2,
1331 exclude ? "exclude" : "include");
1332 }
1333 size += scnprintf(buf + size, PAGE_SIZE - size,
1334 " ctrl(%#lx)\n", addr_ctrl);
1335 } else {
1336 size = scnprintf(buf, PAGE_SIZE, "addr_cmp[%i] unused\n", idx);
1337 }
1338 return size;
1339 }
1340 static DEVICE_ATTR_RO(addr_cmp_view);
1341
1342 static ssize_t vinst_pe_cmp_start_stop_show(struct device *dev,
1343 struct device_attribute *attr,
1344 char *buf)
1345 {
1346 unsigned long val;
1347 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1348 struct etmv4_config *config = &drvdata->config;
1349
1350 if (!drvdata->nr_pe_cmp)
1351 return -EINVAL;
1352 val = config->vipcssctlr;
1353 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1354 }
1355 static ssize_t vinst_pe_cmp_start_stop_store(struct device *dev,
1356 struct device_attribute *attr,
1357 const char *buf, size_t size)
1358 {
1359 unsigned long val;
1360 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1361 struct etmv4_config *config = &drvdata->config;
1362
1363 if (kstrtoul(buf, 16, &val))
1364 return -EINVAL;
1365 if (!drvdata->nr_pe_cmp)
1366 return -EINVAL;
1367
1368 spin_lock(&drvdata->spinlock);
1369 config->vipcssctlr = val;
1370 spin_unlock(&drvdata->spinlock);
1371 return size;
1372 }
1373 static DEVICE_ATTR_RW(vinst_pe_cmp_start_stop);
1374
1375 static ssize_t seq_idx_show(struct device *dev,
1376 struct device_attribute *attr,
1377 char *buf)
1378 {
1379 unsigned long val;
1380 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1381 struct etmv4_config *config = &drvdata->config;
1382
1383 val = config->seq_idx;
1384 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1385 }
1386
1387 static ssize_t seq_idx_store(struct device *dev,
1388 struct device_attribute *attr,
1389 const char *buf, size_t size)
1390 {
1391 unsigned long val;
1392 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1393 struct etmv4_config *config = &drvdata->config;
1394
1395 if (kstrtoul(buf, 16, &val))
1396 return -EINVAL;
1397 if (val >= drvdata->nrseqstate - 1)
1398 return -EINVAL;
1399
1400
1401
1402
1403
1404 spin_lock(&drvdata->spinlock);
1405 config->seq_idx = val;
1406 spin_unlock(&drvdata->spinlock);
1407 return size;
1408 }
1409 static DEVICE_ATTR_RW(seq_idx);
1410
1411 static ssize_t seq_state_show(struct device *dev,
1412 struct device_attribute *attr,
1413 char *buf)
1414 {
1415 unsigned long val;
1416 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1417 struct etmv4_config *config = &drvdata->config;
1418
1419 val = config->seq_state;
1420 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1421 }
1422
1423 static ssize_t seq_state_store(struct device *dev,
1424 struct device_attribute *attr,
1425 const char *buf, size_t size)
1426 {
1427 unsigned long val;
1428 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1429 struct etmv4_config *config = &drvdata->config;
1430
1431 if (kstrtoul(buf, 16, &val))
1432 return -EINVAL;
1433 if (val >= drvdata->nrseqstate)
1434 return -EINVAL;
1435
1436 config->seq_state = val;
1437 return size;
1438 }
1439 static DEVICE_ATTR_RW(seq_state);
1440
1441 static ssize_t seq_event_show(struct device *dev,
1442 struct device_attribute *attr,
1443 char *buf)
1444 {
1445 u8 idx;
1446 unsigned long val;
1447 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1448 struct etmv4_config *config = &drvdata->config;
1449
1450 spin_lock(&drvdata->spinlock);
1451 idx = config->seq_idx;
1452 val = config->seq_ctrl[idx];
1453 spin_unlock(&drvdata->spinlock);
1454 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1455 }
1456
1457 static ssize_t seq_event_store(struct device *dev,
1458 struct device_attribute *attr,
1459 const char *buf, size_t size)
1460 {
1461 u8 idx;
1462 unsigned long val;
1463 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1464 struct etmv4_config *config = &drvdata->config;
1465
1466 if (kstrtoul(buf, 16, &val))
1467 return -EINVAL;
1468
1469 spin_lock(&drvdata->spinlock);
1470 idx = config->seq_idx;
1471
1472 config->seq_ctrl[idx] = val & 0xFFFF;
1473 spin_unlock(&drvdata->spinlock);
1474 return size;
1475 }
1476 static DEVICE_ATTR_RW(seq_event);
1477
1478 static ssize_t seq_reset_event_show(struct device *dev,
1479 struct device_attribute *attr,
1480 char *buf)
1481 {
1482 unsigned long val;
1483 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1484 struct etmv4_config *config = &drvdata->config;
1485
1486 val = config->seq_rst;
1487 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1488 }
1489
1490 static ssize_t seq_reset_event_store(struct device *dev,
1491 struct device_attribute *attr,
1492 const char *buf, size_t size)
1493 {
1494 unsigned long val;
1495 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1496 struct etmv4_config *config = &drvdata->config;
1497
1498 if (kstrtoul(buf, 16, &val))
1499 return -EINVAL;
1500 if (!(drvdata->nrseqstate))
1501 return -EINVAL;
1502
1503 config->seq_rst = val & ETMv4_EVENT_MASK;
1504 return size;
1505 }
1506 static DEVICE_ATTR_RW(seq_reset_event);
1507
1508 static ssize_t cntr_idx_show(struct device *dev,
1509 struct device_attribute *attr,
1510 char *buf)
1511 {
1512 unsigned long val;
1513 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1514 struct etmv4_config *config = &drvdata->config;
1515
1516 val = config->cntr_idx;
1517 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1518 }
1519
1520 static ssize_t cntr_idx_store(struct device *dev,
1521 struct device_attribute *attr,
1522 const char *buf, size_t size)
1523 {
1524 unsigned long val;
1525 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1526 struct etmv4_config *config = &drvdata->config;
1527
1528 if (kstrtoul(buf, 16, &val))
1529 return -EINVAL;
1530 if (val >= drvdata->nr_cntr)
1531 return -EINVAL;
1532
1533
1534
1535
1536
1537 spin_lock(&drvdata->spinlock);
1538 config->cntr_idx = val;
1539 spin_unlock(&drvdata->spinlock);
1540 return size;
1541 }
1542 static DEVICE_ATTR_RW(cntr_idx);
1543
1544 static ssize_t cntrldvr_show(struct device *dev,
1545 struct device_attribute *attr,
1546 char *buf)
1547 {
1548 u8 idx;
1549 unsigned long val;
1550 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1551 struct etmv4_config *config = &drvdata->config;
1552
1553 spin_lock(&drvdata->spinlock);
1554 idx = config->cntr_idx;
1555 val = config->cntrldvr[idx];
1556 spin_unlock(&drvdata->spinlock);
1557 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1558 }
1559
1560 static ssize_t cntrldvr_store(struct device *dev,
1561 struct device_attribute *attr,
1562 const char *buf, size_t size)
1563 {
1564 u8 idx;
1565 unsigned long val;
1566 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1567 struct etmv4_config *config = &drvdata->config;
1568
1569 if (kstrtoul(buf, 16, &val))
1570 return -EINVAL;
1571 if (val > ETM_CNTR_MAX_VAL)
1572 return -EINVAL;
1573
1574 spin_lock(&drvdata->spinlock);
1575 idx = config->cntr_idx;
1576 config->cntrldvr[idx] = val;
1577 spin_unlock(&drvdata->spinlock);
1578 return size;
1579 }
1580 static DEVICE_ATTR_RW(cntrldvr);
1581
1582 static ssize_t cntr_val_show(struct device *dev,
1583 struct device_attribute *attr,
1584 char *buf)
1585 {
1586 u8 idx;
1587 unsigned long val;
1588 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1589 struct etmv4_config *config = &drvdata->config;
1590
1591 spin_lock(&drvdata->spinlock);
1592 idx = config->cntr_idx;
1593 val = config->cntr_val[idx];
1594 spin_unlock(&drvdata->spinlock);
1595 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1596 }
1597
1598 static ssize_t cntr_val_store(struct device *dev,
1599 struct device_attribute *attr,
1600 const char *buf, size_t size)
1601 {
1602 u8 idx;
1603 unsigned long val;
1604 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1605 struct etmv4_config *config = &drvdata->config;
1606
1607 if (kstrtoul(buf, 16, &val))
1608 return -EINVAL;
1609 if (val > ETM_CNTR_MAX_VAL)
1610 return -EINVAL;
1611
1612 spin_lock(&drvdata->spinlock);
1613 idx = config->cntr_idx;
1614 config->cntr_val[idx] = val;
1615 spin_unlock(&drvdata->spinlock);
1616 return size;
1617 }
1618 static DEVICE_ATTR_RW(cntr_val);
1619
1620 static ssize_t cntr_ctrl_show(struct device *dev,
1621 struct device_attribute *attr,
1622 char *buf)
1623 {
1624 u8 idx;
1625 unsigned long val;
1626 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1627 struct etmv4_config *config = &drvdata->config;
1628
1629 spin_lock(&drvdata->spinlock);
1630 idx = config->cntr_idx;
1631 val = config->cntr_ctrl[idx];
1632 spin_unlock(&drvdata->spinlock);
1633 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1634 }
1635
1636 static ssize_t cntr_ctrl_store(struct device *dev,
1637 struct device_attribute *attr,
1638 const char *buf, size_t size)
1639 {
1640 u8 idx;
1641 unsigned long val;
1642 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1643 struct etmv4_config *config = &drvdata->config;
1644
1645 if (kstrtoul(buf, 16, &val))
1646 return -EINVAL;
1647
1648 spin_lock(&drvdata->spinlock);
1649 idx = config->cntr_idx;
1650 config->cntr_ctrl[idx] = val;
1651 spin_unlock(&drvdata->spinlock);
1652 return size;
1653 }
1654 static DEVICE_ATTR_RW(cntr_ctrl);
1655
1656 static ssize_t res_idx_show(struct device *dev,
1657 struct device_attribute *attr,
1658 char *buf)
1659 {
1660 unsigned long val;
1661 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1662 struct etmv4_config *config = &drvdata->config;
1663
1664 val = config->res_idx;
1665 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1666 }
1667
1668 static ssize_t res_idx_store(struct device *dev,
1669 struct device_attribute *attr,
1670 const char *buf, size_t size)
1671 {
1672 unsigned long val;
1673 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1674 struct etmv4_config *config = &drvdata->config;
1675
1676 if (kstrtoul(buf, 16, &val))
1677 return -EINVAL;
1678
1679
1680
1681
1682 if ((val < 2) || (val >= 2 * drvdata->nr_resource))
1683 return -EINVAL;
1684
1685
1686
1687
1688
1689 spin_lock(&drvdata->spinlock);
1690 config->res_idx = val;
1691 spin_unlock(&drvdata->spinlock);
1692 return size;
1693 }
1694 static DEVICE_ATTR_RW(res_idx);
1695
1696 static ssize_t res_ctrl_show(struct device *dev,
1697 struct device_attribute *attr,
1698 char *buf)
1699 {
1700 u8 idx;
1701 unsigned long val;
1702 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1703 struct etmv4_config *config = &drvdata->config;
1704
1705 spin_lock(&drvdata->spinlock);
1706 idx = config->res_idx;
1707 val = config->res_ctrl[idx];
1708 spin_unlock(&drvdata->spinlock);
1709 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1710 }
1711
1712 static ssize_t res_ctrl_store(struct device *dev,
1713 struct device_attribute *attr,
1714 const char *buf, size_t size)
1715 {
1716 u8 idx;
1717 unsigned long val;
1718 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1719 struct etmv4_config *config = &drvdata->config;
1720
1721 if (kstrtoul(buf, 16, &val))
1722 return -EINVAL;
1723
1724 spin_lock(&drvdata->spinlock);
1725 idx = config->res_idx;
1726
1727 if (idx % 2 != 0)
1728
1729 val &= ~TRCRSCTLRn_PAIRINV;
1730 config->res_ctrl[idx] = val & (TRCRSCTLRn_PAIRINV |
1731 TRCRSCTLRn_INV |
1732 TRCRSCTLRn_GROUP_MASK |
1733 TRCRSCTLRn_SELECT_MASK);
1734 spin_unlock(&drvdata->spinlock);
1735 return size;
1736 }
1737 static DEVICE_ATTR_RW(res_ctrl);
1738
1739 static ssize_t sshot_idx_show(struct device *dev,
1740 struct device_attribute *attr, char *buf)
1741 {
1742 unsigned long val;
1743 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1744 struct etmv4_config *config = &drvdata->config;
1745
1746 val = config->ss_idx;
1747 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1748 }
1749
1750 static ssize_t sshot_idx_store(struct device *dev,
1751 struct device_attribute *attr,
1752 const char *buf, size_t size)
1753 {
1754 unsigned long val;
1755 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1756 struct etmv4_config *config = &drvdata->config;
1757
1758 if (kstrtoul(buf, 16, &val))
1759 return -EINVAL;
1760 if (val >= drvdata->nr_ss_cmp)
1761 return -EINVAL;
1762
1763 spin_lock(&drvdata->spinlock);
1764 config->ss_idx = val;
1765 spin_unlock(&drvdata->spinlock);
1766 return size;
1767 }
1768 static DEVICE_ATTR_RW(sshot_idx);
1769
1770 static ssize_t sshot_ctrl_show(struct device *dev,
1771 struct device_attribute *attr,
1772 char *buf)
1773 {
1774 unsigned long val;
1775 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1776 struct etmv4_config *config = &drvdata->config;
1777
1778 spin_lock(&drvdata->spinlock);
1779 val = config->ss_ctrl[config->ss_idx];
1780 spin_unlock(&drvdata->spinlock);
1781 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1782 }
1783
1784 static ssize_t sshot_ctrl_store(struct device *dev,
1785 struct device_attribute *attr,
1786 const char *buf, size_t size)
1787 {
1788 u8 idx;
1789 unsigned long val;
1790 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1791 struct etmv4_config *config = &drvdata->config;
1792
1793 if (kstrtoul(buf, 16, &val))
1794 return -EINVAL;
1795
1796 spin_lock(&drvdata->spinlock);
1797 idx = config->ss_idx;
1798 config->ss_ctrl[idx] = FIELD_PREP(TRCSSCCRn_SAC_ARC_RST_MASK, val);
1799
1800 config->ss_status[idx] &= ~TRCSSCSRn_STATUS;
1801 spin_unlock(&drvdata->spinlock);
1802 return size;
1803 }
1804 static DEVICE_ATTR_RW(sshot_ctrl);
1805
1806 static ssize_t sshot_status_show(struct device *dev,
1807 struct device_attribute *attr, char *buf)
1808 {
1809 unsigned long val;
1810 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1811 struct etmv4_config *config = &drvdata->config;
1812
1813 spin_lock(&drvdata->spinlock);
1814 val = config->ss_status[config->ss_idx];
1815 spin_unlock(&drvdata->spinlock);
1816 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1817 }
1818 static DEVICE_ATTR_RO(sshot_status);
1819
1820 static ssize_t sshot_pe_ctrl_show(struct device *dev,
1821 struct device_attribute *attr,
1822 char *buf)
1823 {
1824 unsigned long val;
1825 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1826 struct etmv4_config *config = &drvdata->config;
1827
1828 spin_lock(&drvdata->spinlock);
1829 val = config->ss_pe_cmp[config->ss_idx];
1830 spin_unlock(&drvdata->spinlock);
1831 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1832 }
1833
1834 static ssize_t sshot_pe_ctrl_store(struct device *dev,
1835 struct device_attribute *attr,
1836 const char *buf, size_t size)
1837 {
1838 u8 idx;
1839 unsigned long val;
1840 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1841 struct etmv4_config *config = &drvdata->config;
1842
1843 if (kstrtoul(buf, 16, &val))
1844 return -EINVAL;
1845
1846 spin_lock(&drvdata->spinlock);
1847 idx = config->ss_idx;
1848 config->ss_pe_cmp[idx] = FIELD_PREP(TRCSSPCICRn_PC_MASK, val);
1849
1850 config->ss_status[idx] &= ~TRCSSCSRn_STATUS;
1851 spin_unlock(&drvdata->spinlock);
1852 return size;
1853 }
1854 static DEVICE_ATTR_RW(sshot_pe_ctrl);
1855
1856 static ssize_t ctxid_idx_show(struct device *dev,
1857 struct device_attribute *attr,
1858 char *buf)
1859 {
1860 unsigned long val;
1861 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1862 struct etmv4_config *config = &drvdata->config;
1863
1864 val = config->ctxid_idx;
1865 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1866 }
1867
1868 static ssize_t ctxid_idx_store(struct device *dev,
1869 struct device_attribute *attr,
1870 const char *buf, size_t size)
1871 {
1872 unsigned long val;
1873 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1874 struct etmv4_config *config = &drvdata->config;
1875
1876 if (kstrtoul(buf, 16, &val))
1877 return -EINVAL;
1878 if (val >= drvdata->numcidc)
1879 return -EINVAL;
1880
1881
1882
1883
1884
1885 spin_lock(&drvdata->spinlock);
1886 config->ctxid_idx = val;
1887 spin_unlock(&drvdata->spinlock);
1888 return size;
1889 }
1890 static DEVICE_ATTR_RW(ctxid_idx);
1891
1892 static ssize_t ctxid_pid_show(struct device *dev,
1893 struct device_attribute *attr,
1894 char *buf)
1895 {
1896 u8 idx;
1897 unsigned long val;
1898 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1899 struct etmv4_config *config = &drvdata->config;
1900
1901
1902
1903
1904
1905 if (task_active_pid_ns(current) != &init_pid_ns)
1906 return -EINVAL;
1907
1908 spin_lock(&drvdata->spinlock);
1909 idx = config->ctxid_idx;
1910 val = (unsigned long)config->ctxid_pid[idx];
1911 spin_unlock(&drvdata->spinlock);
1912 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
1913 }
1914
1915 static ssize_t ctxid_pid_store(struct device *dev,
1916 struct device_attribute *attr,
1917 const char *buf, size_t size)
1918 {
1919 u8 idx;
1920 unsigned long pid;
1921 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1922 struct etmv4_config *config = &drvdata->config;
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933 if (task_active_pid_ns(current) != &init_pid_ns)
1934 return -EINVAL;
1935
1936
1937
1938
1939
1940
1941 if (!drvdata->ctxid_size || !drvdata->numcidc)
1942 return -EINVAL;
1943 if (kstrtoul(buf, 16, &pid))
1944 return -EINVAL;
1945
1946 spin_lock(&drvdata->spinlock);
1947 idx = config->ctxid_idx;
1948 config->ctxid_pid[idx] = (u64)pid;
1949 spin_unlock(&drvdata->spinlock);
1950 return size;
1951 }
1952 static DEVICE_ATTR_RW(ctxid_pid);
1953
1954 static ssize_t ctxid_masks_show(struct device *dev,
1955 struct device_attribute *attr,
1956 char *buf)
1957 {
1958 unsigned long val1, val2;
1959 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1960 struct etmv4_config *config = &drvdata->config;
1961
1962
1963
1964
1965
1966 if (task_active_pid_ns(current) != &init_pid_ns)
1967 return -EINVAL;
1968
1969 spin_lock(&drvdata->spinlock);
1970 val1 = config->ctxid_mask0;
1971 val2 = config->ctxid_mask1;
1972 spin_unlock(&drvdata->spinlock);
1973 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
1974 }
1975
1976 static ssize_t ctxid_masks_store(struct device *dev,
1977 struct device_attribute *attr,
1978 const char *buf, size_t size)
1979 {
1980 u8 i, j, maskbyte;
1981 unsigned long val1, val2, mask;
1982 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
1983 struct etmv4_config *config = &drvdata->config;
1984 int nr_inputs;
1985
1986
1987
1988
1989
1990 if (task_active_pid_ns(current) != &init_pid_ns)
1991 return -EINVAL;
1992
1993
1994
1995
1996
1997
1998 if (!drvdata->ctxid_size || !drvdata->numcidc)
1999 return -EINVAL;
2000
2001 nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2);
2002 if ((drvdata->numcidc > 4) && (nr_inputs != 2))
2003 return -EINVAL;
2004
2005 spin_lock(&drvdata->spinlock);
2006
2007
2008
2009
2010 switch (drvdata->numcidc) {
2011 case 0x1:
2012
2013 config->ctxid_mask0 = val1 & 0xFF;
2014 break;
2015 case 0x2:
2016
2017 config->ctxid_mask0 = val1 & 0xFFFF;
2018 break;
2019 case 0x3:
2020
2021 config->ctxid_mask0 = val1 & 0xFFFFFF;
2022 break;
2023 case 0x4:
2024
2025 config->ctxid_mask0 = val1;
2026 break;
2027 case 0x5:
2028
2029 config->ctxid_mask0 = val1;
2030 config->ctxid_mask1 = val2 & 0xFF;
2031 break;
2032 case 0x6:
2033
2034 config->ctxid_mask0 = val1;
2035 config->ctxid_mask1 = val2 & 0xFFFF;
2036 break;
2037 case 0x7:
2038
2039 config->ctxid_mask0 = val1;
2040 config->ctxid_mask1 = val2 & 0xFFFFFF;
2041 break;
2042 case 0x8:
2043
2044 config->ctxid_mask0 = val1;
2045 config->ctxid_mask1 = val2;
2046 break;
2047 default:
2048 break;
2049 }
2050
2051
2052
2053
2054
2055
2056 mask = config->ctxid_mask0;
2057 for (i = 0; i < drvdata->numcidc; i++) {
2058
2059 maskbyte = mask & ETMv4_EVENT_MASK;
2060
2061
2062
2063
2064 for (j = 0; j < 8; j++) {
2065 if (maskbyte & 1)
2066 config->ctxid_pid[i] &= ~(0xFFUL << (j * 8));
2067 maskbyte >>= 1;
2068 }
2069
2070 if (i == 3)
2071
2072 mask = config->ctxid_mask1;
2073 else
2074 mask >>= 0x8;
2075 }
2076
2077 spin_unlock(&drvdata->spinlock);
2078 return size;
2079 }
2080 static DEVICE_ATTR_RW(ctxid_masks);
2081
2082 static ssize_t vmid_idx_show(struct device *dev,
2083 struct device_attribute *attr,
2084 char *buf)
2085 {
2086 unsigned long val;
2087 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2088 struct etmv4_config *config = &drvdata->config;
2089
2090 val = config->vmid_idx;
2091 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2092 }
2093
2094 static ssize_t vmid_idx_store(struct device *dev,
2095 struct device_attribute *attr,
2096 const char *buf, size_t size)
2097 {
2098 unsigned long val;
2099 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2100 struct etmv4_config *config = &drvdata->config;
2101
2102 if (kstrtoul(buf, 16, &val))
2103 return -EINVAL;
2104 if (val >= drvdata->numvmidc)
2105 return -EINVAL;
2106
2107
2108
2109
2110
2111 spin_lock(&drvdata->spinlock);
2112 config->vmid_idx = val;
2113 spin_unlock(&drvdata->spinlock);
2114 return size;
2115 }
2116 static DEVICE_ATTR_RW(vmid_idx);
2117
2118 static ssize_t vmid_val_show(struct device *dev,
2119 struct device_attribute *attr,
2120 char *buf)
2121 {
2122 unsigned long val;
2123 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2124 struct etmv4_config *config = &drvdata->config;
2125
2126
2127
2128
2129
2130 if (!task_is_in_init_pid_ns(current))
2131 return -EINVAL;
2132
2133 spin_lock(&drvdata->spinlock);
2134 val = (unsigned long)config->vmid_val[config->vmid_idx];
2135 spin_unlock(&drvdata->spinlock);
2136 return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
2137 }
2138
2139 static ssize_t vmid_val_store(struct device *dev,
2140 struct device_attribute *attr,
2141 const char *buf, size_t size)
2142 {
2143 unsigned long val;
2144 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2145 struct etmv4_config *config = &drvdata->config;
2146
2147
2148
2149
2150
2151 if (!task_is_in_init_pid_ns(current))
2152 return -EINVAL;
2153
2154
2155
2156
2157
2158 if (!drvdata->vmid_size || !drvdata->numvmidc)
2159 return -EINVAL;
2160 if (kstrtoul(buf, 16, &val))
2161 return -EINVAL;
2162
2163 spin_lock(&drvdata->spinlock);
2164 config->vmid_val[config->vmid_idx] = (u64)val;
2165 spin_unlock(&drvdata->spinlock);
2166 return size;
2167 }
2168 static DEVICE_ATTR_RW(vmid_val);
2169
2170 static ssize_t vmid_masks_show(struct device *dev,
2171 struct device_attribute *attr, char *buf)
2172 {
2173 unsigned long val1, val2;
2174 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2175 struct etmv4_config *config = &drvdata->config;
2176
2177
2178
2179
2180
2181 if (!task_is_in_init_pid_ns(current))
2182 return -EINVAL;
2183
2184 spin_lock(&drvdata->spinlock);
2185 val1 = config->vmid_mask0;
2186 val2 = config->vmid_mask1;
2187 spin_unlock(&drvdata->spinlock);
2188 return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
2189 }
2190
2191 static ssize_t vmid_masks_store(struct device *dev,
2192 struct device_attribute *attr,
2193 const char *buf, size_t size)
2194 {
2195 u8 i, j, maskbyte;
2196 unsigned long val1, val2, mask;
2197 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2198 struct etmv4_config *config = &drvdata->config;
2199 int nr_inputs;
2200
2201
2202
2203
2204
2205 if (!task_is_in_init_pid_ns(current))
2206 return -EINVAL;
2207
2208
2209
2210
2211
2212 if (!drvdata->vmid_size || !drvdata->numvmidc)
2213 return -EINVAL;
2214
2215 nr_inputs = sscanf(buf, "%lx %lx", &val1, &val2);
2216 if ((drvdata->numvmidc > 4) && (nr_inputs != 2))
2217 return -EINVAL;
2218
2219 spin_lock(&drvdata->spinlock);
2220
2221
2222
2223
2224
2225 switch (drvdata->numvmidc) {
2226 case 0x1:
2227
2228 config->vmid_mask0 = val1 & 0xFF;
2229 break;
2230 case 0x2:
2231
2232 config->vmid_mask0 = val1 & 0xFFFF;
2233 break;
2234 case 0x3:
2235
2236 config->vmid_mask0 = val1 & 0xFFFFFF;
2237 break;
2238 case 0x4:
2239
2240 config->vmid_mask0 = val1;
2241 break;
2242 case 0x5:
2243
2244 config->vmid_mask0 = val1;
2245 config->vmid_mask1 = val2 & 0xFF;
2246 break;
2247 case 0x6:
2248
2249 config->vmid_mask0 = val1;
2250 config->vmid_mask1 = val2 & 0xFFFF;
2251 break;
2252 case 0x7:
2253
2254 config->vmid_mask0 = val1;
2255 config->vmid_mask1 = val2 & 0xFFFFFF;
2256 break;
2257 case 0x8:
2258
2259 config->vmid_mask0 = val1;
2260 config->vmid_mask1 = val2;
2261 break;
2262 default:
2263 break;
2264 }
2265
2266
2267
2268
2269
2270
2271
2272 mask = config->vmid_mask0;
2273 for (i = 0; i < drvdata->numvmidc; i++) {
2274
2275 maskbyte = mask & ETMv4_EVENT_MASK;
2276
2277
2278
2279
2280 for (j = 0; j < 8; j++) {
2281 if (maskbyte & 1)
2282 config->vmid_val[i] &= ~(0xFFUL << (j * 8));
2283 maskbyte >>= 1;
2284 }
2285
2286 if (i == 3)
2287
2288 mask = config->vmid_mask1;
2289 else
2290 mask >>= 0x8;
2291 }
2292 spin_unlock(&drvdata->spinlock);
2293 return size;
2294 }
2295 static DEVICE_ATTR_RW(vmid_masks);
2296
2297 static ssize_t cpu_show(struct device *dev,
2298 struct device_attribute *attr, char *buf)
2299 {
2300 int val;
2301 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2302
2303 val = drvdata->cpu;
2304 return scnprintf(buf, PAGE_SIZE, "%d\n", val);
2305
2306 }
2307 static DEVICE_ATTR_RO(cpu);
2308
2309 static struct attribute *coresight_etmv4_attrs[] = {
2310 &dev_attr_nr_pe_cmp.attr,
2311 &dev_attr_nr_addr_cmp.attr,
2312 &dev_attr_nr_cntr.attr,
2313 &dev_attr_nr_ext_inp.attr,
2314 &dev_attr_numcidc.attr,
2315 &dev_attr_numvmidc.attr,
2316 &dev_attr_nrseqstate.attr,
2317 &dev_attr_nr_resource.attr,
2318 &dev_attr_nr_ss_cmp.attr,
2319 &dev_attr_reset.attr,
2320 &dev_attr_mode.attr,
2321 &dev_attr_pe.attr,
2322 &dev_attr_event.attr,
2323 &dev_attr_event_instren.attr,
2324 &dev_attr_event_ts.attr,
2325 &dev_attr_syncfreq.attr,
2326 &dev_attr_cyc_threshold.attr,
2327 &dev_attr_bb_ctrl.attr,
2328 &dev_attr_event_vinst.attr,
2329 &dev_attr_s_exlevel_vinst.attr,
2330 &dev_attr_ns_exlevel_vinst.attr,
2331 &dev_attr_addr_idx.attr,
2332 &dev_attr_addr_instdatatype.attr,
2333 &dev_attr_addr_single.attr,
2334 &dev_attr_addr_range.attr,
2335 &dev_attr_addr_start.attr,
2336 &dev_attr_addr_stop.attr,
2337 &dev_attr_addr_ctxtype.attr,
2338 &dev_attr_addr_context.attr,
2339 &dev_attr_addr_exlevel_s_ns.attr,
2340 &dev_attr_addr_cmp_view.attr,
2341 &dev_attr_vinst_pe_cmp_start_stop.attr,
2342 &dev_attr_sshot_idx.attr,
2343 &dev_attr_sshot_ctrl.attr,
2344 &dev_attr_sshot_pe_ctrl.attr,
2345 &dev_attr_sshot_status.attr,
2346 &dev_attr_seq_idx.attr,
2347 &dev_attr_seq_state.attr,
2348 &dev_attr_seq_event.attr,
2349 &dev_attr_seq_reset_event.attr,
2350 &dev_attr_cntr_idx.attr,
2351 &dev_attr_cntrldvr.attr,
2352 &dev_attr_cntr_val.attr,
2353 &dev_attr_cntr_ctrl.attr,
2354 &dev_attr_res_idx.attr,
2355 &dev_attr_res_ctrl.attr,
2356 &dev_attr_ctxid_idx.attr,
2357 &dev_attr_ctxid_pid.attr,
2358 &dev_attr_ctxid_masks.attr,
2359 &dev_attr_vmid_idx.attr,
2360 &dev_attr_vmid_val.attr,
2361 &dev_attr_vmid_masks.attr,
2362 &dev_attr_cpu.attr,
2363 NULL,
2364 };
2365
2366 struct etmv4_reg {
2367 struct coresight_device *csdev;
2368 u32 offset;
2369 u32 data;
2370 };
2371
2372 static void do_smp_cross_read(void *data)
2373 {
2374 struct etmv4_reg *reg = data;
2375
2376 reg->data = etm4x_relaxed_read32(®->csdev->access, reg->offset);
2377 }
2378
2379 static u32 etmv4_cross_read(const struct etmv4_drvdata *drvdata, u32 offset)
2380 {
2381 struct etmv4_reg reg;
2382
2383 reg.offset = offset;
2384 reg.csdev = drvdata->csdev;
2385
2386
2387
2388
2389
2390 smp_call_function_single(drvdata->cpu, do_smp_cross_read, ®, 1);
2391 return reg.data;
2392 }
2393
2394 static inline u32 coresight_etm4x_attr_to_offset(struct device_attribute *attr)
2395 {
2396 struct dev_ext_attribute *eattr;
2397
2398 eattr = container_of(attr, struct dev_ext_attribute, attr);
2399 return (u32)(unsigned long)eattr->var;
2400 }
2401
2402 static ssize_t coresight_etm4x_reg_show(struct device *dev,
2403 struct device_attribute *d_attr,
2404 char *buf)
2405 {
2406 u32 val, offset;
2407 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2408
2409 offset = coresight_etm4x_attr_to_offset(d_attr);
2410
2411 pm_runtime_get_sync(dev->parent);
2412 val = etmv4_cross_read(drvdata, offset);
2413 pm_runtime_put_sync(dev->parent);
2414
2415 return scnprintf(buf, PAGE_SIZE, "0x%x\n", val);
2416 }
2417
2418 static inline bool
2419 etm4x_register_implemented(struct etmv4_drvdata *drvdata, u32 offset)
2420 {
2421 switch (offset) {
2422 ETM_COMMON_SYSREG_LIST_CASES
2423
2424
2425
2426
2427 return true;
2428
2429 ETM4x_ONLY_SYSREG_LIST_CASES
2430
2431
2432
2433
2434 return !etm4x_is_ete(drvdata);
2435
2436 ETM4x_MMAP_LIST_CASES
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448 return !!drvdata->base;
2449
2450 ETE_ONLY_SYSREG_LIST_CASES
2451 return etm4x_is_ete(drvdata);
2452 }
2453
2454 return false;
2455 }
2456
2457
2458
2459
2460
2461
2462
2463
2464 static umode_t
2465 coresight_etm4x_attr_reg_implemented(struct kobject *kobj,
2466 struct attribute *attr, int unused)
2467 {
2468 struct device *dev = kobj_to_dev(kobj);
2469 struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
2470 struct device_attribute *d_attr;
2471 u32 offset;
2472
2473 d_attr = container_of(attr, struct device_attribute, attr);
2474 offset = coresight_etm4x_attr_to_offset(d_attr);
2475
2476 if (etm4x_register_implemented(drvdata, offset))
2477 return attr->mode;
2478 return 0;
2479 }
2480
2481 #define coresight_etm4x_reg(name, offset) \
2482 &((struct dev_ext_attribute[]) { \
2483 { \
2484 __ATTR(name, 0444, coresight_etm4x_reg_show, NULL), \
2485 (void *)(unsigned long)offset \
2486 } \
2487 })[0].attr.attr
2488
2489 static struct attribute *coresight_etmv4_mgmt_attrs[] = {
2490 coresight_etm4x_reg(trcpdcr, TRCPDCR),
2491 coresight_etm4x_reg(trcpdsr, TRCPDSR),
2492 coresight_etm4x_reg(trclsr, TRCLSR),
2493 coresight_etm4x_reg(trcauthstatus, TRCAUTHSTATUS),
2494 coresight_etm4x_reg(trcdevid, TRCDEVID),
2495 coresight_etm4x_reg(trcdevtype, TRCDEVTYPE),
2496 coresight_etm4x_reg(trcpidr0, TRCPIDR0),
2497 coresight_etm4x_reg(trcpidr1, TRCPIDR1),
2498 coresight_etm4x_reg(trcpidr2, TRCPIDR2),
2499 coresight_etm4x_reg(trcpidr3, TRCPIDR3),
2500 coresight_etm4x_reg(trcoslsr, TRCOSLSR),
2501 coresight_etm4x_reg(trcconfig, TRCCONFIGR),
2502 coresight_etm4x_reg(trctraceid, TRCTRACEIDR),
2503 coresight_etm4x_reg(trcdevarch, TRCDEVARCH),
2504 NULL,
2505 };
2506
2507 static struct attribute *coresight_etmv4_trcidr_attrs[] = {
2508 coresight_etm4x_reg(trcidr0, TRCIDR0),
2509 coresight_etm4x_reg(trcidr1, TRCIDR1),
2510 coresight_etm4x_reg(trcidr2, TRCIDR2),
2511 coresight_etm4x_reg(trcidr3, TRCIDR3),
2512 coresight_etm4x_reg(trcidr4, TRCIDR4),
2513 coresight_etm4x_reg(trcidr5, TRCIDR5),
2514
2515 coresight_etm4x_reg(trcidr8, TRCIDR8),
2516 coresight_etm4x_reg(trcidr9, TRCIDR9),
2517 coresight_etm4x_reg(trcidr10, TRCIDR10),
2518 coresight_etm4x_reg(trcidr11, TRCIDR11),
2519 coresight_etm4x_reg(trcidr12, TRCIDR12),
2520 coresight_etm4x_reg(trcidr13, TRCIDR13),
2521 NULL,
2522 };
2523
2524 static const struct attribute_group coresight_etmv4_group = {
2525 .attrs = coresight_etmv4_attrs,
2526 };
2527
2528 static const struct attribute_group coresight_etmv4_mgmt_group = {
2529 .is_visible = coresight_etm4x_attr_reg_implemented,
2530 .attrs = coresight_etmv4_mgmt_attrs,
2531 .name = "mgmt",
2532 };
2533
2534 static const struct attribute_group coresight_etmv4_trcidr_group = {
2535 .attrs = coresight_etmv4_trcidr_attrs,
2536 .name = "trcidr",
2537 };
2538
2539 const struct attribute_group *coresight_etmv4_groups[] = {
2540 &coresight_etmv4_group,
2541 &coresight_etmv4_mgmt_group,
2542 &coresight_etmv4_trcidr_group,
2543 NULL,
2544 };