hwtracing/coresight/coresight-etm-perf.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright(C) 2015 Linaro Limited. All rights reserved.
0004  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
0005  */
0006
0007 #ifndef _CORESIGHT_ETM_PERF_H
0008 #define _CORESIGHT_ETM_PERF_H
0009
0010 #include <linux/percpu-defs.h>
0011 #include "coresight-priv.h"
0012
0013 struct coresight_device;
0014 struct cscfg_config_desc;
0015
0016 /*
0017  * In both ETMv3 and v4 the maximum number of address comparator implentable
0018  * is 8.  The actual number is implementation specific and will be checked
0019  * when filters are applied.
0020  */
0021 #define ETM_ADDR_CMP_MAX    8
0022
0023 /**
0024  * struct etm_filter - single instruction range or start/stop configuration.
0025  * @start_addr: The address to start tracing on.
0026  * @stop_addr:  The address to stop tracing on.
0027  * @type:   Is this a range or start/stop filter.
0028  */
0029 struct etm_filter {
0030     unsigned long start_addr;
0031     unsigned long stop_addr;
0032     enum etm_addr_type type;
0033 };
0034
0035 /**
0036  * struct etm_filters - set of filters for a session
0037  * @etm_filter: All the filters for this session.
0038  * @nr_filters: Number of filters
0039  * @ssstatus:   Status of the start/stop logic.
0040  */
0041 struct etm_filters {
0042     struct etm_filter   etm_filter[ETM_ADDR_CMP_MAX];
0043     unsigned int        nr_filters;
0044     bool            ssstatus;
0045 };
0046
0047 /**
0048  * struct etm_event_data - Coresight specifics associated to an event
0049  * @work:       Handle to free allocated memory outside IRQ context.
0050  * @mask:       Hold the CPU(s) this event was set for.
0051  * @snk_config:     The sink configuration.
0052  * @cfg_hash:       The hash id of any coresight config selected.
0053  * @path:       An array of path, each slot for one CPU.
0054  */
0055 struct etm_event_data {
0056     struct work_struct work;
0057     cpumask_t mask;
0058     void *snk_config;
0059     u32 cfg_hash;
0060     struct list_head * __percpu *path;
0061 };
0062
0063 #if IS_ENABLED(CONFIG_CORESIGHT)
0064 int etm_perf_symlink(struct coresight_device *csdev, bool link);
0065 int etm_perf_add_symlink_sink(struct coresight_device *csdev);
0066 void etm_perf_del_symlink_sink(struct coresight_device *csdev);
0067 static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
0068 {
0069     struct etm_event_data *data = perf_get_aux(handle);
0070
0071     if (data)
0072         return data->snk_config;
0073     return NULL;
0074 }
0075 int etm_perf_add_symlink_cscfg(struct device *dev,
0076                    struct cscfg_config_desc *config_desc);
0077 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc);
0078 #else
0079 static inline int etm_perf_symlink(struct coresight_device *csdev, bool link)
0080 { return -EINVAL; }
0081 int etm_perf_add_symlink_sink(struct coresight_device *csdev)
0082 { return -EINVAL; }
0083 void etm_perf_del_symlink_sink(struct coresight_device *csdev) {}
0084 static inline void *etm_perf_sink_config(struct perf_output_handle *handle)
0085 {
0086     return NULL;
0087 }
0088 int etm_perf_add_symlink_cscfg(struct device *dev,
0089                    struct cscfg_config_desc *config_desc)
0090 { return -EINVAL; }
0091 void etm_perf_del_symlink_cscfg(struct cscfg_config_desc *config_desc) {}
0092
0093 #endif /* CONFIG_CORESIGHT */
0094
0095 int __init etm_perf_init(void);
0096 void etm_perf_exit(void);
0097
0098 #endif