0001
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0007 #include <linux/amba/bus.h>
0008 #include <linux/atomic.h>
0009 #include <linux/bits.h>
0010 #include <linux/coresight.h>
0011 #include <linux/cpu_pm.h>
0012 #include <linux/cpuhotplug.h>
0013 #include <linux/device.h>
0014 #include <linux/io.h>
0015 #include <linux/kernel.h>
0016 #include <linux/list.h>
0017 #include <linux/mutex.h>
0018 #include <linux/pm_runtime.h>
0019 #include <linux/property.h>
0020 #include <linux/spinlock.h>
0021
0022 #include "coresight-priv.h"
0023 #include "coresight-cti.h"
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037 static LIST_HEAD(ect_net);
0038
0039
0040 static DEFINE_MUTEX(ect_mutex);
0041
0042 #define csdev_to_cti_drvdata(csdev) \
0043 dev_get_drvdata(csdev->dev.parent)
0044
0045
0046 static int nr_cti_cpu;
0047
0048
0049 static struct cti_drvdata *cti_cpu_drvdata[NR_CPUS];
0050
0051
0052
0053
0054
0055
0056
0057
0058 DEFINE_CORESIGHT_DEVLIST(cti_sys_devs, "cti_sys");
0059
0060
0061 void cti_write_all_hw_regs(struct cti_drvdata *drvdata)
0062 {
0063 struct cti_config *config = &drvdata->config;
0064 int i;
0065
0066 CS_UNLOCK(drvdata->base);
0067
0068
0069 writel_relaxed(0, drvdata->base + CTICONTROL);
0070
0071
0072 for (i = 0; i < config->nr_trig_max; i++) {
0073 writel_relaxed(config->ctiinen[i], drvdata->base + CTIINEN(i));
0074 writel_relaxed(config->ctiouten[i],
0075 drvdata->base + CTIOUTEN(i));
0076 }
0077
0078
0079 writel_relaxed(config->ctigate, drvdata->base + CTIGATE);
0080 writel_relaxed(config->asicctl, drvdata->base + ASICCTL);
0081 writel_relaxed(config->ctiappset, drvdata->base + CTIAPPSET);
0082
0083
0084 writel_relaxed(1, drvdata->base + CTICONTROL);
0085
0086 CS_LOCK(drvdata->base);
0087 }
0088
0089
0090 static int cti_enable_hw(struct cti_drvdata *drvdata)
0091 {
0092 struct cti_config *config = &drvdata->config;
0093 struct device *dev = &drvdata->csdev->dev;
0094 unsigned long flags;
0095 int rc = 0;
0096
0097 pm_runtime_get_sync(dev->parent);
0098 spin_lock_irqsave(&drvdata->spinlock, flags);
0099
0100
0101 if (config->hw_enabled || !config->hw_powered)
0102 goto cti_state_unchanged;
0103
0104
0105 rc = coresight_claim_device(drvdata->csdev);
0106 if (rc)
0107 goto cti_err_not_enabled;
0108
0109 cti_write_all_hw_regs(drvdata);
0110
0111 config->hw_enabled = true;
0112 atomic_inc(&drvdata->config.enable_req_count);
0113 spin_unlock_irqrestore(&drvdata->spinlock, flags);
0114 return rc;
0115
0116 cti_state_unchanged:
0117 atomic_inc(&drvdata->config.enable_req_count);
0118
0119
0120 cti_err_not_enabled:
0121 spin_unlock_irqrestore(&drvdata->spinlock, flags);
0122 pm_runtime_put(dev->parent);
0123 return rc;
0124 }
0125
0126
0127 static void cti_cpuhp_enable_hw(struct cti_drvdata *drvdata)
0128 {
0129 struct cti_config *config = &drvdata->config;
0130
0131 spin_lock(&drvdata->spinlock);
0132 config->hw_powered = true;
0133
0134
0135 if (!atomic_read(&drvdata->config.enable_req_count))
0136 goto cti_hp_not_enabled;
0137
0138
0139 if (coresight_claim_device(drvdata->csdev))
0140 goto cti_hp_not_enabled;
0141
0142 cti_write_all_hw_regs(drvdata);
0143 config->hw_enabled = true;
0144 spin_unlock(&drvdata->spinlock);
0145 return;
0146
0147
0148 cti_hp_not_enabled:
0149 spin_unlock(&drvdata->spinlock);
0150 }
0151
0152
0153 static int cti_disable_hw(struct cti_drvdata *drvdata)
0154 {
0155 struct cti_config *config = &drvdata->config;
0156 struct device *dev = &drvdata->csdev->dev;
0157 struct coresight_device *csdev = drvdata->csdev;
0158
0159 spin_lock(&drvdata->spinlock);
0160
0161
0162 if (atomic_dec_return(&drvdata->config.enable_req_count) > 0)
0163 goto cti_not_disabled;
0164
0165
0166 if (!config->hw_enabled || !config->hw_powered)
0167 goto cti_not_disabled;
0168
0169 CS_UNLOCK(drvdata->base);
0170
0171
0172 writel_relaxed(0, drvdata->base + CTICONTROL);
0173 config->hw_enabled = false;
0174
0175 coresight_disclaim_device_unlocked(csdev);
0176 CS_LOCK(drvdata->base);
0177 spin_unlock(&drvdata->spinlock);
0178 pm_runtime_put(dev->parent);
0179 return 0;
0180
0181
0182 cti_not_disabled:
0183 spin_unlock(&drvdata->spinlock);
0184 return 0;
0185 }
0186
0187 void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value)
0188 {
0189 CS_UNLOCK(drvdata->base);
0190 writel_relaxed(value, drvdata->base + offset);
0191 CS_LOCK(drvdata->base);
0192 }
0193
0194 void cti_write_intack(struct device *dev, u32 ackval)
0195 {
0196 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
0197 struct cti_config *config = &drvdata->config;
0198
0199 spin_lock(&drvdata->spinlock);
0200
0201 if (cti_active(config))
0202 cti_write_single_reg(drvdata, CTIINTACK, ackval);
0203 spin_unlock(&drvdata->spinlock);
0204 }
0205
0206
0207
0208
0209
0210 #define CTI_DEVID_MAXTRIGS(devid_val) ((int) BMVAL(devid_val, 8, 15))
0211
0212
0213 #define CTI_DEVID_CTMCHANNELS(devid_val) ((int) BMVAL(devid_val, 16, 19))
0214
0215 static void cti_set_default_config(struct device *dev,
0216 struct cti_drvdata *drvdata)
0217 {
0218 struct cti_config *config = &drvdata->config;
0219 u32 devid;
0220
0221 devid = readl_relaxed(drvdata->base + CORESIGHT_DEVID);
0222 config->nr_trig_max = CTI_DEVID_MAXTRIGS(devid);
0223
0224
0225
0226
0227
0228 if (config->nr_trig_max > CTIINOUTEN_MAX) {
0229 dev_warn_once(dev,
0230 "Limiting HW MaxTrig value(%d) to driver max(%d)\n",
0231 config->nr_trig_max, CTIINOUTEN_MAX);
0232 config->nr_trig_max = CTIINOUTEN_MAX;
0233 }
0234
0235 config->nr_ctm_channels = CTI_DEVID_CTMCHANNELS(devid);
0236
0237
0238 config->trig_filter_enable = true;
0239 config->ctigate = GENMASK(config->nr_ctm_channels - 1, 0);
0240 atomic_set(&config->enable_req_count, 0);
0241 }
0242
0243
0244
0245
0246
0247 int cti_add_connection_entry(struct device *dev, struct cti_drvdata *drvdata,
0248 struct cti_trig_con *tc,
0249 struct coresight_device *csdev,
0250 const char *assoc_dev_name)
0251 {
0252 struct cti_device *cti_dev = &drvdata->ctidev;
0253
0254 tc->con_dev = csdev;
0255
0256
0257
0258
0259 if (csdev)
0260 tc->con_dev_name = dev_name(&csdev->dev);
0261 else if (assoc_dev_name != NULL) {
0262 tc->con_dev_name = devm_kstrdup(dev,
0263 assoc_dev_name, GFP_KERNEL);
0264 if (!tc->con_dev_name)
0265 return -ENOMEM;
0266 }
0267 list_add_tail(&tc->node, &cti_dev->trig_cons);
0268 cti_dev->nr_trig_con++;
0269
0270
0271 drvdata->config.trig_in_use |= tc->con_in->used_mask;
0272 drvdata->config.trig_out_use |= tc->con_out->used_mask;
0273
0274 return 0;
0275 }
0276
0277
0278 struct cti_trig_con *cti_allocate_trig_con(struct device *dev, int in_sigs,
0279 int out_sigs)
0280 {
0281 struct cti_trig_con *tc = NULL;
0282 struct cti_trig_grp *in = NULL, *out = NULL;
0283
0284 tc = devm_kzalloc(dev, sizeof(struct cti_trig_con), GFP_KERNEL);
0285 if (!tc)
0286 return tc;
0287
0288 in = devm_kzalloc(dev,
0289 offsetof(struct cti_trig_grp, sig_types[in_sigs]),
0290 GFP_KERNEL);
0291 if (!in)
0292 return NULL;
0293
0294 out = devm_kzalloc(dev,
0295 offsetof(struct cti_trig_grp, sig_types[out_sigs]),
0296 GFP_KERNEL);
0297 if (!out)
0298 return NULL;
0299
0300 tc->con_in = in;
0301 tc->con_out = out;
0302 tc->con_in->nr_sigs = in_sigs;
0303 tc->con_out->nr_sigs = out_sigs;
0304 return tc;
0305 }
0306
0307
0308
0309
0310
0311 int cti_add_default_connection(struct device *dev, struct cti_drvdata *drvdata)
0312 {
0313 int ret = 0;
0314 int n_trigs = drvdata->config.nr_trig_max;
0315 u32 n_trig_mask = GENMASK(n_trigs - 1, 0);
0316 struct cti_trig_con *tc = NULL;
0317
0318
0319
0320
0321
0322 tc = cti_allocate_trig_con(dev, n_trigs, n_trigs);
0323 if (!tc)
0324 return -ENOMEM;
0325
0326 tc->con_in->used_mask = n_trig_mask;
0327 tc->con_out->used_mask = n_trig_mask;
0328 ret = cti_add_connection_entry(dev, drvdata, tc, NULL, "default");
0329 return ret;
0330 }
0331
0332
0333
0334 int cti_channel_trig_op(struct device *dev, enum cti_chan_op op,
0335 enum cti_trig_dir direction, u32 channel_idx,
0336 u32 trigger_idx)
0337 {
0338 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
0339 struct cti_config *config = &drvdata->config;
0340 u32 trig_bitmask;
0341 u32 chan_bitmask;
0342 u32 reg_value;
0343 int reg_offset;
0344
0345
0346 if ((channel_idx >= config->nr_ctm_channels) ||
0347 (trigger_idx >= config->nr_trig_max))
0348 return -EINVAL;
0349
0350 trig_bitmask = BIT(trigger_idx);
0351
0352
0353 if (direction == CTI_TRIG_IN) {
0354 if (!(trig_bitmask & config->trig_in_use))
0355 return -EINVAL;
0356 } else {
0357 if (!(trig_bitmask & config->trig_out_use))
0358 return -EINVAL;
0359
0360 if ((config->trig_filter_enable) &&
0361 (config->trig_out_filter & trig_bitmask))
0362 return -EINVAL;
0363 }
0364
0365
0366 chan_bitmask = BIT(channel_idx);
0367 reg_offset = (direction == CTI_TRIG_IN ? CTIINEN(trigger_idx) :
0368 CTIOUTEN(trigger_idx));
0369
0370 spin_lock(&drvdata->spinlock);
0371
0372
0373 reg_value = direction == CTI_TRIG_IN ? config->ctiinen[trigger_idx] :
0374 config->ctiouten[trigger_idx];
0375 if (op == CTI_CHAN_ATTACH)
0376 reg_value |= chan_bitmask;
0377 else
0378 reg_value &= ~chan_bitmask;
0379
0380
0381 if (direction == CTI_TRIG_IN)
0382 config->ctiinen[trigger_idx] = reg_value;
0383 else
0384 config->ctiouten[trigger_idx] = reg_value;
0385
0386
0387 if (cti_active(config))
0388 cti_write_single_reg(drvdata, reg_offset, reg_value);
0389 spin_unlock(&drvdata->spinlock);
0390 return 0;
0391 }
0392
0393 int cti_channel_gate_op(struct device *dev, enum cti_chan_gate_op op,
0394 u32 channel_idx)
0395 {
0396 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
0397 struct cti_config *config = &drvdata->config;
0398 u32 chan_bitmask;
0399 u32 reg_value;
0400 int err = 0;
0401
0402 if (channel_idx >= config->nr_ctm_channels)
0403 return -EINVAL;
0404
0405 chan_bitmask = BIT(channel_idx);
0406
0407 spin_lock(&drvdata->spinlock);
0408 reg_value = config->ctigate;
0409 switch (op) {
0410 case CTI_GATE_CHAN_ENABLE:
0411 reg_value |= chan_bitmask;
0412 break;
0413
0414 case CTI_GATE_CHAN_DISABLE:
0415 reg_value &= ~chan_bitmask;
0416 break;
0417
0418 default:
0419 err = -EINVAL;
0420 break;
0421 }
0422 if (err == 0) {
0423 config->ctigate = reg_value;
0424 if (cti_active(config))
0425 cti_write_single_reg(drvdata, CTIGATE, reg_value);
0426 }
0427 spin_unlock(&drvdata->spinlock);
0428 return err;
0429 }
0430
0431 int cti_channel_setop(struct device *dev, enum cti_chan_set_op op,
0432 u32 channel_idx)
0433 {
0434 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
0435 struct cti_config *config = &drvdata->config;
0436 u32 chan_bitmask;
0437 u32 reg_value;
0438 u32 reg_offset;
0439 int err = 0;
0440
0441 if (channel_idx >= config->nr_ctm_channels)
0442 return -EINVAL;
0443
0444 chan_bitmask = BIT(channel_idx);
0445
0446 spin_lock(&drvdata->spinlock);
0447 reg_value = config->ctiappset;
0448 switch (op) {
0449 case CTI_CHAN_SET:
0450 config->ctiappset |= chan_bitmask;
0451 reg_value = config->ctiappset;
0452 reg_offset = CTIAPPSET;
0453 break;
0454
0455 case CTI_CHAN_CLR:
0456 config->ctiappset &= ~chan_bitmask;
0457 reg_value = chan_bitmask;
0458 reg_offset = CTIAPPCLEAR;
0459 break;
0460
0461 case CTI_CHAN_PULSE:
0462 config->ctiappset &= ~chan_bitmask;
0463 reg_value = chan_bitmask;
0464 reg_offset = CTIAPPPULSE;
0465 break;
0466
0467 default:
0468 err = -EINVAL;
0469 break;
0470 }
0471
0472 if ((err == 0) && cti_active(config))
0473 cti_write_single_reg(drvdata, reg_offset, reg_value);
0474 spin_unlock(&drvdata->spinlock);
0475
0476 return err;
0477 }
0478
0479 static bool cti_add_sysfs_link(struct cti_drvdata *drvdata,
0480 struct cti_trig_con *tc)
0481 {
0482 struct coresight_sysfs_link link_info;
0483 int link_err = 0;
0484
0485 link_info.orig = drvdata->csdev;
0486 link_info.orig_name = tc->con_dev_name;
0487 link_info.target = tc->con_dev;
0488 link_info.target_name = dev_name(&drvdata->csdev->dev);
0489
0490 link_err = coresight_add_sysfs_link(&link_info);
0491 if (link_err)
0492 dev_warn(&drvdata->csdev->dev,
0493 "Failed to set CTI sysfs link %s<=>%s\n",
0494 link_info.orig_name, link_info.target_name);
0495 return !link_err;
0496 }
0497
0498 static void cti_remove_sysfs_link(struct cti_drvdata *drvdata,
0499 struct cti_trig_con *tc)
0500 {
0501 struct coresight_sysfs_link link_info;
0502
0503 link_info.orig = drvdata->csdev;
0504 link_info.orig_name = tc->con_dev_name;
0505 link_info.target = tc->con_dev;
0506 link_info.target_name = dev_name(&drvdata->csdev->dev);
0507 coresight_remove_sysfs_link(&link_info);
0508 }
0509
0510
0511
0512
0513
0514
0515 static bool
0516 cti_match_fixup_csdev(struct cti_device *ctidev, const char *node_name,
0517 struct coresight_device *csdev)
0518 {
0519 struct cti_trig_con *tc;
0520 struct cti_drvdata *drvdata = container_of(ctidev, struct cti_drvdata,
0521 ctidev);
0522
0523 list_for_each_entry(tc, &ctidev->trig_cons, node) {
0524 if (tc->con_dev_name) {
0525 if (!strcmp(node_name, tc->con_dev_name)) {
0526
0527 tc->con_dev_name = dev_name(&csdev->dev);
0528 tc->con_dev = csdev;
0529
0530 if (cti_add_sysfs_link(drvdata, tc))
0531 return true;
0532
0533 tc->con_dev = NULL;
0534 break;
0535 }
0536 }
0537 }
0538 return false;
0539 }
0540
0541
0542
0543
0544
0545
0546 static void cti_add_assoc_to_csdev(struct coresight_device *csdev)
0547 {
0548 struct cti_drvdata *ect_item;
0549 struct cti_device *ctidev;
0550 const char *node_name = NULL;
0551
0552
0553 mutex_lock(&ect_mutex);
0554
0555
0556 if ((csdev->type == CORESIGHT_DEV_TYPE_ECT) || list_empty(&ect_net))
0557 goto cti_add_done;
0558
0559
0560 node_name = cti_plat_get_node_name(dev_fwnode(csdev->dev.parent));
0561 if (!node_name)
0562 goto cti_add_done;
0563
0564
0565 list_for_each_entry(ect_item, &ect_net, node) {
0566 ctidev = &ect_item->ctidev;
0567 if (cti_match_fixup_csdev(ctidev, node_name, csdev)) {
0568
0569
0570
0571
0572 csdev->ect_dev = ect_item->csdev;
0573 break;
0574 }
0575 }
0576 cti_add_done:
0577 mutex_unlock(&ect_mutex);
0578 }
0579
0580
0581
0582
0583
0584 static void cti_remove_assoc_from_csdev(struct coresight_device *csdev)
0585 {
0586 struct cti_drvdata *ctidrv;
0587 struct cti_trig_con *tc;
0588 struct cti_device *ctidev;
0589
0590 mutex_lock(&ect_mutex);
0591 if (csdev->ect_dev) {
0592 ctidrv = csdev_to_cti_drvdata(csdev->ect_dev);
0593 ctidev = &ctidrv->ctidev;
0594 list_for_each_entry(tc, &ctidev->trig_cons, node) {
0595 if (tc->con_dev == csdev) {
0596 cti_remove_sysfs_link(ctidrv, tc);
0597 tc->con_dev = NULL;
0598 break;
0599 }
0600 }
0601 csdev->ect_dev = NULL;
0602 }
0603 mutex_unlock(&ect_mutex);
0604 }
0605
0606
0607
0608
0609
0610 static struct cti_assoc_op cti_assoc_ops = {
0611 .add = cti_add_assoc_to_csdev,
0612 .remove = cti_remove_assoc_from_csdev
0613 };
0614
0615
0616
0617
0618
0619
0620 static void cti_update_conn_xrefs(struct cti_drvdata *drvdata)
0621 {
0622 struct cti_trig_con *tc;
0623 struct cti_device *ctidev = &drvdata->ctidev;
0624
0625 list_for_each_entry(tc, &ctidev->trig_cons, node) {
0626 if (tc->con_dev) {
0627
0628 if (cti_add_sysfs_link(drvdata, tc))
0629
0630 coresight_set_assoc_ectdev_mutex(tc->con_dev,
0631 drvdata->csdev);
0632 else
0633
0634 tc->con_dev = NULL;
0635 }
0636 }
0637 }
0638
0639 static void cti_remove_conn_xrefs(struct cti_drvdata *drvdata)
0640 {
0641 struct cti_trig_con *tc;
0642 struct cti_device *ctidev = &drvdata->ctidev;
0643
0644 list_for_each_entry(tc, &ctidev->trig_cons, node) {
0645 if (tc->con_dev) {
0646 coresight_set_assoc_ectdev_mutex(tc->con_dev,
0647 NULL);
0648 cti_remove_sysfs_link(drvdata, tc);
0649 tc->con_dev = NULL;
0650 }
0651 }
0652 }
0653
0654
0655 static int cti_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd,
0656 void *v)
0657 {
0658 struct cti_drvdata *drvdata;
0659 struct coresight_device *csdev;
0660 unsigned int cpu = smp_processor_id();
0661 int notify_res = NOTIFY_OK;
0662
0663 if (!cti_cpu_drvdata[cpu])
0664 return NOTIFY_OK;
0665
0666 drvdata = cti_cpu_drvdata[cpu];
0667 csdev = drvdata->csdev;
0668
0669 if (WARN_ON_ONCE(drvdata->ctidev.cpu != cpu))
0670 return NOTIFY_BAD;
0671
0672 spin_lock(&drvdata->spinlock);
0673
0674 switch (cmd) {
0675 case CPU_PM_ENTER:
0676
0677 drvdata->config.hw_powered = false;
0678 if (drvdata->config.hw_enabled)
0679 coresight_disclaim_device(csdev);
0680 break;
0681
0682 case CPU_PM_ENTER_FAILED:
0683 drvdata->config.hw_powered = true;
0684 if (drvdata->config.hw_enabled) {
0685 if (coresight_claim_device(csdev))
0686 drvdata->config.hw_enabled = false;
0687 }
0688 break;
0689
0690 case CPU_PM_EXIT:
0691
0692 drvdata->config.hw_powered = true;
0693 drvdata->config.hw_enabled = false;
0694
0695
0696 if (atomic_read(&drvdata->config.enable_req_count)) {
0697
0698 if (coresight_claim_device(csdev))
0699 goto cti_notify_exit;
0700
0701 drvdata->config.hw_enabled = true;
0702 cti_write_all_hw_regs(drvdata);
0703 }
0704 break;
0705
0706 default:
0707 notify_res = NOTIFY_DONE;
0708 break;
0709 }
0710
0711 cti_notify_exit:
0712 spin_unlock(&drvdata->spinlock);
0713 return notify_res;
0714 }
0715
0716 static struct notifier_block cti_cpu_pm_nb = {
0717 .notifier_call = cti_cpu_pm_notify,
0718 };
0719
0720
0721 static int cti_starting_cpu(unsigned int cpu)
0722 {
0723 struct cti_drvdata *drvdata = cti_cpu_drvdata[cpu];
0724
0725 if (!drvdata)
0726 return 0;
0727
0728 cti_cpuhp_enable_hw(drvdata);
0729 return 0;
0730 }
0731
0732 static int cti_dying_cpu(unsigned int cpu)
0733 {
0734 struct cti_drvdata *drvdata = cti_cpu_drvdata[cpu];
0735
0736 if (!drvdata)
0737 return 0;
0738
0739 spin_lock(&drvdata->spinlock);
0740 drvdata->config.hw_powered = false;
0741 if (drvdata->config.hw_enabled)
0742 coresight_disclaim_device(drvdata->csdev);
0743 spin_unlock(&drvdata->spinlock);
0744 return 0;
0745 }
0746
0747 static int cti_pm_setup(struct cti_drvdata *drvdata)
0748 {
0749 int ret;
0750
0751 if (drvdata->ctidev.cpu == -1)
0752 return 0;
0753
0754 if (nr_cti_cpu)
0755 goto done;
0756
0757 cpus_read_lock();
0758 ret = cpuhp_setup_state_nocalls_cpuslocked(
0759 CPUHP_AP_ARM_CORESIGHT_CTI_STARTING,
0760 "arm/coresight_cti:starting",
0761 cti_starting_cpu, cti_dying_cpu);
0762 if (ret) {
0763 cpus_read_unlock();
0764 return ret;
0765 }
0766
0767 ret = cpu_pm_register_notifier(&cti_cpu_pm_nb);
0768 cpus_read_unlock();
0769 if (ret) {
0770 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING);
0771 return ret;
0772 }
0773
0774 done:
0775 nr_cti_cpu++;
0776 cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata;
0777
0778 return 0;
0779 }
0780
0781
0782 static void cti_pm_release(struct cti_drvdata *drvdata)
0783 {
0784 if (drvdata->ctidev.cpu == -1)
0785 return;
0786
0787 cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL;
0788 if (--nr_cti_cpu == 0) {
0789 cpu_pm_unregister_notifier(&cti_cpu_pm_nb);
0790 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING);
0791 }
0792 }
0793
0794
0795 int cti_enable(struct coresight_device *csdev)
0796 {
0797 struct cti_drvdata *drvdata = csdev_to_cti_drvdata(csdev);
0798
0799 return cti_enable_hw(drvdata);
0800 }
0801
0802 int cti_disable(struct coresight_device *csdev)
0803 {
0804 struct cti_drvdata *drvdata = csdev_to_cti_drvdata(csdev);
0805
0806 return cti_disable_hw(drvdata);
0807 }
0808
0809 static const struct coresight_ops_ect cti_ops_ect = {
0810 .enable = cti_enable,
0811 .disable = cti_disable,
0812 };
0813
0814 static const struct coresight_ops cti_ops = {
0815 .ect_ops = &cti_ops_ect,
0816 };
0817
0818
0819
0820
0821
0822 static void cti_device_release(struct device *dev)
0823 {
0824 struct cti_drvdata *drvdata = dev_get_drvdata(dev->parent);
0825 struct cti_drvdata *ect_item, *ect_tmp;
0826
0827 mutex_lock(&ect_mutex);
0828 cti_pm_release(drvdata);
0829
0830
0831 list_for_each_entry_safe(ect_item, ect_tmp, &ect_net, node) {
0832 if (ect_item == drvdata) {
0833 list_del(&ect_item->node);
0834 break;
0835 }
0836 }
0837 mutex_unlock(&ect_mutex);
0838
0839 if (drvdata->csdev_release)
0840 drvdata->csdev_release(dev);
0841 }
0842 static void cti_remove(struct amba_device *adev)
0843 {
0844 struct cti_drvdata *drvdata = dev_get_drvdata(&adev->dev);
0845
0846 mutex_lock(&ect_mutex);
0847 cti_remove_conn_xrefs(drvdata);
0848 mutex_unlock(&ect_mutex);
0849
0850 coresight_unregister(drvdata->csdev);
0851 }
0852
0853 static int cti_probe(struct amba_device *adev, const struct amba_id *id)
0854 {
0855 int ret = 0;
0856 void __iomem *base;
0857 struct device *dev = &adev->dev;
0858 struct cti_drvdata *drvdata = NULL;
0859 struct coresight_desc cti_desc;
0860 struct coresight_platform_data *pdata = NULL;
0861 struct resource *res = &adev->res;
0862
0863
0864 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
0865 if (!drvdata)
0866 return -ENOMEM;
0867
0868
0869 base = devm_ioremap_resource(dev, res);
0870 if (IS_ERR(base))
0871 return PTR_ERR(base);
0872
0873 drvdata->base = base;
0874 cti_desc.access = CSDEV_ACCESS_IOMEM(base);
0875
0876 dev_set_drvdata(dev, drvdata);
0877
0878
0879 drvdata->ctidev.cpu = -1;
0880 drvdata->ctidev.nr_trig_con = 0;
0881 drvdata->ctidev.ctm_id = 0;
0882 INIT_LIST_HEAD(&drvdata->ctidev.trig_cons);
0883
0884 spin_lock_init(&drvdata->spinlock);
0885
0886
0887 cti_set_default_config(dev, drvdata);
0888
0889 pdata = coresight_cti_get_platform_data(dev);
0890 if (IS_ERR(pdata)) {
0891 dev_err(dev, "coresight_cti_get_platform_data err\n");
0892 return PTR_ERR(pdata);
0893 }
0894
0895
0896 drvdata->config.hw_powered = true;
0897
0898
0899 if (drvdata->ctidev.cpu >= 0)
0900 cti_desc.name = devm_kasprintf(dev, GFP_KERNEL, "cti_cpu%d",
0901 drvdata->ctidev.cpu);
0902 else
0903 cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev);
0904 if (!cti_desc.name)
0905 return -ENOMEM;
0906
0907
0908 ret = cti_pm_setup(drvdata);
0909 if (ret)
0910 return ret;
0911
0912
0913 ret = cti_create_cons_sysfs(dev, drvdata);
0914 if (ret) {
0915 dev_err(dev, "%s: create dynamic sysfs entries failed\n",
0916 cti_desc.name);
0917 goto pm_release;
0918 }
0919
0920
0921 cti_desc.pdata = pdata;
0922 cti_desc.type = CORESIGHT_DEV_TYPE_ECT;
0923 cti_desc.subtype.ect_subtype = CORESIGHT_DEV_SUBTYPE_ECT_CTI;
0924 cti_desc.ops = &cti_ops;
0925 cti_desc.groups = drvdata->ctidev.con_groups;
0926 cti_desc.dev = dev;
0927 drvdata->csdev = coresight_register(&cti_desc);
0928 if (IS_ERR(drvdata->csdev)) {
0929 ret = PTR_ERR(drvdata->csdev);
0930 goto pm_release;
0931 }
0932
0933
0934 mutex_lock(&ect_mutex);
0935 list_add(&drvdata->node, &ect_net);
0936
0937 cti_update_conn_xrefs(drvdata);
0938 mutex_unlock(&ect_mutex);
0939
0940
0941 drvdata->csdev_release = drvdata->csdev->dev.release;
0942 drvdata->csdev->dev.release = cti_device_release;
0943
0944
0945 pm_runtime_put(&adev->dev);
0946 dev_info(&drvdata->csdev->dev, "CTI initialized\n");
0947 return 0;
0948
0949 pm_release:
0950 cti_pm_release(drvdata);
0951 return ret;
0952 }
0953
0954 static struct amba_cs_uci_id uci_id_cti[] = {
0955 {
0956
0957 .devarch = 0x47701a14,
0958 .devarch_mask = 0xfff0ffff,
0959 .devtype = 0x00000014,
0960 }
0961 };
0962
0963 static const struct amba_id cti_ids[] = {
0964 CS_AMBA_ID(0x000bb906),
0965 CS_AMBA_ID(0x000bb922),
0966 CS_AMBA_ID(0x000bb9a8),
0967 CS_AMBA_ID(0x000bb9aa),
0968 CS_AMBA_UCI_ID(0x000bb9da, uci_id_cti),
0969 CS_AMBA_UCI_ID(0x000bb9ed, uci_id_cti),
0970 { 0, 0},
0971 };
0972
0973 MODULE_DEVICE_TABLE(amba, cti_ids);
0974
0975 static struct amba_driver cti_driver = {
0976 .drv = {
0977 .name = "coresight-cti",
0978 .owner = THIS_MODULE,
0979 .suppress_bind_attrs = true,
0980 },
0981 .probe = cti_probe,
0982 .remove = cti_remove,
0983 .id_table = cti_ids,
0984 };
0985
0986 static int __init cti_init(void)
0987 {
0988 int ret;
0989
0990 ret = amba_driver_register(&cti_driver);
0991 if (ret)
0992 pr_info("Error registering cti driver\n");
0993 coresight_set_cti_ops(&cti_assoc_ops);
0994 return ret;
0995 }
0996
0997 static void __exit cti_exit(void)
0998 {
0999 coresight_remove_cti_ops();
1000 amba_driver_unregister(&cti_driver);
1001 }
1002
1003 module_init(cti_init);
1004 module_exit(cti_exit);
1005
1006 MODULE_AUTHOR("Mike Leach <mike.leach@linaro.org>");
1007 MODULE_DESCRIPTION("Arm CoreSight CTI Driver");
1008 MODULE_LICENSE("GPL v2");