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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (c) 2012, The Linux Foundation. All rights reserved.
0004  */
0005 
0006 #include <linux/kernel.h>
0007 #include <linux/init.h>
0008 #include <linux/types.h>
0009 #include <linux/device.h>
0010 #include <linux/io.h>
0011 #include <linux/err.h>
0012 #include <linux/export.h>
0013 #include <linux/slab.h>
0014 #include <linux/stringhash.h>
0015 #include <linux/mutex.h>
0016 #include <linux/clk.h>
0017 #include <linux/coresight.h>
0018 #include <linux/of_platform.h>
0019 #include <linux/delay.h>
0020 #include <linux/pm_runtime.h>
0021 
0022 #include "coresight-etm-perf.h"
0023 #include "coresight-priv.h"
0024 #include "coresight-syscfg.h"
0025 
0026 static DEFINE_MUTEX(coresight_mutex);
0027 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
0028 
0029 /**
0030  * struct coresight_node - elements of a path, from source to sink
0031  * @csdev:  Address of an element.
0032  * @link:   hook to the list.
0033  */
0034 struct coresight_node {
0035     struct coresight_device *csdev;
0036     struct list_head link;
0037 };
0038 
0039 /*
0040  * When operating Coresight drivers from the sysFS interface, only a single
0041  * path can exist from a tracer (associated to a CPU) to a sink.
0042  */
0043 static DEFINE_PER_CPU(struct list_head *, tracer_path);
0044 
0045 /*
0046  * As of this writing only a single STM can be found in CS topologies.  Since
0047  * there is no way to know if we'll ever see more and what kind of
0048  * configuration they will enact, for the time being only define a single path
0049  * for STM.
0050  */
0051 static struct list_head *stm_path;
0052 
0053 /*
0054  * When losing synchronisation a new barrier packet needs to be inserted at the
0055  * beginning of the data collected in a buffer.  That way the decoder knows that
0056  * it needs to look for another sync sequence.
0057  */
0058 const u32 coresight_barrier_pkt[4] = {0x7fffffff, 0x7fffffff, 0x7fffffff, 0x7fffffff};
0059 EXPORT_SYMBOL_GPL(coresight_barrier_pkt);
0060 
0061 static const struct cti_assoc_op *cti_assoc_ops;
0062 
0063 void coresight_set_cti_ops(const struct cti_assoc_op *cti_op)
0064 {
0065     cti_assoc_ops = cti_op;
0066 }
0067 EXPORT_SYMBOL_GPL(coresight_set_cti_ops);
0068 
0069 void coresight_remove_cti_ops(void)
0070 {
0071     cti_assoc_ops = NULL;
0072 }
0073 EXPORT_SYMBOL_GPL(coresight_remove_cti_ops);
0074 
0075 void coresight_set_percpu_sink(int cpu, struct coresight_device *csdev)
0076 {
0077     per_cpu(csdev_sink, cpu) = csdev;
0078 }
0079 EXPORT_SYMBOL_GPL(coresight_set_percpu_sink);
0080 
0081 struct coresight_device *coresight_get_percpu_sink(int cpu)
0082 {
0083     return per_cpu(csdev_sink, cpu);
0084 }
0085 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
0086 
0087 static int coresight_id_match(struct device *dev, void *data)
0088 {
0089     int trace_id, i_trace_id;
0090     struct coresight_device *csdev, *i_csdev;
0091 
0092     csdev = data;
0093     i_csdev = to_coresight_device(dev);
0094 
0095     /*
0096      * No need to care about oneself and components that are not
0097      * sources or not enabled
0098      */
0099     if (i_csdev == csdev || !i_csdev->enable ||
0100         i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
0101         return 0;
0102 
0103     /* Get the source ID for both components */
0104     trace_id = source_ops(csdev)->trace_id(csdev);
0105     i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
0106 
0107     /* All you need is one */
0108     if (trace_id == i_trace_id)
0109         return 1;
0110 
0111     return 0;
0112 }
0113 
0114 static int coresight_source_is_unique(struct coresight_device *csdev)
0115 {
0116     int trace_id = source_ops(csdev)->trace_id(csdev);
0117 
0118     /* this shouldn't happen */
0119     if (trace_id < 0)
0120         return 0;
0121 
0122     return !bus_for_each_dev(&coresight_bustype, NULL,
0123                  csdev, coresight_id_match);
0124 }
0125 
0126 static int coresight_find_link_inport(struct coresight_device *csdev,
0127                       struct coresight_device *parent)
0128 {
0129     int i;
0130     struct coresight_connection *conn;
0131 
0132     for (i = 0; i < parent->pdata->nr_outport; i++) {
0133         conn = &parent->pdata->conns[i];
0134         if (conn->child_dev == csdev)
0135             return conn->child_port;
0136     }
0137 
0138     dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
0139         dev_name(&parent->dev), dev_name(&csdev->dev));
0140 
0141     return -ENODEV;
0142 }
0143 
0144 static int coresight_find_link_outport(struct coresight_device *csdev,
0145                        struct coresight_device *child)
0146 {
0147     int i;
0148     struct coresight_connection *conn;
0149 
0150     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0151         conn = &csdev->pdata->conns[i];
0152         if (conn->child_dev == child)
0153             return conn->outport;
0154     }
0155 
0156     dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
0157         dev_name(&csdev->dev), dev_name(&child->dev));
0158 
0159     return -ENODEV;
0160 }
0161 
0162 static inline u32 coresight_read_claim_tags(struct coresight_device *csdev)
0163 {
0164     return csdev_access_relaxed_read32(&csdev->access, CORESIGHT_CLAIMCLR);
0165 }
0166 
0167 static inline bool coresight_is_claimed_self_hosted(struct coresight_device *csdev)
0168 {
0169     return coresight_read_claim_tags(csdev) == CORESIGHT_CLAIM_SELF_HOSTED;
0170 }
0171 
0172 static inline bool coresight_is_claimed_any(struct coresight_device *csdev)
0173 {
0174     return coresight_read_claim_tags(csdev) != 0;
0175 }
0176 
0177 static inline void coresight_set_claim_tags(struct coresight_device *csdev)
0178 {
0179     csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED,
0180                      CORESIGHT_CLAIMSET);
0181     isb();
0182 }
0183 
0184 static inline void coresight_clear_claim_tags(struct coresight_device *csdev)
0185 {
0186     csdev_access_relaxed_write32(&csdev->access, CORESIGHT_CLAIM_SELF_HOSTED,
0187                      CORESIGHT_CLAIMCLR);
0188     isb();
0189 }
0190 
0191 /*
0192  * coresight_claim_device_unlocked : Claim the device for self-hosted usage
0193  * to prevent an external tool from touching this device. As per PSCI
0194  * standards, section "Preserving the execution context" => "Debug and Trace
0195  * save and Restore", DBGCLAIM[1] is reserved for Self-hosted debug/trace and
0196  * DBGCLAIM[0] is reserved for external tools.
0197  *
0198  * Called with CS_UNLOCKed for the component.
0199  * Returns : 0 on success
0200  */
0201 int coresight_claim_device_unlocked(struct coresight_device *csdev)
0202 {
0203     if (WARN_ON(!csdev))
0204         return -EINVAL;
0205 
0206     if (coresight_is_claimed_any(csdev))
0207         return -EBUSY;
0208 
0209     coresight_set_claim_tags(csdev);
0210     if (coresight_is_claimed_self_hosted(csdev))
0211         return 0;
0212     /* There was a race setting the tags, clean up and fail */
0213     coresight_clear_claim_tags(csdev);
0214     return -EBUSY;
0215 }
0216 EXPORT_SYMBOL_GPL(coresight_claim_device_unlocked);
0217 
0218 int coresight_claim_device(struct coresight_device *csdev)
0219 {
0220     int rc;
0221 
0222     if (WARN_ON(!csdev))
0223         return -EINVAL;
0224 
0225     CS_UNLOCK(csdev->access.base);
0226     rc = coresight_claim_device_unlocked(csdev);
0227     CS_LOCK(csdev->access.base);
0228 
0229     return rc;
0230 }
0231 EXPORT_SYMBOL_GPL(coresight_claim_device);
0232 
0233 /*
0234  * coresight_disclaim_device_unlocked : Clear the claim tags for the device.
0235  * Called with CS_UNLOCKed for the component.
0236  */
0237 void coresight_disclaim_device_unlocked(struct coresight_device *csdev)
0238 {
0239 
0240     if (WARN_ON(!csdev))
0241         return;
0242 
0243     if (coresight_is_claimed_self_hosted(csdev))
0244         coresight_clear_claim_tags(csdev);
0245     else
0246         /*
0247          * The external agent may have not honoured our claim
0248          * and has manipulated it. Or something else has seriously
0249          * gone wrong in our driver.
0250          */
0251         WARN_ON_ONCE(1);
0252 }
0253 EXPORT_SYMBOL_GPL(coresight_disclaim_device_unlocked);
0254 
0255 void coresight_disclaim_device(struct coresight_device *csdev)
0256 {
0257     if (WARN_ON(!csdev))
0258         return;
0259 
0260     CS_UNLOCK(csdev->access.base);
0261     coresight_disclaim_device_unlocked(csdev);
0262     CS_LOCK(csdev->access.base);
0263 }
0264 EXPORT_SYMBOL_GPL(coresight_disclaim_device);
0265 
0266 /* enable or disable an associated CTI device of the supplied CS device */
0267 static int
0268 coresight_control_assoc_ectdev(struct coresight_device *csdev, bool enable)
0269 {
0270     int ect_ret = 0;
0271     struct coresight_device *ect_csdev = csdev->ect_dev;
0272     struct module *mod;
0273 
0274     if (!ect_csdev)
0275         return 0;
0276     if ((!ect_ops(ect_csdev)->enable) || (!ect_ops(ect_csdev)->disable))
0277         return 0;
0278 
0279     mod = ect_csdev->dev.parent->driver->owner;
0280     if (enable) {
0281         if (try_module_get(mod)) {
0282             ect_ret = ect_ops(ect_csdev)->enable(ect_csdev);
0283             if (ect_ret) {
0284                 module_put(mod);
0285             } else {
0286                 get_device(ect_csdev->dev.parent);
0287                 csdev->ect_enabled = true;
0288             }
0289         } else
0290             ect_ret = -ENODEV;
0291     } else {
0292         if (csdev->ect_enabled) {
0293             ect_ret = ect_ops(ect_csdev)->disable(ect_csdev);
0294             put_device(ect_csdev->dev.parent);
0295             module_put(mod);
0296             csdev->ect_enabled = false;
0297         }
0298     }
0299 
0300     /* output warning if ECT enable is preventing trace operation */
0301     if (ect_ret)
0302         dev_info(&csdev->dev, "Associated ECT device (%s) %s failed\n",
0303              dev_name(&ect_csdev->dev),
0304              enable ? "enable" : "disable");
0305     return ect_ret;
0306 }
0307 
0308 /*
0309  * Set the associated ect / cti device while holding the coresight_mutex
0310  * to avoid a race with coresight_enable that may try to use this value.
0311  */
0312 void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev,
0313                       struct coresight_device *ect_csdev)
0314 {
0315     mutex_lock(&coresight_mutex);
0316     csdev->ect_dev = ect_csdev;
0317     mutex_unlock(&coresight_mutex);
0318 }
0319 EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex);
0320 
0321 static int coresight_enable_sink(struct coresight_device *csdev,
0322                  u32 mode, void *data)
0323 {
0324     int ret;
0325 
0326     /*
0327      * We need to make sure the "new" session is compatible with the
0328      * existing "mode" of operation.
0329      */
0330     if (!sink_ops(csdev)->enable)
0331         return -EINVAL;
0332 
0333     ret = coresight_control_assoc_ectdev(csdev, true);
0334     if (ret)
0335         return ret;
0336     ret = sink_ops(csdev)->enable(csdev, mode, data);
0337     if (ret) {
0338         coresight_control_assoc_ectdev(csdev, false);
0339         return ret;
0340     }
0341     csdev->enable = true;
0342 
0343     return 0;
0344 }
0345 
0346 static void coresight_disable_sink(struct coresight_device *csdev)
0347 {
0348     int ret;
0349 
0350     if (!sink_ops(csdev)->disable)
0351         return;
0352 
0353     ret = sink_ops(csdev)->disable(csdev);
0354     if (ret)
0355         return;
0356     coresight_control_assoc_ectdev(csdev, false);
0357     csdev->enable = false;
0358 }
0359 
0360 static int coresight_enable_link(struct coresight_device *csdev,
0361                  struct coresight_device *parent,
0362                  struct coresight_device *child)
0363 {
0364     int ret = 0;
0365     int link_subtype;
0366     int inport, outport;
0367 
0368     if (!parent || !child)
0369         return -EINVAL;
0370 
0371     inport = coresight_find_link_inport(csdev, parent);
0372     outport = coresight_find_link_outport(csdev, child);
0373     link_subtype = csdev->subtype.link_subtype;
0374 
0375     if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG && inport < 0)
0376         return inport;
0377     if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT && outport < 0)
0378         return outport;
0379 
0380     if (link_ops(csdev)->enable) {
0381         ret = coresight_control_assoc_ectdev(csdev, true);
0382         if (!ret) {
0383             ret = link_ops(csdev)->enable(csdev, inport, outport);
0384             if (ret)
0385                 coresight_control_assoc_ectdev(csdev, false);
0386         }
0387     }
0388 
0389     if (!ret)
0390         csdev->enable = true;
0391 
0392     return ret;
0393 }
0394 
0395 static void coresight_disable_link(struct coresight_device *csdev,
0396                    struct coresight_device *parent,
0397                    struct coresight_device *child)
0398 {
0399     int i, nr_conns;
0400     int link_subtype;
0401     int inport, outport;
0402 
0403     if (!parent || !child)
0404         return;
0405 
0406     inport = coresight_find_link_inport(csdev, parent);
0407     outport = coresight_find_link_outport(csdev, child);
0408     link_subtype = csdev->subtype.link_subtype;
0409 
0410     if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG) {
0411         nr_conns = csdev->pdata->nr_inport;
0412     } else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT) {
0413         nr_conns = csdev->pdata->nr_outport;
0414     } else {
0415         nr_conns = 1;
0416     }
0417 
0418     if (link_ops(csdev)->disable) {
0419         link_ops(csdev)->disable(csdev, inport, outport);
0420         coresight_control_assoc_ectdev(csdev, false);
0421     }
0422 
0423     for (i = 0; i < nr_conns; i++)
0424         if (atomic_read(&csdev->refcnt[i]) != 0)
0425             return;
0426 
0427     csdev->enable = false;
0428 }
0429 
0430 static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
0431 {
0432     int ret;
0433 
0434     if (!coresight_source_is_unique(csdev)) {
0435         dev_warn(&csdev->dev, "traceID %d not unique\n",
0436              source_ops(csdev)->trace_id(csdev));
0437         return -EINVAL;
0438     }
0439 
0440     if (!csdev->enable) {
0441         if (source_ops(csdev)->enable) {
0442             ret = coresight_control_assoc_ectdev(csdev, true);
0443             if (ret)
0444                 return ret;
0445             ret = source_ops(csdev)->enable(csdev, NULL, mode);
0446             if (ret) {
0447                 coresight_control_assoc_ectdev(csdev, false);
0448                 return ret;
0449             }
0450         }
0451         csdev->enable = true;
0452     }
0453 
0454     atomic_inc(csdev->refcnt);
0455 
0456     return 0;
0457 }
0458 
0459 /**
0460  *  coresight_disable_source - Drop the reference count by 1 and disable
0461  *  the device if there are no users left.
0462  *
0463  *  @csdev: The coresight device to disable
0464  *
0465  *  Returns true if the device has been disabled.
0466  */
0467 static bool coresight_disable_source(struct coresight_device *csdev)
0468 {
0469     if (atomic_dec_return(csdev->refcnt) == 0) {
0470         if (source_ops(csdev)->disable)
0471             source_ops(csdev)->disable(csdev, NULL);
0472         coresight_control_assoc_ectdev(csdev, false);
0473         csdev->enable = false;
0474     }
0475     return !csdev->enable;
0476 }
0477 
0478 /*
0479  * coresight_disable_path_from : Disable components in the given path beyond
0480  * @nd in the list. If @nd is NULL, all the components, except the SOURCE are
0481  * disabled.
0482  */
0483 static void coresight_disable_path_from(struct list_head *path,
0484                     struct coresight_node *nd)
0485 {
0486     u32 type;
0487     struct coresight_device *csdev, *parent, *child;
0488 
0489     if (!nd)
0490         nd = list_first_entry(path, struct coresight_node, link);
0491 
0492     list_for_each_entry_continue(nd, path, link) {
0493         csdev = nd->csdev;
0494         type = csdev->type;
0495 
0496         /*
0497          * ETF devices are tricky... They can be a link or a sink,
0498          * depending on how they are configured.  If an ETF has been
0499          * "activated" it will be configured as a sink, otherwise
0500          * go ahead with the link configuration.
0501          */
0502         if (type == CORESIGHT_DEV_TYPE_LINKSINK)
0503             type = (csdev == coresight_get_sink(path)) ?
0504                         CORESIGHT_DEV_TYPE_SINK :
0505                         CORESIGHT_DEV_TYPE_LINK;
0506 
0507         switch (type) {
0508         case CORESIGHT_DEV_TYPE_SINK:
0509             coresight_disable_sink(csdev);
0510             break;
0511         case CORESIGHT_DEV_TYPE_SOURCE:
0512             /*
0513              * We skip the first node in the path assuming that it
0514              * is the source. So we don't expect a source device in
0515              * the middle of a path.
0516              */
0517             WARN_ON(1);
0518             break;
0519         case CORESIGHT_DEV_TYPE_LINK:
0520             parent = list_prev_entry(nd, link)->csdev;
0521             child = list_next_entry(nd, link)->csdev;
0522             coresight_disable_link(csdev, parent, child);
0523             break;
0524         default:
0525             break;
0526         }
0527     }
0528 }
0529 
0530 void coresight_disable_path(struct list_head *path)
0531 {
0532     coresight_disable_path_from(path, NULL);
0533 }
0534 EXPORT_SYMBOL_GPL(coresight_disable_path);
0535 
0536 int coresight_enable_path(struct list_head *path, u32 mode, void *sink_data)
0537 {
0538 
0539     int ret = 0;
0540     u32 type;
0541     struct coresight_node *nd;
0542     struct coresight_device *csdev, *parent, *child;
0543 
0544     list_for_each_entry_reverse(nd, path, link) {
0545         csdev = nd->csdev;
0546         type = csdev->type;
0547 
0548         /*
0549          * ETF devices are tricky... They can be a link or a sink,
0550          * depending on how they are configured.  If an ETF has been
0551          * "activated" it will be configured as a sink, otherwise
0552          * go ahead with the link configuration.
0553          */
0554         if (type == CORESIGHT_DEV_TYPE_LINKSINK)
0555             type = (csdev == coresight_get_sink(path)) ?
0556                         CORESIGHT_DEV_TYPE_SINK :
0557                         CORESIGHT_DEV_TYPE_LINK;
0558 
0559         switch (type) {
0560         case CORESIGHT_DEV_TYPE_SINK:
0561             ret = coresight_enable_sink(csdev, mode, sink_data);
0562             /*
0563              * Sink is the first component turned on. If we
0564              * failed to enable the sink, there are no components
0565              * that need disabling. Disabling the path here
0566              * would mean we could disrupt an existing session.
0567              */
0568             if (ret)
0569                 goto out;
0570             break;
0571         case CORESIGHT_DEV_TYPE_SOURCE:
0572             /* sources are enabled from either sysFS or Perf */
0573             break;
0574         case CORESIGHT_DEV_TYPE_LINK:
0575             parent = list_prev_entry(nd, link)->csdev;
0576             child = list_next_entry(nd, link)->csdev;
0577             ret = coresight_enable_link(csdev, parent, child);
0578             if (ret)
0579                 goto err;
0580             break;
0581         default:
0582             goto err;
0583         }
0584     }
0585 
0586 out:
0587     return ret;
0588 err:
0589     coresight_disable_path_from(path, nd);
0590     goto out;
0591 }
0592 
0593 struct coresight_device *coresight_get_sink(struct list_head *path)
0594 {
0595     struct coresight_device *csdev;
0596 
0597     if (!path)
0598         return NULL;
0599 
0600     csdev = list_last_entry(path, struct coresight_node, link)->csdev;
0601     if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
0602         csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
0603         return NULL;
0604 
0605     return csdev;
0606 }
0607 
0608 static struct coresight_device *
0609 coresight_find_enabled_sink(struct coresight_device *csdev)
0610 {
0611     int i;
0612     struct coresight_device *sink = NULL;
0613 
0614     if ((csdev->type == CORESIGHT_DEV_TYPE_SINK ||
0615          csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) &&
0616          csdev->activated)
0617         return csdev;
0618 
0619     /*
0620      * Recursively explore each port found on this element.
0621      */
0622     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0623         struct coresight_device *child_dev;
0624 
0625         child_dev = csdev->pdata->conns[i].child_dev;
0626         if (child_dev)
0627             sink = coresight_find_enabled_sink(child_dev);
0628         if (sink)
0629             return sink;
0630     }
0631 
0632     return NULL;
0633 }
0634 
0635 /**
0636  * coresight_get_enabled_sink - returns the first enabled sink using
0637  * connection based search starting from the source reference
0638  *
0639  * @source: Coresight source device reference
0640  */
0641 struct coresight_device *
0642 coresight_get_enabled_sink(struct coresight_device *source)
0643 {
0644     if (!source)
0645         return NULL;
0646 
0647     return coresight_find_enabled_sink(source);
0648 }
0649 
0650 static int coresight_sink_by_id(struct device *dev, const void *data)
0651 {
0652     struct coresight_device *csdev = to_coresight_device(dev);
0653     unsigned long hash;
0654 
0655     if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
0656          csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
0657 
0658         if (!csdev->ea)
0659             return 0;
0660         /*
0661          * See function etm_perf_add_symlink_sink() to know where
0662          * this comes from.
0663          */
0664         hash = (unsigned long)csdev->ea->var;
0665 
0666         if ((u32)hash == *(u32 *)data)
0667             return 1;
0668     }
0669 
0670     return 0;
0671 }
0672 
0673 /**
0674  * coresight_get_sink_by_id - returns the sink that matches the id
0675  * @id: Id of the sink to match
0676  *
0677  * The name of a sink is unique, whether it is found on the AMBA bus or
0678  * otherwise.  As such the hash of that name can easily be used to identify
0679  * a sink.
0680  */
0681 struct coresight_device *coresight_get_sink_by_id(u32 id)
0682 {
0683     struct device *dev = NULL;
0684 
0685     dev = bus_find_device(&coresight_bustype, NULL, &id,
0686                   coresight_sink_by_id);
0687 
0688     return dev ? to_coresight_device(dev) : NULL;
0689 }
0690 
0691 /**
0692  * coresight_get_ref- Helper function to increase reference count to module
0693  * and device.
0694  *
0695  * @csdev: The coresight device to get a reference on.
0696  *
0697  * Return true in successful case and power up the device.
0698  * Return false when failed to get reference of module.
0699  */
0700 static inline bool coresight_get_ref(struct coresight_device *csdev)
0701 {
0702     struct device *dev = csdev->dev.parent;
0703 
0704     /* Make sure the driver can't be removed */
0705     if (!try_module_get(dev->driver->owner))
0706         return false;
0707     /* Make sure the device can't go away */
0708     get_device(dev);
0709     pm_runtime_get_sync(dev);
0710     return true;
0711 }
0712 
0713 /**
0714  * coresight_put_ref- Helper function to decrease reference count to module
0715  * and device. Power off the device.
0716  *
0717  * @csdev: The coresight device to decrement a reference from.
0718  */
0719 static inline void coresight_put_ref(struct coresight_device *csdev)
0720 {
0721     struct device *dev = csdev->dev.parent;
0722 
0723     pm_runtime_put(dev);
0724     put_device(dev);
0725     module_put(dev->driver->owner);
0726 }
0727 
0728 /*
0729  * coresight_grab_device - Power up this device and any of the helper
0730  * devices connected to it for trace operation. Since the helper devices
0731  * don't appear on the trace path, they should be handled along with the
0732  * master device.
0733  */
0734 static int coresight_grab_device(struct coresight_device *csdev)
0735 {
0736     int i;
0737 
0738     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0739         struct coresight_device *child;
0740 
0741         child  = csdev->pdata->conns[i].child_dev;
0742         if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
0743             if (!coresight_get_ref(child))
0744                 goto err;
0745     }
0746     if (coresight_get_ref(csdev))
0747         return 0;
0748 err:
0749     for (i--; i >= 0; i--) {
0750         struct coresight_device *child;
0751 
0752         child  = csdev->pdata->conns[i].child_dev;
0753         if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
0754             coresight_put_ref(child);
0755     }
0756     return -ENODEV;
0757 }
0758 
0759 /*
0760  * coresight_drop_device - Release this device and any of the helper
0761  * devices connected to it.
0762  */
0763 static void coresight_drop_device(struct coresight_device *csdev)
0764 {
0765     int i;
0766 
0767     coresight_put_ref(csdev);
0768     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0769         struct coresight_device *child;
0770 
0771         child  = csdev->pdata->conns[i].child_dev;
0772         if (child && child->type == CORESIGHT_DEV_TYPE_HELPER)
0773             coresight_put_ref(child);
0774     }
0775 }
0776 
0777 /**
0778  * _coresight_build_path - recursively build a path from a @csdev to a sink.
0779  * @csdev:  The device to start from.
0780  * @sink:   The final sink we want in this path.
0781  * @path:   The list to add devices to.
0782  *
0783  * The tree of Coresight device is traversed until an activated sink is
0784  * found.  From there the sink is added to the list along with all the
0785  * devices that led to that point - the end result is a list from source
0786  * to sink. In that list the source is the first device and the sink the
0787  * last one.
0788  */
0789 static int _coresight_build_path(struct coresight_device *csdev,
0790                  struct coresight_device *sink,
0791                  struct list_head *path)
0792 {
0793     int i, ret;
0794     bool found = false;
0795     struct coresight_node *node;
0796 
0797     /* An activated sink has been found.  Enqueue the element */
0798     if (csdev == sink)
0799         goto out;
0800 
0801     if (coresight_is_percpu_source(csdev) && coresight_is_percpu_sink(sink) &&
0802         sink == per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev))) {
0803         if (_coresight_build_path(sink, sink, path) == 0) {
0804             found = true;
0805             goto out;
0806         }
0807     }
0808 
0809     /* Not a sink - recursively explore each port found on this element */
0810     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0811         struct coresight_device *child_dev;
0812 
0813         child_dev = csdev->pdata->conns[i].child_dev;
0814         if (child_dev &&
0815             _coresight_build_path(child_dev, sink, path) == 0) {
0816             found = true;
0817             break;
0818         }
0819     }
0820 
0821     if (!found)
0822         return -ENODEV;
0823 
0824 out:
0825     /*
0826      * A path from this element to a sink has been found.  The elements
0827      * leading to the sink are already enqueued, all that is left to do
0828      * is tell the PM runtime core we need this element and add a node
0829      * for it.
0830      */
0831     ret = coresight_grab_device(csdev);
0832     if (ret)
0833         return ret;
0834 
0835     node = kzalloc(sizeof(struct coresight_node), GFP_KERNEL);
0836     if (!node)
0837         return -ENOMEM;
0838 
0839     node->csdev = csdev;
0840     list_add(&node->link, path);
0841 
0842     return 0;
0843 }
0844 
0845 struct list_head *coresight_build_path(struct coresight_device *source,
0846                        struct coresight_device *sink)
0847 {
0848     struct list_head *path;
0849     int rc;
0850 
0851     if (!sink)
0852         return ERR_PTR(-EINVAL);
0853 
0854     path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
0855     if (!path)
0856         return ERR_PTR(-ENOMEM);
0857 
0858     INIT_LIST_HEAD(path);
0859 
0860     rc = _coresight_build_path(source, sink, path);
0861     if (rc) {
0862         kfree(path);
0863         return ERR_PTR(rc);
0864     }
0865 
0866     return path;
0867 }
0868 
0869 /**
0870  * coresight_release_path - release a previously built path.
0871  * @path:   the path to release.
0872  *
0873  * Go through all the elements of a path and 1) removed it from the list and
0874  * 2) free the memory allocated for each node.
0875  */
0876 void coresight_release_path(struct list_head *path)
0877 {
0878     struct coresight_device *csdev;
0879     struct coresight_node *nd, *next;
0880 
0881     list_for_each_entry_safe(nd, next, path, link) {
0882         csdev = nd->csdev;
0883 
0884         coresight_drop_device(csdev);
0885         list_del(&nd->link);
0886         kfree(nd);
0887     }
0888 
0889     kfree(path);
0890 }
0891 
0892 /* return true if the device is a suitable type for a default sink */
0893 static inline bool coresight_is_def_sink_type(struct coresight_device *csdev)
0894 {
0895     /* sink & correct subtype */
0896     if (((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
0897          (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) &&
0898         (csdev->subtype.sink_subtype >= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER))
0899         return true;
0900     return false;
0901 }
0902 
0903 /**
0904  * coresight_select_best_sink - return the best sink for use as default from
0905  * the two provided.
0906  *
0907  * @sink:   current best sink.
0908  * @depth:      search depth where current sink was found.
0909  * @new_sink:   new sink for comparison with current sink.
0910  * @new_depth:  search depth where new sink was found.
0911  *
0912  * Sinks prioritised according to coresight_dev_subtype_sink, with only
0913  * subtypes CORESIGHT_DEV_SUBTYPE_SINK_BUFFER or higher being used.
0914  *
0915  * Where two sinks of equal priority are found, the sink closest to the
0916  * source is used (smallest search depth).
0917  *
0918  * return @new_sink & update @depth if better than @sink, else return @sink.
0919  */
0920 static struct coresight_device *
0921 coresight_select_best_sink(struct coresight_device *sink, int *depth,
0922                struct coresight_device *new_sink, int new_depth)
0923 {
0924     bool update = false;
0925 
0926     if (!sink) {
0927         /* first found at this level */
0928         update = true;
0929     } else if (new_sink->subtype.sink_subtype >
0930            sink->subtype.sink_subtype) {
0931         /* found better sink */
0932         update = true;
0933     } else if ((new_sink->subtype.sink_subtype ==
0934             sink->subtype.sink_subtype) &&
0935            (*depth > new_depth)) {
0936         /* found same but closer sink */
0937         update = true;
0938     }
0939 
0940     if (update)
0941         *depth = new_depth;
0942     return update ? new_sink : sink;
0943 }
0944 
0945 /**
0946  * coresight_find_sink - recursive function to walk trace connections from
0947  * source to find a suitable default sink.
0948  *
0949  * @csdev: source / current device to check.
0950  * @depth: [in] search depth of calling dev, [out] depth of found sink.
0951  *
0952  * This will walk the connection path from a source (ETM) till a suitable
0953  * sink is encountered and return that sink to the original caller.
0954  *
0955  * If current device is a plain sink return that & depth, otherwise recursively
0956  * call child connections looking for a sink. Select best possible using
0957  * coresight_select_best_sink.
0958  *
0959  * return best sink found, or NULL if not found at this node or child nodes.
0960  */
0961 static struct coresight_device *
0962 coresight_find_sink(struct coresight_device *csdev, int *depth)
0963 {
0964     int i, curr_depth = *depth + 1, found_depth = 0;
0965     struct coresight_device *found_sink = NULL;
0966 
0967     if (coresight_is_def_sink_type(csdev)) {
0968         found_depth = curr_depth;
0969         found_sink = csdev;
0970         if (csdev->type == CORESIGHT_DEV_TYPE_SINK)
0971             goto return_def_sink;
0972         /* look past LINKSINK for something better */
0973     }
0974 
0975     /*
0976      * Not a sink we want - or possible child sink may be better.
0977      * recursively explore each port found on this element.
0978      */
0979     for (i = 0; i < csdev->pdata->nr_outport; i++) {
0980         struct coresight_device *child_dev, *sink = NULL;
0981         int child_depth = curr_depth;
0982 
0983         child_dev = csdev->pdata->conns[i].child_dev;
0984         if (child_dev)
0985             sink = coresight_find_sink(child_dev, &child_depth);
0986 
0987         if (sink)
0988             found_sink = coresight_select_best_sink(found_sink,
0989                                 &found_depth,
0990                                 sink,
0991                                 child_depth);
0992     }
0993 
0994 return_def_sink:
0995     /* return found sink and depth */
0996     if (found_sink)
0997         *depth = found_depth;
0998     return found_sink;
0999 }
1000 
1001 /**
1002  * coresight_find_default_sink: Find a sink suitable for use as a
1003  * default sink.
1004  *
1005  * @csdev: starting source to find a connected sink.
1006  *
1007  * Walks connections graph looking for a suitable sink to enable for the
1008  * supplied source. Uses CoreSight device subtypes and distance from source
1009  * to select the best sink.
1010  *
1011  * If a sink is found, then the default sink for this device is set and
1012  * will be automatically used in future.
1013  *
1014  * Used in cases where the CoreSight user (perf / sysfs) has not selected a
1015  * sink.
1016  */
1017 struct coresight_device *
1018 coresight_find_default_sink(struct coresight_device *csdev)
1019 {
1020     int depth = 0;
1021 
1022     /* look for a default sink if we have not found for this device */
1023     if (!csdev->def_sink) {
1024         if (coresight_is_percpu_source(csdev))
1025             csdev->def_sink = per_cpu(csdev_sink, source_ops(csdev)->cpu_id(csdev));
1026         if (!csdev->def_sink)
1027             csdev->def_sink = coresight_find_sink(csdev, &depth);
1028     }
1029     return csdev->def_sink;
1030 }
1031 
1032 static int coresight_remove_sink_ref(struct device *dev, void *data)
1033 {
1034     struct coresight_device *sink = data;
1035     struct coresight_device *source = to_coresight_device(dev);
1036 
1037     if (source->def_sink == sink)
1038         source->def_sink = NULL;
1039     return 0;
1040 }
1041 
1042 /**
1043  * coresight_clear_default_sink: Remove all default sink references to the
1044  * supplied sink.
1045  *
1046  * If supplied device is a sink, then check all the bus devices and clear
1047  * out all the references to this sink from the coresight_device def_sink
1048  * parameter.
1049  *
1050  * @csdev: coresight sink - remove references to this from all sources.
1051  */
1052 static void coresight_clear_default_sink(struct coresight_device *csdev)
1053 {
1054     if ((csdev->type == CORESIGHT_DEV_TYPE_SINK) ||
1055         (csdev->type == CORESIGHT_DEV_TYPE_LINKSINK)) {
1056         bus_for_each_dev(&coresight_bustype, NULL, csdev,
1057                  coresight_remove_sink_ref);
1058     }
1059 }
1060 
1061 /** coresight_validate_source - make sure a source has the right credentials
1062  *  @csdev: the device structure for a source.
1063  *  @function:  the function this was called from.
1064  *
1065  * Assumes the coresight_mutex is held.
1066  */
1067 static int coresight_validate_source(struct coresight_device *csdev,
1068                      const char *function)
1069 {
1070     u32 type, subtype;
1071 
1072     type = csdev->type;
1073     subtype = csdev->subtype.source_subtype;
1074 
1075     if (type != CORESIGHT_DEV_TYPE_SOURCE) {
1076         dev_err(&csdev->dev, "wrong device type in %s\n", function);
1077         return -EINVAL;
1078     }
1079 
1080     if (subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_PROC &&
1081         subtype != CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE) {
1082         dev_err(&csdev->dev, "wrong device subtype in %s\n", function);
1083         return -EINVAL;
1084     }
1085 
1086     return 0;
1087 }
1088 
1089 int coresight_enable(struct coresight_device *csdev)
1090 {
1091     int cpu, ret = 0;
1092     struct coresight_device *sink;
1093     struct list_head *path;
1094     enum coresight_dev_subtype_source subtype;
1095 
1096     subtype = csdev->subtype.source_subtype;
1097 
1098     mutex_lock(&coresight_mutex);
1099 
1100     ret = coresight_validate_source(csdev, __func__);
1101     if (ret)
1102         goto out;
1103 
1104     if (csdev->enable) {
1105         /*
1106          * There could be multiple applications driving the software
1107          * source. So keep the refcount for each such user when the
1108          * source is already enabled.
1109          */
1110         if (subtype == CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE)
1111             atomic_inc(csdev->refcnt);
1112         goto out;
1113     }
1114 
1115     sink = coresight_get_enabled_sink(csdev);
1116     if (!sink) {
1117         ret = -EINVAL;
1118         goto out;
1119     }
1120 
1121     path = coresight_build_path(csdev, sink);
1122     if (IS_ERR(path)) {
1123         pr_err("building path(s) failed\n");
1124         ret = PTR_ERR(path);
1125         goto out;
1126     }
1127 
1128     ret = coresight_enable_path(path, CS_MODE_SYSFS, NULL);
1129     if (ret)
1130         goto err_path;
1131 
1132     ret = coresight_enable_source(csdev, CS_MODE_SYSFS);
1133     if (ret)
1134         goto err_source;
1135 
1136     switch (subtype) {
1137     case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1138         /*
1139          * When working from sysFS it is important to keep track
1140          * of the paths that were created so that they can be
1141          * undone in 'coresight_disable()'.  Since there can only
1142          * be a single session per tracer (when working from sysFS)
1143          * a per-cpu variable will do just fine.
1144          */
1145         cpu = source_ops(csdev)->cpu_id(csdev);
1146         per_cpu(tracer_path, cpu) = path;
1147         break;
1148     case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1149         stm_path = path;
1150         break;
1151     default:
1152         /* We can't be here */
1153         break;
1154     }
1155 
1156 out:
1157     mutex_unlock(&coresight_mutex);
1158     return ret;
1159 
1160 err_source:
1161     coresight_disable_path(path);
1162 
1163 err_path:
1164     coresight_release_path(path);
1165     goto out;
1166 }
1167 EXPORT_SYMBOL_GPL(coresight_enable);
1168 
1169 void coresight_disable(struct coresight_device *csdev)
1170 {
1171     int cpu, ret;
1172     struct list_head *path = NULL;
1173 
1174     mutex_lock(&coresight_mutex);
1175 
1176     ret = coresight_validate_source(csdev, __func__);
1177     if (ret)
1178         goto out;
1179 
1180     if (!csdev->enable || !coresight_disable_source(csdev))
1181         goto out;
1182 
1183     switch (csdev->subtype.source_subtype) {
1184     case CORESIGHT_DEV_SUBTYPE_SOURCE_PROC:
1185         cpu = source_ops(csdev)->cpu_id(csdev);
1186         path = per_cpu(tracer_path, cpu);
1187         per_cpu(tracer_path, cpu) = NULL;
1188         break;
1189     case CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE:
1190         path = stm_path;
1191         stm_path = NULL;
1192         break;
1193     default:
1194         /* We can't be here */
1195         break;
1196     }
1197 
1198     coresight_disable_path(path);
1199     coresight_release_path(path);
1200 
1201 out:
1202     mutex_unlock(&coresight_mutex);
1203 }
1204 EXPORT_SYMBOL_GPL(coresight_disable);
1205 
1206 static ssize_t enable_sink_show(struct device *dev,
1207                 struct device_attribute *attr, char *buf)
1208 {
1209     struct coresight_device *csdev = to_coresight_device(dev);
1210 
1211     return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->activated);
1212 }
1213 
1214 static ssize_t enable_sink_store(struct device *dev,
1215                  struct device_attribute *attr,
1216                  const char *buf, size_t size)
1217 {
1218     int ret;
1219     unsigned long val;
1220     struct coresight_device *csdev = to_coresight_device(dev);
1221 
1222     ret = kstrtoul(buf, 10, &val);
1223     if (ret)
1224         return ret;
1225 
1226     if (val)
1227         csdev->activated = true;
1228     else
1229         csdev->activated = false;
1230 
1231     return size;
1232 
1233 }
1234 static DEVICE_ATTR_RW(enable_sink);
1235 
1236 static ssize_t enable_source_show(struct device *dev,
1237                   struct device_attribute *attr, char *buf)
1238 {
1239     struct coresight_device *csdev = to_coresight_device(dev);
1240 
1241     return scnprintf(buf, PAGE_SIZE, "%u\n", csdev->enable);
1242 }
1243 
1244 static ssize_t enable_source_store(struct device *dev,
1245                    struct device_attribute *attr,
1246                    const char *buf, size_t size)
1247 {
1248     int ret = 0;
1249     unsigned long val;
1250     struct coresight_device *csdev = to_coresight_device(dev);
1251 
1252     ret = kstrtoul(buf, 10, &val);
1253     if (ret)
1254         return ret;
1255 
1256     if (val) {
1257         ret = coresight_enable(csdev);
1258         if (ret)
1259             return ret;
1260     } else {
1261         coresight_disable(csdev);
1262     }
1263 
1264     return size;
1265 }
1266 static DEVICE_ATTR_RW(enable_source);
1267 
1268 static struct attribute *coresight_sink_attrs[] = {
1269     &dev_attr_enable_sink.attr,
1270     NULL,
1271 };
1272 ATTRIBUTE_GROUPS(coresight_sink);
1273 
1274 static struct attribute *coresight_source_attrs[] = {
1275     &dev_attr_enable_source.attr,
1276     NULL,
1277 };
1278 ATTRIBUTE_GROUPS(coresight_source);
1279 
1280 static struct device_type coresight_dev_type[] = {
1281     {
1282         .name = "sink",
1283         .groups = coresight_sink_groups,
1284     },
1285     {
1286         .name = "link",
1287     },
1288     {
1289         .name = "linksink",
1290         .groups = coresight_sink_groups,
1291     },
1292     {
1293         .name = "source",
1294         .groups = coresight_source_groups,
1295     },
1296     {
1297         .name = "helper",
1298     },
1299     {
1300         .name = "ect",
1301     },
1302 };
1303 
1304 static void coresight_device_release(struct device *dev)
1305 {
1306     struct coresight_device *csdev = to_coresight_device(dev);
1307 
1308     fwnode_handle_put(csdev->dev.fwnode);
1309     kfree(csdev->refcnt);
1310     kfree(csdev);
1311 }
1312 
1313 static int coresight_orphan_match(struct device *dev, void *data)
1314 {
1315     int i, ret = 0;
1316     bool still_orphan = false;
1317     struct coresight_device *csdev, *i_csdev;
1318     struct coresight_connection *conn;
1319 
1320     csdev = data;
1321     i_csdev = to_coresight_device(dev);
1322 
1323     /* No need to check oneself */
1324     if (csdev == i_csdev)
1325         return 0;
1326 
1327     /* Move on to another component if no connection is orphan */
1328     if (!i_csdev->orphan)
1329         return 0;
1330     /*
1331      * Circle throuch all the connection of that component.  If we find
1332      * an orphan connection whose name matches @csdev, link it.
1333      */
1334     for (i = 0; i < i_csdev->pdata->nr_outport; i++) {
1335         conn = &i_csdev->pdata->conns[i];
1336 
1337         /* Skip the port if FW doesn't describe it */
1338         if (!conn->child_fwnode)
1339             continue;
1340         /* We have found at least one orphan connection */
1341         if (conn->child_dev == NULL) {
1342             /* Does it match this newly added device? */
1343             if (conn->child_fwnode == csdev->dev.fwnode) {
1344                 ret = coresight_make_links(i_csdev,
1345                                conn, csdev);
1346                 if (ret)
1347                     return ret;
1348             } else {
1349                 /* This component still has an orphan */
1350                 still_orphan = true;
1351             }
1352         }
1353     }
1354 
1355     i_csdev->orphan = still_orphan;
1356 
1357     /*
1358      * Returning '0' in case we didn't encounter any error,
1359      * ensures that all known component on the bus will be checked.
1360      */
1361     return 0;
1362 }
1363 
1364 static int coresight_fixup_orphan_conns(struct coresight_device *csdev)
1365 {
1366     return bus_for_each_dev(&coresight_bustype, NULL,
1367              csdev, coresight_orphan_match);
1368 }
1369 
1370 
1371 static int coresight_fixup_device_conns(struct coresight_device *csdev)
1372 {
1373     int i, ret = 0;
1374 
1375     for (i = 0; i < csdev->pdata->nr_outport; i++) {
1376         struct coresight_connection *conn = &csdev->pdata->conns[i];
1377 
1378         if (!conn->child_fwnode)
1379             continue;
1380         conn->child_dev =
1381             coresight_find_csdev_by_fwnode(conn->child_fwnode);
1382         if (conn->child_dev && conn->child_dev->has_conns_grp) {
1383             ret = coresight_make_links(csdev, conn,
1384                            conn->child_dev);
1385             if (ret)
1386                 break;
1387         } else {
1388             csdev->orphan = true;
1389         }
1390     }
1391 
1392     return ret;
1393 }
1394 
1395 static int coresight_remove_match(struct device *dev, void *data)
1396 {
1397     int i;
1398     struct coresight_device *csdev, *iterator;
1399     struct coresight_connection *conn;
1400 
1401     csdev = data;
1402     iterator = to_coresight_device(dev);
1403 
1404     /* No need to check oneself */
1405     if (csdev == iterator)
1406         return 0;
1407 
1408     /*
1409      * Circle throuch all the connection of that component.  If we find
1410      * a connection whose name matches @csdev, remove it.
1411      */
1412     for (i = 0; i < iterator->pdata->nr_outport; i++) {
1413         conn = &iterator->pdata->conns[i];
1414 
1415         if (conn->child_dev == NULL || conn->child_fwnode == NULL)
1416             continue;
1417 
1418         if (csdev->dev.fwnode == conn->child_fwnode) {
1419             iterator->orphan = true;
1420             coresight_remove_links(iterator, conn);
1421             /*
1422              * Drop the reference to the handle for the remote
1423              * device acquired in parsing the connections from
1424              * platform data.
1425              */
1426             fwnode_handle_put(conn->child_fwnode);
1427             conn->child_fwnode = NULL;
1428             /* No need to continue */
1429             break;
1430         }
1431     }
1432 
1433     /*
1434      * Returning '0' ensures that all known component on the
1435      * bus will be checked.
1436      */
1437     return 0;
1438 }
1439 
1440 /*
1441  * coresight_remove_conns - Remove references to this given devices
1442  * from the connections of other devices.
1443  */
1444 static void coresight_remove_conns(struct coresight_device *csdev)
1445 {
1446     /*
1447      * Another device will point to this device only if there is
1448      * an output port connected to this one. i.e, if the device
1449      * doesn't have at least one input port, there is no point
1450      * in searching all the devices.
1451      */
1452     if (csdev->pdata->nr_inport)
1453         bus_for_each_dev(&coresight_bustype, NULL,
1454                  csdev, coresight_remove_match);
1455 }
1456 
1457 /**
1458  * coresight_timeout - loop until a bit has changed to a specific register
1459  *          state.
1460  * @csa: coresight device access for the device
1461  * @offset: Offset of the register from the base of the device.
1462  * @position: the position of the bit of interest.
1463  * @value: the value the bit should have.
1464  *
1465  * Return: 0 as soon as the bit has taken the desired state or -EAGAIN if
1466  * TIMEOUT_US has elapsed, which ever happens first.
1467  */
1468 int coresight_timeout(struct csdev_access *csa, u32 offset,
1469               int position, int value)
1470 {
1471     int i;
1472     u32 val;
1473 
1474     for (i = TIMEOUT_US; i > 0; i--) {
1475         val = csdev_access_read32(csa, offset);
1476         /* waiting on the bit to go from 0 to 1 */
1477         if (value) {
1478             if (val & BIT(position))
1479                 return 0;
1480         /* waiting on the bit to go from 1 to 0 */
1481         } else {
1482             if (!(val & BIT(position)))
1483                 return 0;
1484         }
1485 
1486         /*
1487          * Delay is arbitrary - the specification doesn't say how long
1488          * we are expected to wait.  Extra check required to make sure
1489          * we don't wait needlessly on the last iteration.
1490          */
1491         if (i - 1)
1492             udelay(1);
1493     }
1494 
1495     return -EAGAIN;
1496 }
1497 EXPORT_SYMBOL_GPL(coresight_timeout);
1498 
1499 u32 coresight_relaxed_read32(struct coresight_device *csdev, u32 offset)
1500 {
1501     return csdev_access_relaxed_read32(&csdev->access, offset);
1502 }
1503 
1504 u32 coresight_read32(struct coresight_device *csdev, u32 offset)
1505 {
1506     return csdev_access_read32(&csdev->access, offset);
1507 }
1508 
1509 void coresight_relaxed_write32(struct coresight_device *csdev,
1510                    u32 val, u32 offset)
1511 {
1512     csdev_access_relaxed_write32(&csdev->access, val, offset);
1513 }
1514 
1515 void coresight_write32(struct coresight_device *csdev, u32 val, u32 offset)
1516 {
1517     csdev_access_write32(&csdev->access, val, offset);
1518 }
1519 
1520 u64 coresight_relaxed_read64(struct coresight_device *csdev, u32 offset)
1521 {
1522     return csdev_access_relaxed_read64(&csdev->access, offset);
1523 }
1524 
1525 u64 coresight_read64(struct coresight_device *csdev, u32 offset)
1526 {
1527     return csdev_access_read64(&csdev->access, offset);
1528 }
1529 
1530 void coresight_relaxed_write64(struct coresight_device *csdev,
1531                    u64 val, u32 offset)
1532 {
1533     csdev_access_relaxed_write64(&csdev->access, val, offset);
1534 }
1535 
1536 void coresight_write64(struct coresight_device *csdev, u64 val, u32 offset)
1537 {
1538     csdev_access_write64(&csdev->access, val, offset);
1539 }
1540 
1541 /*
1542  * coresight_release_platform_data: Release references to the devices connected
1543  * to the output port of this device.
1544  */
1545 void coresight_release_platform_data(struct coresight_device *csdev,
1546                      struct coresight_platform_data *pdata)
1547 {
1548     int i;
1549     struct coresight_connection *conns = pdata->conns;
1550 
1551     for (i = 0; i < pdata->nr_outport; i++) {
1552         /* If we have made the links, remove them now */
1553         if (csdev && conns[i].child_dev)
1554             coresight_remove_links(csdev, &conns[i]);
1555         /*
1556          * Drop the refcount and clear the handle as this device
1557          * is going away
1558          */
1559         if (conns[i].child_fwnode) {
1560             fwnode_handle_put(conns[i].child_fwnode);
1561             pdata->conns[i].child_fwnode = NULL;
1562         }
1563     }
1564     if (csdev)
1565         coresight_remove_conns_sysfs_group(csdev);
1566 }
1567 
1568 struct coresight_device *coresight_register(struct coresight_desc *desc)
1569 {
1570     int ret;
1571     int link_subtype;
1572     int nr_refcnts = 1;
1573     atomic_t *refcnts = NULL;
1574     struct coresight_device *csdev;
1575     bool registered = false;
1576 
1577     csdev = kzalloc(sizeof(*csdev), GFP_KERNEL);
1578     if (!csdev) {
1579         ret = -ENOMEM;
1580         goto err_out;
1581     }
1582 
1583     if (desc->type == CORESIGHT_DEV_TYPE_LINK ||
1584         desc->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1585         link_subtype = desc->subtype.link_subtype;
1586 
1587         if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_MERG)
1588             nr_refcnts = desc->pdata->nr_inport;
1589         else if (link_subtype == CORESIGHT_DEV_SUBTYPE_LINK_SPLIT)
1590             nr_refcnts = desc->pdata->nr_outport;
1591     }
1592 
1593     refcnts = kcalloc(nr_refcnts, sizeof(*refcnts), GFP_KERNEL);
1594     if (!refcnts) {
1595         ret = -ENOMEM;
1596         kfree(csdev);
1597         goto err_out;
1598     }
1599 
1600     csdev->refcnt = refcnts;
1601 
1602     csdev->pdata = desc->pdata;
1603 
1604     csdev->type = desc->type;
1605     csdev->subtype = desc->subtype;
1606     csdev->ops = desc->ops;
1607     csdev->access = desc->access;
1608     csdev->orphan = false;
1609 
1610     csdev->dev.type = &coresight_dev_type[desc->type];
1611     csdev->dev.groups = desc->groups;
1612     csdev->dev.parent = desc->dev;
1613     csdev->dev.release = coresight_device_release;
1614     csdev->dev.bus = &coresight_bustype;
1615     /*
1616      * Hold the reference to our parent device. This will be
1617      * dropped only in coresight_device_release().
1618      */
1619     csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev));
1620     dev_set_name(&csdev->dev, "%s", desc->name);
1621 
1622     /*
1623      * Make sure the device registration and the connection fixup
1624      * are synchronised, so that we don't see uninitialised devices
1625      * on the coresight bus while trying to resolve the connections.
1626      */
1627     mutex_lock(&coresight_mutex);
1628 
1629     ret = device_register(&csdev->dev);
1630     if (ret) {
1631         put_device(&csdev->dev);
1632         /*
1633          * All resources are free'd explicitly via
1634          * coresight_device_release(), triggered from put_device().
1635          */
1636         goto out_unlock;
1637     }
1638 
1639     if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
1640         csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
1641         ret = etm_perf_add_symlink_sink(csdev);
1642 
1643         if (ret) {
1644             device_unregister(&csdev->dev);
1645             /*
1646              * As with the above, all resources are free'd
1647              * explicitly via coresight_device_release() triggered
1648              * from put_device(), which is in turn called from
1649              * function device_unregister().
1650              */
1651             goto out_unlock;
1652         }
1653     }
1654     /* Device is now registered */
1655     registered = true;
1656 
1657     ret = coresight_create_conns_sysfs_group(csdev);
1658     if (!ret)
1659         ret = coresight_fixup_device_conns(csdev);
1660     if (!ret)
1661         ret = coresight_fixup_orphan_conns(csdev);
1662     if (!ret && cti_assoc_ops && cti_assoc_ops->add)
1663         cti_assoc_ops->add(csdev);
1664 
1665 out_unlock:
1666     mutex_unlock(&coresight_mutex);
1667     /* Success */
1668     if (!ret)
1669         return csdev;
1670 
1671     /* Unregister the device if needed */
1672     if (registered) {
1673         coresight_unregister(csdev);
1674         return ERR_PTR(ret);
1675     }
1676 
1677 err_out:
1678     /* Cleanup the connection information */
1679     coresight_release_platform_data(NULL, desc->pdata);
1680     return ERR_PTR(ret);
1681 }
1682 EXPORT_SYMBOL_GPL(coresight_register);
1683 
1684 void coresight_unregister(struct coresight_device *csdev)
1685 {
1686     etm_perf_del_symlink_sink(csdev);
1687     /* Remove references of that device in the topology */
1688     if (cti_assoc_ops && cti_assoc_ops->remove)
1689         cti_assoc_ops->remove(csdev);
1690     coresight_remove_conns(csdev);
1691     coresight_clear_default_sink(csdev);
1692     coresight_release_platform_data(csdev, csdev->pdata);
1693     device_unregister(&csdev->dev);
1694 }
1695 EXPORT_SYMBOL_GPL(coresight_unregister);
1696 
1697 
1698 /*
1699  * coresight_search_device_idx - Search the fwnode handle of a device
1700  * in the given dev_idx list. Must be called with the coresight_mutex held.
1701  *
1702  * Returns the index of the entry, when found. Otherwise, -ENOENT.
1703  */
1704 static inline int coresight_search_device_idx(struct coresight_dev_list *dict,
1705                           struct fwnode_handle *fwnode)
1706 {
1707     int i;
1708 
1709     for (i = 0; i < dict->nr_idx; i++)
1710         if (dict->fwnode_list[i] == fwnode)
1711             return i;
1712     return -ENOENT;
1713 }
1714 
1715 bool coresight_loses_context_with_cpu(struct device *dev)
1716 {
1717     return fwnode_property_present(dev_fwnode(dev),
1718                        "arm,coresight-loses-context-with-cpu");
1719 }
1720 EXPORT_SYMBOL_GPL(coresight_loses_context_with_cpu);
1721 
1722 /*
1723  * coresight_alloc_device_name - Get an index for a given device in the
1724  * device index list specific to a driver. An index is allocated for a
1725  * device and is tracked with the fwnode_handle to prevent allocating
1726  * duplicate indices for the same device (e.g, if we defer probing of
1727  * a device due to dependencies), in case the index is requested again.
1728  */
1729 char *coresight_alloc_device_name(struct coresight_dev_list *dict,
1730                   struct device *dev)
1731 {
1732     int idx;
1733     char *name = NULL;
1734     struct fwnode_handle **list;
1735 
1736     mutex_lock(&coresight_mutex);
1737 
1738     idx = coresight_search_device_idx(dict, dev_fwnode(dev));
1739     if (idx < 0) {
1740         /* Make space for the new entry */
1741         idx = dict->nr_idx;
1742         list = krealloc_array(dict->fwnode_list,
1743                       idx + 1, sizeof(*dict->fwnode_list),
1744                       GFP_KERNEL);
1745         if (ZERO_OR_NULL_PTR(list)) {
1746             idx = -ENOMEM;
1747             goto done;
1748         }
1749 
1750         list[idx] = dev_fwnode(dev);
1751         dict->fwnode_list = list;
1752         dict->nr_idx = idx + 1;
1753     }
1754 
1755     name = devm_kasprintf(dev, GFP_KERNEL, "%s%d", dict->pfx, idx);
1756 done:
1757     mutex_unlock(&coresight_mutex);
1758     return name;
1759 }
1760 EXPORT_SYMBOL_GPL(coresight_alloc_device_name);
1761 
1762 struct bus_type coresight_bustype = {
1763     .name   = "coresight",
1764 };
1765 
1766 static int __init coresight_init(void)
1767 {
1768     int ret;
1769 
1770     ret = bus_register(&coresight_bustype);
1771     if (ret)
1772         return ret;
1773 
1774     ret = etm_perf_init();
1775     if (ret)
1776         goto exit_bus_unregister;
1777 
1778     /* initialise the coresight syscfg API */
1779     ret = cscfg_init();
1780     if (!ret)
1781         return 0;
1782 
1783     etm_perf_exit();
1784 exit_bus_unregister:
1785     bus_unregister(&coresight_bustype);
1786     return ret;
1787 }
1788 
1789 static void __exit coresight_exit(void)
1790 {
1791     cscfg_exit();
1792     etm_perf_exit();
1793     bus_unregister(&coresight_bustype);
1794 }
1795 
1796 module_init(coresight_init);
1797 module_exit(coresight_exit);
1798 
1799 MODULE_LICENSE("GPL v2");
1800 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
1801 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
1802 MODULE_DESCRIPTION("Arm CoreSight tracer driver");