0001 # SPDX-License-Identifier: GPL-2.0-only
0002 #
0003 # Coresight configuration
0004 #
0005 menuconfig CORESIGHT
0006 tristate "CoreSight Tracing Support"
0007 depends on ARM || ARM64
0008 depends on OF || ACPI
0009 select ARM_AMBA
0010 select PERF_EVENTS
0011 select CONFIGFS_FS
0012 help
0013 This framework provides a kernel interface for the CoreSight debug
0014 and trace drivers to register themselves with. It's intended to build
0015 a topological view of the CoreSight components based on a DT
0016 specification and configure the right series of components when a
0017 trace source gets enabled.
0018
0019 To compile this driver as a module, choose M here: the
0020 module will be called coresight.
0021
0022 if CORESIGHT
0023 config CORESIGHT_LINKS_AND_SINKS
0024 tristate "CoreSight Link and Sink drivers"
0025 help
0026 This enables support for CoreSight link and sink drivers that are
0027 responsible for transporting and collecting the trace data
0028 respectively. Link and sinks are dynamically aggregated with a trace
0029 entity at run time to form a complete trace path.
0030
0031 To compile these drivers as modules, choose M here: the
0032 modules will be called coresight-funnel and coresight-replicator.
0033
0034 config CORESIGHT_LINK_AND_SINK_TMC
0035 tristate "Coresight generic TMC driver"
0036
0037 depends on CORESIGHT_LINKS_AND_SINKS
0038 help
0039 This enables support for the Trace Memory Controller driver.
0040 Depending on its configuration the device can act as a link (embedded
0041 trace router - ETR) or sink (embedded trace FIFO). The driver
0042 complies with the generic implementation of the component without
0043 special enhancement or added features.
0044
0045 To compile this driver as a module, choose M here: the
0046 module will be called coresight-tmc.
0047
0048 config CORESIGHT_CATU
0049 tristate "Coresight Address Translation Unit (CATU) driver"
0050 depends on CORESIGHT_LINK_AND_SINK_TMC
0051 help
0052 Enable support for the Coresight Address Translation Unit (CATU).
0053 CATU supports a scatter gather table of 4K pages, with forward/backward
0054 lookup. CATU helps TMC ETR to use a large physically non-contiguous trace
0055 buffer by translating the addresses used by ETR to the physical address
0056 by looking up the provided table. CATU can also be used in pass-through
0057 mode where the address is not translated.
0058
0059 To compile this driver as a module, choose M here: the
0060 module will be called coresight-catu.
0061
0062 config CORESIGHT_SINK_TPIU
0063 tristate "Coresight generic TPIU driver"
0064 depends on CORESIGHT_LINKS_AND_SINKS
0065 help
0066 This enables support for the Trace Port Interface Unit driver,
0067 responsible for bridging the gap between the on-chip coresight
0068 components and a trace for bridging the gap between the on-chip
0069 coresight components and a trace port collection engine, typically
0070 connected to an external host for use case capturing more traces than
0071 the on-board coresight memory can handle.
0072
0073 To compile this driver as a module, choose M here: the
0074 module will be called coresight-tpiu.
0075
0076 config CORESIGHT_SINK_ETBV10
0077 tristate "Coresight ETBv1.0 driver"
0078 depends on CORESIGHT_LINKS_AND_SINKS
0079 help
0080 This enables support for the Embedded Trace Buffer version 1.0 driver
0081 that complies with the generic implementation of the component without
0082 special enhancement or added features.
0083
0084 To compile this driver as a module, choose M here: the
0085 module will be called coresight-etb10.
0086
0087 config CORESIGHT_SOURCE_ETM3X
0088 tristate "CoreSight Embedded Trace Macrocell 3.x driver"
0089 depends on !ARM64
0090 select CORESIGHT_LINKS_AND_SINKS
0091 help
0092 This driver provides support for processor ETM3.x and PTM1.x modules,
0093 which allows tracing the instructions that a processor is executing
0094 This is primarily useful for instruction level tracing. Depending
0095 the ETM version data tracing may also be available.
0096
0097 To compile this driver as a module, choose M here: the
0098 module will be called coresight-etm3x.
0099
0100 config CORESIGHT_SOURCE_ETM4X
0101 tristate "CoreSight ETMv4.x / ETE driver"
0102 depends on ARM64
0103 select CORESIGHT_LINKS_AND_SINKS
0104 select PID_IN_CONTEXTIDR
0105 help
0106 This driver provides support for the CoreSight Embedded Trace Macrocell
0107 version 4.x and the Embedded Trace Extensions (ETE). Both are CPU tracer
0108 modules, tracing the instructions that a processor is executing. This is
0109 primarily useful for instruction level tracing.
0110
0111 To compile this driver as a module, choose M here: the
0112 module will be called coresight-etm4x.
0113
0114 config ETM4X_IMPDEF_FEATURE
0115 bool "Control implementation defined overflow support in ETM 4.x driver"
0116 depends on CORESIGHT_SOURCE_ETM4X
0117 help
0118 This control provides implementation define control for CoreSight
0119 ETM 4.x tracer module that can't reduce commit rate automatically.
0120 This avoids overflow between the ETM tracer module and the cpu core.
0121
0122 config CORESIGHT_STM
0123 tristate "CoreSight System Trace Macrocell driver"
0124 depends on (ARM && !(CPU_32v3 || CPU_32v4 || CPU_32v4T)) || ARM64
0125 select CORESIGHT_LINKS_AND_SINKS
0126 select STM
0127 help
0128 This driver provides support for hardware assisted software
0129 instrumentation based tracing. This is primarily used for
0130 logging useful software events or data coming from various entities
0131 in the system, possibly running different OSs
0132
0133 To compile this driver as a module, choose M here: the
0134 module will be called coresight-stm.
0135
0136 config CORESIGHT_CPU_DEBUG
0137 tristate "CoreSight CPU Debug driver"
0138 depends on ARM || ARM64
0139 depends on DEBUG_FS
0140 help
0141 This driver provides support for coresight debugging module. This
0142 is primarily used to dump sample-based profiling registers when
0143 system triggers panic, the driver will parse context registers so
0144 can quickly get to know program counter (PC), secure state,
0145 exception level, etc. Before use debugging functionality, platform
0146 needs to ensure the clock domain and power domain are enabled
0147 properly, please refer Documentation/trace/coresight/coresight-cpu-debug.rst
0148 for detailed description and the example for usage.
0149
0150 To compile this driver as a module, choose M here: the
0151 module will be called coresight-cpu-debug.
0152
0153 config CORESIGHT_CPU_DEBUG_DEFAULT_ON
0154 bool "Enable CoreSight CPU Debug by default"
0155 depends on CORESIGHT_CPU_DEBUG
0156 help
0157 Say Y here to enable the CoreSight Debug panic-debug by default. This
0158 can also be enabled via debugfs, but this ensures the debug feature
0159 is enabled as early as possible.
0160
0161 Has the same effect as setting coresight_cpu_debug.enable=1 on the
0162 kernel command line.
0163
0164 Say N if unsure.
0165
0166 config CORESIGHT_CTI
0167 tristate "CoreSight Cross Trigger Interface (CTI) driver"
0168 depends on ARM || ARM64
0169 help
0170 This driver provides support for CoreSight CTI and CTM components.
0171 These provide hardware triggering events between CoreSight trace
0172 source and sink components. These can be used to halt trace or
0173 inject events into the trace stream. CTI also provides a software
0174 control to trigger the same halt events. This can provide fast trace
0175 halt compared to disabling sources and sinks normally in driver
0176 software.
0177
0178 To compile this driver as a module, choose M here: the
0179 module will be called coresight-cti.
0180
0181 config CORESIGHT_CTI_INTEGRATION_REGS
0182 bool "Access CTI CoreSight Integration Registers"
0183 depends on CORESIGHT_CTI
0184 help
0185 This option adds support for the CoreSight integration registers on
0186 this device. The integration registers allow the exploration of the
0187 CTI trigger connections between this and other devices.These
0188 registers are not used in normal operation and can leave devices in
0189 an inconsistent state.
0190
0191 config CORESIGHT_TRBE
0192 tristate "Trace Buffer Extension (TRBE) driver"
0193 depends on ARM64 && CORESIGHT_SOURCE_ETM4X
0194 help
0195 This driver provides support for percpu Trace Buffer Extension (TRBE).
0196 TRBE always needs to be used along with it's corresponding percpu ETE
0197 component. ETE generates trace data which is then captured with TRBE.
0198 Unlike traditional sink devices, TRBE is a CPU feature accessible via
0199 system registers. But it's explicit dependency with trace unit (ETE)
0200 requires it to be plugged in as a coresight sink device.
0201
0202 To compile this driver as a module, choose M here: the module will be
0203 called coresight-trbe.
0204 endif
