drivers/hwspinlock/u8500_hsem.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * u8500 HWSEM driver
0004  *
0005  * Copyright (C) 2010-2011 ST-Ericsson
0006  *
0007  * Implements u8500 semaphore handling for protocol 1, no interrupts.
0008  *
0009  * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
0010  * Heavily borrowed from the work of :
0011  *   Simon Que <sque@ti.com>
0012  *   Hari Kanigeri <h-kanigeri2@ti.com>
0013  *   Ohad Ben-Cohen <ohad@wizery.com>
0014  */
0015
0016 #include <linux/module.h>
0017 #include <linux/delay.h>
0018 #include <linux/io.h>
0019 #include <linux/slab.h>
0020 #include <linux/spinlock.h>
0021 #include <linux/hwspinlock.h>
0022 #include <linux/platform_device.h>
0023
0024 #include "hwspinlock_internal.h"
0025
0026 /*
0027  * Implementation of STE's HSem protocol 1 without interrutps.
0028  * The only masterID we allow is '0x01' to force people to use
0029  * HSems for synchronisation between processors rather than processes
0030  * on the ARM core.
0031  */
0032
0033 #define U8500_MAX_SEMAPHORE     32  /* a total of 32 semaphore */
0034 #define RESET_SEMAPHORE         (0) /* free */
0035
0036 /*
0037  * CPU ID for master running u8500 kernel.
0038  * Hswpinlocks should only be used to synchonise operations
0039  * between the Cortex A9 core and the other CPUs.  Hence
0040  * forcing the masterID to a preset value.
0041  */
0042 #define HSEM_MASTER_ID          0x01
0043
0044 #define HSEM_REGISTER_OFFSET        0x08
0045
0046 #define HSEM_CTRL_REG           0x00
0047 #define HSEM_ICRALL         0x90
0048 #define HSEM_PROTOCOL_1         0x01
0049
0050 static int u8500_hsem_trylock(struct hwspinlock *lock)
0051 {
0052     void __iomem *lock_addr = lock->priv;
0053
0054     writel(HSEM_MASTER_ID, lock_addr);
0055
0056     /* get only first 4 bit and compare to masterID.
0057      * if equal, we have the semaphore, otherwise
0058      * someone else has it.
0059      */
0060     return (HSEM_MASTER_ID == (0x0F & readl(lock_addr)));
0061 }
0062
0063 static void u8500_hsem_unlock(struct hwspinlock *lock)
0064 {
0065     void __iomem *lock_addr = lock->priv;
0066
0067     /* release the lock by writing 0 to it */
0068     writel(RESET_SEMAPHORE, lock_addr);
0069 }
0070
0071 /*
0072  * u8500: what value is recommended here ?
0073  */
0074 static void u8500_hsem_relax(struct hwspinlock *lock)
0075 {
0076     ndelay(50);
0077 }
0078
0079 static const struct hwspinlock_ops u8500_hwspinlock_ops = {
0080     .trylock    = u8500_hsem_trylock,
0081     .unlock     = u8500_hsem_unlock,
0082     .relax      = u8500_hsem_relax,
0083 };
0084
0085 static int u8500_hsem_probe(struct platform_device *pdev)
0086 {
0087     struct hwspinlock_pdata *pdata = pdev->dev.platform_data;
0088     struct hwspinlock_device *bank;
0089     struct hwspinlock *hwlock;
0090     void __iomem *io_base;
0091     int i, num_locks = U8500_MAX_SEMAPHORE;
0092     ulong val;
0093
0094     if (!pdata)
0095         return -ENODEV;
0096
0097     io_base = devm_platform_ioremap_resource(pdev, 0);
0098     if (IS_ERR(io_base))
0099         return PTR_ERR(io_base);
0100
0101     /* make sure protocol 1 is selected */
0102     val = readl(io_base + HSEM_CTRL_REG);
0103     writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG);
0104
0105     /* clear all interrupts */
0106     writel(0xFFFF, io_base + HSEM_ICRALL);
0107
0108     bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
0109                 GFP_KERNEL);
0110     if (!bank)
0111         return -ENOMEM;
0112
0113     platform_set_drvdata(pdev, bank);
0114
0115     for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
0116         hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i;
0117
0118     return devm_hwspin_lock_register(&pdev->dev, bank,
0119                      &u8500_hwspinlock_ops,
0120                      pdata->base_id, num_locks);
0121 }
0122
0123 static int u8500_hsem_remove(struct platform_device *pdev)
0124 {
0125     struct hwspinlock_device *bank = platform_get_drvdata(pdev);
0126     void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET;
0127
0128     /* clear all interrupts */
0129     writel(0xFFFF, io_base + HSEM_ICRALL);
0130
0131     return 0;
0132 }
0133
0134 static struct platform_driver u8500_hsem_driver = {
0135     .probe      = u8500_hsem_probe,
0136     .remove     = u8500_hsem_remove,
0137     .driver     = {
0138         .name   = "u8500_hsem",
0139     },
0140 };
0141
0142 static int __init u8500_hsem_init(void)
0143 {
0144     return platform_driver_register(&u8500_hsem_driver);
0145 }
0146 /* board init code might need to reserve hwspinlocks for predefined purposes */
0147 postcore_initcall(u8500_hsem_init);
0148
0149 static void __exit u8500_hsem_exit(void)
0150 {
0151     platform_driver_unregister(&u8500_hsem_driver);
0152 }
0153 module_exit(u8500_hsem_exit);
0154
0155 MODULE_LICENSE("GPL v2");
0156 MODULE_DESCRIPTION("Hardware Spinlock driver for u8500");
0157 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");