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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * OMAP hardware spinlock driver
0004  *
0005  * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
0006  *
0007  * Contact: Simon Que <sque@ti.com>
0008  *          Hari Kanigeri <h-kanigeri2@ti.com>
0009  *          Ohad Ben-Cohen <ohad@wizery.com>
0010  *          Suman Anna <s-anna@ti.com>
0011  */
0012 
0013 #include <linux/kernel.h>
0014 #include <linux/module.h>
0015 #include <linux/device.h>
0016 #include <linux/delay.h>
0017 #include <linux/io.h>
0018 #include <linux/bitops.h>
0019 #include <linux/pm_runtime.h>
0020 #include <linux/slab.h>
0021 #include <linux/spinlock.h>
0022 #include <linux/hwspinlock.h>
0023 #include <linux/of.h>
0024 #include <linux/platform_device.h>
0025 
0026 #include "hwspinlock_internal.h"
0027 
0028 /* Spinlock register offsets */
0029 #define SYSSTATUS_OFFSET        0x0014
0030 #define LOCK_BASE_OFFSET        0x0800
0031 
0032 #define SPINLOCK_NUMLOCKS_BIT_OFFSET    (24)
0033 
0034 /* Possible values of SPINLOCK_LOCK_REG */
0035 #define SPINLOCK_NOTTAKEN       (0) /* free */
0036 #define SPINLOCK_TAKEN          (1) /* locked */
0037 
0038 static int omap_hwspinlock_trylock(struct hwspinlock *lock)
0039 {
0040     void __iomem *lock_addr = lock->priv;
0041 
0042     /* attempt to acquire the lock by reading its value */
0043     return (SPINLOCK_NOTTAKEN == readl(lock_addr));
0044 }
0045 
0046 static void omap_hwspinlock_unlock(struct hwspinlock *lock)
0047 {
0048     void __iomem *lock_addr = lock->priv;
0049 
0050     /* release the lock by writing 0 to it */
0051     writel(SPINLOCK_NOTTAKEN, lock_addr);
0052 }
0053 
0054 /*
0055  * relax the OMAP interconnect while spinning on it.
0056  *
0057  * The specs recommended that the retry delay time will be
0058  * just over half of the time that a requester would be
0059  * expected to hold the lock.
0060  *
0061  * The number below is taken from an hardware specs example,
0062  * obviously it is somewhat arbitrary.
0063  */
0064 static void omap_hwspinlock_relax(struct hwspinlock *lock)
0065 {
0066     ndelay(50);
0067 }
0068 
0069 static const struct hwspinlock_ops omap_hwspinlock_ops = {
0070     .trylock = omap_hwspinlock_trylock,
0071     .unlock = omap_hwspinlock_unlock,
0072     .relax = omap_hwspinlock_relax,
0073 };
0074 
0075 static int omap_hwspinlock_probe(struct platform_device *pdev)
0076 {
0077     struct device_node *node = pdev->dev.of_node;
0078     struct hwspinlock_device *bank;
0079     struct hwspinlock *hwlock;
0080     void __iomem *io_base;
0081     int num_locks, i, ret;
0082     /* Only a single hwspinlock block device is supported */
0083     int base_id = 0;
0084 
0085     if (!node)
0086         return -ENODEV;
0087 
0088     io_base = devm_platform_ioremap_resource(pdev, 0);
0089     if (IS_ERR(io_base))
0090         return PTR_ERR(io_base);
0091 
0092     /*
0093      * make sure the module is enabled and clocked before reading
0094      * the module SYSSTATUS register
0095      */
0096     pm_runtime_enable(&pdev->dev);
0097     ret = pm_runtime_resume_and_get(&pdev->dev);
0098     if (ret < 0)
0099         goto runtime_err;
0100 
0101     /* Determine number of locks */
0102     i = readl(io_base + SYSSTATUS_OFFSET);
0103     i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
0104 
0105     /*
0106      * runtime PM will make sure the clock of this module is
0107      * enabled again iff at least one lock is requested
0108      */
0109     ret = pm_runtime_put(&pdev->dev);
0110     if (ret < 0)
0111         goto runtime_err;
0112 
0113     /* one of the four lsb's must be set, and nothing else */
0114     if (hweight_long(i & 0xf) != 1 || i > 8) {
0115         ret = -EINVAL;
0116         goto runtime_err;
0117     }
0118 
0119     num_locks = i * 32; /* actual number of locks in this device */
0120 
0121     bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
0122                 GFP_KERNEL);
0123     if (!bank) {
0124         ret = -ENOMEM;
0125         goto runtime_err;
0126     }
0127 
0128     platform_set_drvdata(pdev, bank);
0129 
0130     for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
0131         hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
0132 
0133     ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
0134                         base_id, num_locks);
0135     if (ret)
0136         goto runtime_err;
0137 
0138     dev_dbg(&pdev->dev, "Registered %d locks with HwSpinlock core\n",
0139         num_locks);
0140 
0141     return 0;
0142 
0143 runtime_err:
0144     pm_runtime_disable(&pdev->dev);
0145     return ret;
0146 }
0147 
0148 static int omap_hwspinlock_remove(struct platform_device *pdev)
0149 {
0150     struct hwspinlock_device *bank = platform_get_drvdata(pdev);
0151     int ret;
0152 
0153     ret = hwspin_lock_unregister(bank);
0154     if (ret) {
0155         dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
0156         return ret;
0157     }
0158 
0159     pm_runtime_disable(&pdev->dev);
0160 
0161     return 0;
0162 }
0163 
0164 static const struct of_device_id omap_hwspinlock_of_match[] = {
0165     { .compatible = "ti,omap4-hwspinlock", },
0166     { .compatible = "ti,am64-hwspinlock", },
0167     { .compatible = "ti,am654-hwspinlock", },
0168     { /* end */ },
0169 };
0170 MODULE_DEVICE_TABLE(of, omap_hwspinlock_of_match);
0171 
0172 static struct platform_driver omap_hwspinlock_driver = {
0173     .probe      = omap_hwspinlock_probe,
0174     .remove     = omap_hwspinlock_remove,
0175     .driver     = {
0176         .name   = "omap_hwspinlock",
0177         .of_match_table = of_match_ptr(omap_hwspinlock_of_match),
0178     },
0179 };
0180 
0181 static int __init omap_hwspinlock_init(void)
0182 {
0183     return platform_driver_register(&omap_hwspinlock_driver);
0184 }
0185 /* board init code might need to reserve hwspinlocks for predefined purposes */
0186 postcore_initcall(omap_hwspinlock_init);
0187 
0188 static void __exit omap_hwspinlock_exit(void)
0189 {
0190     platform_driver_unregister(&omap_hwspinlock_driver);
0191 }
0192 module_exit(omap_hwspinlock_exit);
0193 
0194 MODULE_LICENSE("GPL v2");
0195 MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
0196 MODULE_AUTHOR("Simon Que <sque@ti.com>");
0197 MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
0198 MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");