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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
0004  *         monitoring
0005  * Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
0006  *                Philip Edelbrock <phil@netroedge.com>,
0007  *                and Mark Studebaker <mdsxyz123@yahoo.com>
0008  * Copyright (c) 2007 - 2008  Jean Delvare <jdelvare@suse.de>
0009  */
0010 
0011 /*
0012  * Supports following chips:
0013  *
0014  * Chip     #vin    #fanin  #pwm    #temp   wchipid vendid  i2c ISA
0015  * as99127f 7   3   0   3   0x31    0x12c3  yes no
0016  * as99127f rev.2 (type_name = as99127f)    0x31    0x5ca3  yes no
0017  * w83781d  7   3   0   3   0x10-1  0x5ca3  yes yes
0018  * w83782d  9   3   2-4 3   0x30    0x5ca3  yes yes
0019  * w83783s  5-6 3   2   1-2 0x40    0x5ca3  yes no
0020  *
0021  */
0022 
0023 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0024 
0025 #include <linux/module.h>
0026 #include <linux/init.h>
0027 #include <linux/slab.h>
0028 #include <linux/jiffies.h>
0029 #include <linux/i2c.h>
0030 #include <linux/hwmon.h>
0031 #include <linux/hwmon-vid.h>
0032 #include <linux/hwmon-sysfs.h>
0033 #include <linux/sysfs.h>
0034 #include <linux/err.h>
0035 #include <linux/mutex.h>
0036 
0037 #ifdef CONFIG_ISA
0038 #include <linux/platform_device.h>
0039 #include <linux/ioport.h>
0040 #include <linux/io.h>
0041 #endif
0042 
0043 #include "lm75.h"
0044 
0045 /* Addresses to scan */
0046 static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
0047                         0x2e, 0x2f, I2C_CLIENT_END };
0048 
0049 enum chips { w83781d, w83782d, w83783s, as99127f };
0050 
0051 /* Insmod parameters */
0052 static unsigned short force_subclients[4];
0053 module_param_array(force_subclients, short, NULL, 0);
0054 MODULE_PARM_DESC(force_subclients,
0055          "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
0056 
0057 static bool reset;
0058 module_param(reset, bool, 0);
0059 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
0060 
0061 static bool init = 1;
0062 module_param(init, bool, 0);
0063 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
0064 
0065 /* Constants specified below */
0066 
0067 /* Length of ISA address segment */
0068 #define W83781D_EXTENT          8
0069 
0070 /* Where are the ISA address/data registers relative to the base address */
0071 #define W83781D_ADDR_REG_OFFSET     5
0072 #define W83781D_DATA_REG_OFFSET     6
0073 
0074 /* The device registers */
0075 /* in nr from 0 to 8 */
0076 #define W83781D_REG_IN_MAX(nr)      ((nr < 7) ? (0x2b + (nr) * 2) : \
0077                             (0x554 + (((nr) - 7) * 2)))
0078 #define W83781D_REG_IN_MIN(nr)      ((nr < 7) ? (0x2c + (nr) * 2) : \
0079                             (0x555 + (((nr) - 7) * 2)))
0080 #define W83781D_REG_IN(nr)      ((nr < 7) ? (0x20 + (nr)) : \
0081                             (0x550 + (nr) - 7))
0082 
0083 /* fan nr from 0 to 2 */
0084 #define W83781D_REG_FAN_MIN(nr)     (0x3b + (nr))
0085 #define W83781D_REG_FAN(nr)     (0x28 + (nr))
0086 
0087 #define W83781D_REG_BANK        0x4E
0088 #define W83781D_REG_TEMP2_CONFIG    0x152
0089 #define W83781D_REG_TEMP3_CONFIG    0x252
0090 /* temp nr from 1 to 3 */
0091 #define W83781D_REG_TEMP(nr)        ((nr == 3) ? (0x0250) : \
0092                     ((nr == 2) ? (0x0150) : \
0093                              (0x27)))
0094 #define W83781D_REG_TEMP_HYST(nr)   ((nr == 3) ? (0x253) : \
0095                     ((nr == 2) ? (0x153) : \
0096                              (0x3A)))
0097 #define W83781D_REG_TEMP_OVER(nr)   ((nr == 3) ? (0x255) : \
0098                     ((nr == 2) ? (0x155) : \
0099                              (0x39)))
0100 
0101 #define W83781D_REG_CONFIG      0x40
0102 
0103 /* Interrupt status (W83781D, AS99127F) */
0104 #define W83781D_REG_ALARM1      0x41
0105 #define W83781D_REG_ALARM2      0x42
0106 
0107 /* Real-time status (W83782D, W83783S) */
0108 #define W83782D_REG_ALARM1      0x459
0109 #define W83782D_REG_ALARM2      0x45A
0110 #define W83782D_REG_ALARM3      0x45B
0111 
0112 #define W83781D_REG_BEEP_CONFIG     0x4D
0113 #define W83781D_REG_BEEP_INTS1      0x56
0114 #define W83781D_REG_BEEP_INTS2      0x57
0115 #define W83781D_REG_BEEP_INTS3      0x453   /* not on W83781D */
0116 
0117 #define W83781D_REG_VID_FANDIV      0x47
0118 
0119 #define W83781D_REG_CHIPID      0x49
0120 #define W83781D_REG_WCHIPID     0x58
0121 #define W83781D_REG_CHIPMAN     0x4F
0122 #define W83781D_REG_PIN         0x4B
0123 
0124 /* 782D/783S only */
0125 #define W83781D_REG_VBAT        0x5D
0126 
0127 /* PWM 782D (1-4) and 783S (1-2) only */
0128 static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
0129 #define W83781D_REG_PWMCLK12        0x5C
0130 #define W83781D_REG_PWMCLK34        0x45C
0131 
0132 #define W83781D_REG_I2C_ADDR        0x48
0133 #define W83781D_REG_I2C_SUBADDR     0x4A
0134 
0135 /*
0136  * The following are undocumented in the data sheets however we
0137  * received the information in an email from Winbond tech support
0138  */
0139 /* Sensor selection - not on 781d */
0140 #define W83781D_REG_SCFG1       0x5D
0141 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
0142 
0143 #define W83781D_REG_SCFG2       0x59
0144 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
0145 
0146 #define W83781D_DEFAULT_BETA        3435
0147 
0148 /* Conversions */
0149 #define IN_TO_REG(val)          clamp_val(((val) + 8) / 16, 0, 255)
0150 #define IN_FROM_REG(val)        ((val) * 16)
0151 
0152 static inline u8
0153 FAN_TO_REG(long rpm, int div)
0154 {
0155     if (rpm == 0)
0156         return 255;
0157     rpm = clamp_val(rpm, 1, 1000000);
0158     return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
0159 }
0160 
0161 static inline long
0162 FAN_FROM_REG(u8 val, int div)
0163 {
0164     if (val == 0)
0165         return -1;
0166     if (val == 255)
0167         return 0;
0168     return 1350000 / (val * div);
0169 }
0170 
0171 #define TEMP_TO_REG(val)        clamp_val((val) / 1000, -127, 128)
0172 #define TEMP_FROM_REG(val)      ((val) * 1000)
0173 
0174 #define BEEP_MASK_FROM_REG(val, type)   ((type) == as99127f ? \
0175                      (~(val)) & 0x7fff : (val) & 0xff7fff)
0176 #define BEEP_MASK_TO_REG(val, type) ((type) == as99127f ? \
0177                      (~(val)) & 0x7fff : (val) & 0xff7fff)
0178 
0179 #define DIV_FROM_REG(val)       (1 << (val))
0180 
0181 static inline u8
0182 DIV_TO_REG(long val, enum chips type)
0183 {
0184     int i;
0185     val = clamp_val(val, 1,
0186             ((type == w83781d || type == as99127f) ? 8 : 128)) >> 1;
0187     for (i = 0; i < 7; i++) {
0188         if (val == 0)
0189             break;
0190         val >>= 1;
0191     }
0192     return i;
0193 }
0194 
0195 struct w83781d_data {
0196     struct i2c_client *client;
0197     struct device *hwmon_dev;
0198     struct mutex lock;
0199     enum chips type;
0200 
0201     /* For ISA device only */
0202     const char *name;
0203     int isa_addr;
0204 
0205     struct mutex update_lock;
0206     bool valid;     /* true if following fields are valid */
0207     unsigned long last_updated; /* In jiffies */
0208 
0209     struct i2c_client *lm75[2]; /* for secondary I2C addresses */
0210     /* array of 2 pointers to subclients */
0211 
0212     u8 in[9];       /* Register value - 8 & 9 for 782D only */
0213     u8 in_max[9];       /* Register value - 8 & 9 for 782D only */
0214     u8 in_min[9];       /* Register value - 8 & 9 for 782D only */
0215     u8 fan[3];      /* Register value */
0216     u8 fan_min[3];      /* Register value */
0217     s8 temp;        /* Register value */
0218     s8 temp_max;        /* Register value */
0219     s8 temp_max_hyst;   /* Register value */
0220     u16 temp_add[2];    /* Register value */
0221     u16 temp_max_add[2];    /* Register value */
0222     u16 temp_max_hyst_add[2];   /* Register value */
0223     u8 fan_div[3];      /* Register encoding, shifted right */
0224     u8 vid;         /* Register encoding, combined */
0225     u32 alarms;     /* Register encoding, combined */
0226     u32 beep_mask;      /* Register encoding, combined */
0227     u8 pwm[4];      /* Register value */
0228     u8 pwm2_enable;     /* Boolean */
0229     u16 sens[3];        /*
0230                  * 782D/783S only.
0231                  * 1 = pentium diode; 2 = 3904 diode;
0232                  * 4 = thermistor
0233                  */
0234     u8 vrm;
0235 };
0236 
0237 static struct w83781d_data *w83781d_data_if_isa(void);
0238 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
0239 
0240 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
0241 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
0242 static struct w83781d_data *w83781d_update_device(struct device *dev);
0243 static void w83781d_init_device(struct device *dev);
0244 
0245 /* following are the sysfs callback functions */
0246 #define show_in_reg(reg) \
0247 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
0248         char *buf) \
0249 { \
0250     struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
0251     struct w83781d_data *data = w83781d_update_device(dev); \
0252     return sprintf(buf, "%ld\n", \
0253                (long)IN_FROM_REG(data->reg[attr->index])); \
0254 }
0255 show_in_reg(in);
0256 show_in_reg(in_min);
0257 show_in_reg(in_max);
0258 
0259 #define store_in_reg(REG, reg) \
0260 static ssize_t store_in_##reg(struct device *dev, struct device_attribute \
0261         *da, const char *buf, size_t count) \
0262 { \
0263     struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
0264     struct w83781d_data *data = dev_get_drvdata(dev); \
0265     int nr = attr->index; \
0266     unsigned long val; \
0267     int err = kstrtoul(buf, 10, &val); \
0268     if (err) \
0269         return err; \
0270     mutex_lock(&data->update_lock); \
0271     data->in_##reg[nr] = IN_TO_REG(val); \
0272     w83781d_write_value(data, W83781D_REG_IN_##REG(nr), \
0273                 data->in_##reg[nr]); \
0274     \
0275     mutex_unlock(&data->update_lock); \
0276     return count; \
0277 }
0278 store_in_reg(MIN, min);
0279 store_in_reg(MAX, max);
0280 
0281 #define sysfs_in_offsets(offset) \
0282 static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
0283         show_in, NULL, offset); \
0284 static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
0285         show_in_min, store_in_min, offset); \
0286 static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
0287         show_in_max, store_in_max, offset)
0288 
0289 sysfs_in_offsets(0);
0290 sysfs_in_offsets(1);
0291 sysfs_in_offsets(2);
0292 sysfs_in_offsets(3);
0293 sysfs_in_offsets(4);
0294 sysfs_in_offsets(5);
0295 sysfs_in_offsets(6);
0296 sysfs_in_offsets(7);
0297 sysfs_in_offsets(8);
0298 
0299 #define show_fan_reg(reg) \
0300 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
0301         char *buf) \
0302 { \
0303     struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
0304     struct w83781d_data *data = w83781d_update_device(dev); \
0305     return sprintf(buf, "%ld\n", \
0306         FAN_FROM_REG(data->reg[attr->index], \
0307             DIV_FROM_REG(data->fan_div[attr->index]))); \
0308 }
0309 show_fan_reg(fan);
0310 show_fan_reg(fan_min);
0311 
0312 static ssize_t
0313 store_fan_min(struct device *dev, struct device_attribute *da,
0314         const char *buf, size_t count)
0315 {
0316     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0317     struct w83781d_data *data = dev_get_drvdata(dev);
0318     int nr = attr->index;
0319     unsigned long val;
0320     int err;
0321 
0322     err = kstrtoul(buf, 10, &val);
0323     if (err)
0324         return err;
0325 
0326     mutex_lock(&data->update_lock);
0327     data->fan_min[nr] =
0328         FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
0329     w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
0330                 data->fan_min[nr]);
0331 
0332     mutex_unlock(&data->update_lock);
0333     return count;
0334 }
0335 
0336 static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
0337 static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
0338         show_fan_min, store_fan_min, 0);
0339 static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
0340 static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
0341         show_fan_min, store_fan_min, 1);
0342 static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
0343 static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
0344         show_fan_min, store_fan_min, 2);
0345 
0346 #define show_temp_reg(reg) \
0347 static ssize_t show_##reg(struct device *dev, struct device_attribute *da, \
0348         char *buf) \
0349 { \
0350     struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
0351     struct w83781d_data *data = w83781d_update_device(dev); \
0352     int nr = attr->index; \
0353     if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
0354         return sprintf(buf, "%d\n", \
0355             LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
0356     } else {    /* TEMP1 */ \
0357         return sprintf(buf, "%ld\n", (long)TEMP_FROM_REG(data->reg)); \
0358     } \
0359 }
0360 show_temp_reg(temp);
0361 show_temp_reg(temp_max);
0362 show_temp_reg(temp_max_hyst);
0363 
0364 #define store_temp_reg(REG, reg) \
0365 static ssize_t store_temp_##reg(struct device *dev, \
0366         struct device_attribute *da, const char *buf, size_t count) \
0367 { \
0368     struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
0369     struct w83781d_data *data = dev_get_drvdata(dev); \
0370     int nr = attr->index; \
0371     long val; \
0372     int err = kstrtol(buf, 10, &val); \
0373     if (err) \
0374         return err; \
0375     mutex_lock(&data->update_lock); \
0376      \
0377     if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
0378         data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
0379         w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
0380                 data->temp_##reg##_add[nr-2]); \
0381     } else {    /* TEMP1 */ \
0382         data->temp_##reg = TEMP_TO_REG(val); \
0383         w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
0384             data->temp_##reg); \
0385     } \
0386      \
0387     mutex_unlock(&data->update_lock); \
0388     return count; \
0389 }
0390 store_temp_reg(OVER, max);
0391 store_temp_reg(HYST, max_hyst);
0392 
0393 #define sysfs_temp_offsets(offset) \
0394 static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
0395         show_temp, NULL, offset); \
0396 static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
0397         show_temp_max, store_temp_max, offset); \
0398 static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
0399         show_temp_max_hyst, store_temp_max_hyst, offset);
0400 
0401 sysfs_temp_offsets(1);
0402 sysfs_temp_offsets(2);
0403 sysfs_temp_offsets(3);
0404 
0405 static ssize_t
0406 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
0407 {
0408     struct w83781d_data *data = w83781d_update_device(dev);
0409     return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
0410 }
0411 
0412 static DEVICE_ATTR_RO(cpu0_vid);
0413 
0414 static ssize_t
0415 vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
0416 {
0417     struct w83781d_data *data = dev_get_drvdata(dev);
0418     return sprintf(buf, "%ld\n", (long) data->vrm);
0419 }
0420 
0421 static ssize_t
0422 vrm_store(struct device *dev, struct device_attribute *attr, const char *buf,
0423       size_t count)
0424 {
0425     struct w83781d_data *data = dev_get_drvdata(dev);
0426     unsigned long val;
0427     int err;
0428 
0429     err = kstrtoul(buf, 10, &val);
0430     if (err)
0431         return err;
0432     data->vrm = clamp_val(val, 0, 255);
0433 
0434     return count;
0435 }
0436 
0437 static DEVICE_ATTR_RW(vrm);
0438 
0439 static ssize_t
0440 alarms_show(struct device *dev, struct device_attribute *attr, char *buf)
0441 {
0442     struct w83781d_data *data = w83781d_update_device(dev);
0443     return sprintf(buf, "%u\n", data->alarms);
0444 }
0445 
0446 static DEVICE_ATTR_RO(alarms);
0447 
0448 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
0449         char *buf)
0450 {
0451     struct w83781d_data *data = w83781d_update_device(dev);
0452     int bitnr = to_sensor_dev_attr(attr)->index;
0453     return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
0454 }
0455 
0456 /* The W83781D has a single alarm bit for temp2 and temp3 */
0457 static ssize_t show_temp3_alarm(struct device *dev,
0458         struct device_attribute *attr, char *buf)
0459 {
0460     struct w83781d_data *data = w83781d_update_device(dev);
0461     int bitnr = (data->type == w83781d) ? 5 : 13;
0462     return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
0463 }
0464 
0465 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
0466 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
0467 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
0468 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
0469 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
0470 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
0471 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
0472 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
0473 static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
0474 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
0475 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
0476 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
0477 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
0478 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
0479 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
0480 
0481 static ssize_t beep_mask_show(struct device *dev,
0482                    struct device_attribute *attr, char *buf)
0483 {
0484     struct w83781d_data *data = w83781d_update_device(dev);
0485     return sprintf(buf, "%ld\n",
0486                (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
0487 }
0488 
0489 static ssize_t
0490 beep_mask_store(struct device *dev, struct device_attribute *attr,
0491         const char *buf, size_t count)
0492 {
0493     struct w83781d_data *data = dev_get_drvdata(dev);
0494     unsigned long val;
0495     int err;
0496 
0497     err = kstrtoul(buf, 10, &val);
0498     if (err)
0499         return err;
0500 
0501     mutex_lock(&data->update_lock);
0502     data->beep_mask &= 0x8000; /* preserve beep enable */
0503     data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
0504     w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
0505                 data->beep_mask & 0xff);
0506     w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
0507                 (data->beep_mask >> 8) & 0xff);
0508     if (data->type != w83781d && data->type != as99127f) {
0509         w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
0510                     ((data->beep_mask) >> 16) & 0xff);
0511     }
0512     mutex_unlock(&data->update_lock);
0513 
0514     return count;
0515 }
0516 
0517 static DEVICE_ATTR_RW(beep_mask);
0518 
0519 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
0520         char *buf)
0521 {
0522     struct w83781d_data *data = w83781d_update_device(dev);
0523     int bitnr = to_sensor_dev_attr(attr)->index;
0524     return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
0525 }
0526 
0527 static ssize_t
0528 store_beep(struct device *dev, struct device_attribute *attr,
0529         const char *buf, size_t count)
0530 {
0531     struct w83781d_data *data = dev_get_drvdata(dev);
0532     int bitnr = to_sensor_dev_attr(attr)->index;
0533     u8 reg;
0534     unsigned long bit;
0535     int err;
0536 
0537     err = kstrtoul(buf, 10, &bit);
0538     if (err)
0539         return err;
0540 
0541     if (bit & ~1)
0542         return -EINVAL;
0543 
0544     mutex_lock(&data->update_lock);
0545     if (bit)
0546         data->beep_mask |= (1 << bitnr);
0547     else
0548         data->beep_mask &= ~(1 << bitnr);
0549 
0550     if (bitnr < 8) {
0551         reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
0552         if (bit)
0553             reg |= (1 << bitnr);
0554         else
0555             reg &= ~(1 << bitnr);
0556         w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
0557     } else if (bitnr < 16) {
0558         reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
0559         if (bit)
0560             reg |= (1 << (bitnr - 8));
0561         else
0562             reg &= ~(1 << (bitnr - 8));
0563         w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
0564     } else {
0565         reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
0566         if (bit)
0567             reg |= (1 << (bitnr - 16));
0568         else
0569             reg &= ~(1 << (bitnr - 16));
0570         w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
0571     }
0572     mutex_unlock(&data->update_lock);
0573 
0574     return count;
0575 }
0576 
0577 /* The W83781D has a single beep bit for temp2 and temp3 */
0578 static ssize_t show_temp3_beep(struct device *dev,
0579         struct device_attribute *attr, char *buf)
0580 {
0581     struct w83781d_data *data = w83781d_update_device(dev);
0582     int bitnr = (data->type == w83781d) ? 5 : 13;
0583     return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
0584 }
0585 
0586 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
0587             show_beep, store_beep, 0);
0588 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
0589             show_beep, store_beep, 1);
0590 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
0591             show_beep, store_beep, 2);
0592 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
0593             show_beep, store_beep, 3);
0594 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
0595             show_beep, store_beep, 8);
0596 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
0597             show_beep, store_beep, 9);
0598 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
0599             show_beep, store_beep, 10);
0600 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
0601             show_beep, store_beep, 16);
0602 static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
0603             show_beep, store_beep, 17);
0604 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
0605             show_beep, store_beep, 6);
0606 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
0607             show_beep, store_beep, 7);
0608 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
0609             show_beep, store_beep, 11);
0610 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
0611             show_beep, store_beep, 4);
0612 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
0613             show_beep, store_beep, 5);
0614 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
0615             show_temp3_beep, store_beep, 13);
0616 static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
0617             show_beep, store_beep, 15);
0618 
0619 static ssize_t
0620 show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
0621 {
0622     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0623     struct w83781d_data *data = w83781d_update_device(dev);
0624     return sprintf(buf, "%ld\n",
0625                (long) DIV_FROM_REG(data->fan_div[attr->index]));
0626 }
0627 
0628 /*
0629  * Note: we save and restore the fan minimum here, because its value is
0630  * determined in part by the fan divisor.  This follows the principle of
0631  * least surprise; the user doesn't expect the fan minimum to change just
0632  * because the divisor changed.
0633  */
0634 static ssize_t
0635 store_fan_div(struct device *dev, struct device_attribute *da,
0636         const char *buf, size_t count)
0637 {
0638     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0639     struct w83781d_data *data = dev_get_drvdata(dev);
0640     unsigned long min;
0641     int nr = attr->index;
0642     u8 reg;
0643     unsigned long val;
0644     int err;
0645 
0646     err = kstrtoul(buf, 10, &val);
0647     if (err)
0648         return err;
0649 
0650     mutex_lock(&data->update_lock);
0651 
0652     /* Save fan_min */
0653     min = FAN_FROM_REG(data->fan_min[nr],
0654                DIV_FROM_REG(data->fan_div[nr]));
0655 
0656     data->fan_div[nr] = DIV_TO_REG(val, data->type);
0657 
0658     reg = (w83781d_read_value(data, nr == 2 ?
0659                   W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
0660         & (nr == 0 ? 0xcf : 0x3f))
0661           | ((data->fan_div[nr] & 0x03) << (nr == 0 ? 4 : 6));
0662     w83781d_write_value(data, nr == 2 ?
0663                 W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
0664 
0665     /* w83781d and as99127f don't have extended divisor bits */
0666     if (data->type != w83781d && data->type != as99127f) {
0667         reg = (w83781d_read_value(data, W83781D_REG_VBAT)
0668                & ~(1 << (5 + nr)))
0669             | ((data->fan_div[nr] & 0x04) << (3 + nr));
0670         w83781d_write_value(data, W83781D_REG_VBAT, reg);
0671     }
0672 
0673     /* Restore fan_min */
0674     data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
0675     w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
0676 
0677     mutex_unlock(&data->update_lock);
0678     return count;
0679 }
0680 
0681 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
0682         show_fan_div, store_fan_div, 0);
0683 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
0684         show_fan_div, store_fan_div, 1);
0685 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
0686         show_fan_div, store_fan_div, 2);
0687 
0688 static ssize_t
0689 show_pwm(struct device *dev, struct device_attribute *da, char *buf)
0690 {
0691     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0692     struct w83781d_data *data = w83781d_update_device(dev);
0693     return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
0694 }
0695 
0696 static ssize_t
0697 pwm2_enable_show(struct device *dev, struct device_attribute *da, char *buf)
0698 {
0699     struct w83781d_data *data = w83781d_update_device(dev);
0700     return sprintf(buf, "%d\n", (int)data->pwm2_enable);
0701 }
0702 
0703 static ssize_t
0704 store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
0705         size_t count)
0706 {
0707     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0708     struct w83781d_data *data = dev_get_drvdata(dev);
0709     int nr = attr->index;
0710     unsigned long val;
0711     int err;
0712 
0713     err = kstrtoul(buf, 10, &val);
0714     if (err)
0715         return err;
0716 
0717     mutex_lock(&data->update_lock);
0718     data->pwm[nr] = clamp_val(val, 0, 255);
0719     w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
0720     mutex_unlock(&data->update_lock);
0721     return count;
0722 }
0723 
0724 static ssize_t
0725 pwm2_enable_store(struct device *dev, struct device_attribute *da,
0726         const char *buf, size_t count)
0727 {
0728     struct w83781d_data *data = dev_get_drvdata(dev);
0729     unsigned long val;
0730     u32 reg;
0731     int err;
0732 
0733     err = kstrtoul(buf, 10, &val);
0734     if (err)
0735         return err;
0736 
0737     mutex_lock(&data->update_lock);
0738 
0739     switch (val) {
0740     case 0:
0741     case 1:
0742         reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
0743         w83781d_write_value(data, W83781D_REG_PWMCLK12,
0744                     (reg & 0xf7) | (val << 3));
0745 
0746         reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
0747         w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
0748                     (reg & 0xef) | (!val << 4));
0749 
0750         data->pwm2_enable = val;
0751         break;
0752 
0753     default:
0754         mutex_unlock(&data->update_lock);
0755         return -EINVAL;
0756     }
0757 
0758     mutex_unlock(&data->update_lock);
0759     return count;
0760 }
0761 
0762 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
0763 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
0764 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
0765 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
0766 /* only PWM2 can be enabled/disabled */
0767 static DEVICE_ATTR_RW(pwm2_enable);
0768 
0769 static ssize_t
0770 show_sensor(struct device *dev, struct device_attribute *da, char *buf)
0771 {
0772     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0773     struct w83781d_data *data = w83781d_update_device(dev);
0774     return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
0775 }
0776 
0777 static ssize_t
0778 store_sensor(struct device *dev, struct device_attribute *da,
0779         const char *buf, size_t count)
0780 {
0781     struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
0782     struct w83781d_data *data = dev_get_drvdata(dev);
0783     int nr = attr->index;
0784     unsigned long val;
0785     u32 tmp;
0786     int err;
0787 
0788     err = kstrtoul(buf, 10, &val);
0789     if (err)
0790         return err;
0791 
0792     mutex_lock(&data->update_lock);
0793 
0794     switch (val) {
0795     case 1:     /* PII/Celeron diode */
0796         tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
0797         w83781d_write_value(data, W83781D_REG_SCFG1,
0798                     tmp | BIT_SCFG1[nr]);
0799         tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
0800         w83781d_write_value(data, W83781D_REG_SCFG2,
0801                     tmp | BIT_SCFG2[nr]);
0802         data->sens[nr] = val;
0803         break;
0804     case 2:     /* 3904 */
0805         tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
0806         w83781d_write_value(data, W83781D_REG_SCFG1,
0807                     tmp | BIT_SCFG1[nr]);
0808         tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
0809         w83781d_write_value(data, W83781D_REG_SCFG2,
0810                     tmp & ~BIT_SCFG2[nr]);
0811         data->sens[nr] = val;
0812         break;
0813     case W83781D_DEFAULT_BETA:
0814         dev_warn(dev,
0815              "Sensor type %d is deprecated, please use 4 instead\n",
0816              W83781D_DEFAULT_BETA);
0817         fallthrough;
0818     case 4:     /* thermistor */
0819         tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
0820         w83781d_write_value(data, W83781D_REG_SCFG1,
0821                     tmp & ~BIT_SCFG1[nr]);
0822         data->sens[nr] = val;
0823         break;
0824     default:
0825         dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
0826                (long) val);
0827         break;
0828     }
0829 
0830     mutex_unlock(&data->update_lock);
0831     return count;
0832 }
0833 
0834 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
0835     show_sensor, store_sensor, 0);
0836 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
0837     show_sensor, store_sensor, 1);
0838 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
0839     show_sensor, store_sensor, 2);
0840 
0841 /*
0842  * Assumes that adapter is of I2C, not ISA variety.
0843  * OTHERWISE DON'T CALL THIS
0844  */
0845 static int
0846 w83781d_detect_subclients(struct i2c_client *new_client)
0847 {
0848     int i, val1 = 0, id;
0849     int err;
0850     int address = new_client->addr;
0851     unsigned short sc_addr[2];
0852     struct i2c_adapter *adapter = new_client->adapter;
0853     struct w83781d_data *data = i2c_get_clientdata(new_client);
0854     enum chips kind = data->type;
0855     int num_sc = 1;
0856 
0857     id = i2c_adapter_id(adapter);
0858 
0859     if (force_subclients[0] == id && force_subclients[1] == address) {
0860         for (i = 2; i <= 3; i++) {
0861             if (force_subclients[i] < 0x48 ||
0862                 force_subclients[i] > 0x4f) {
0863                 dev_err(&new_client->dev,
0864                     "Invalid subclient address %d; must be 0x48-0x4f\n",
0865                     force_subclients[i]);
0866                 err = -EINVAL;
0867                 goto ERROR_SC_1;
0868             }
0869         }
0870         w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
0871                 (force_subclients[2] & 0x07) |
0872                 ((force_subclients[3] & 0x07) << 4));
0873         sc_addr[0] = force_subclients[2];
0874     } else {
0875         val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
0876         sc_addr[0] = 0x48 + (val1 & 0x07);
0877     }
0878 
0879     if (kind != w83783s) {
0880         num_sc = 2;
0881         if (force_subclients[0] == id &&
0882             force_subclients[1] == address) {
0883             sc_addr[1] = force_subclients[3];
0884         } else {
0885             sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
0886         }
0887         if (sc_addr[0] == sc_addr[1]) {
0888             dev_err(&new_client->dev,
0889                    "Duplicate addresses 0x%x for subclients.\n",
0890                    sc_addr[0]);
0891             err = -EBUSY;
0892             goto ERROR_SC_2;
0893         }
0894     }
0895 
0896     for (i = 0; i < num_sc; i++) {
0897         data->lm75[i] = i2c_new_dummy_device(adapter, sc_addr[i]);
0898         if (IS_ERR(data->lm75[i])) {
0899             dev_err(&new_client->dev,
0900                 "Subclient %d registration at address 0x%x failed.\n",
0901                 i, sc_addr[i]);
0902             err = PTR_ERR(data->lm75[i]);
0903             if (i == 1)
0904                 goto ERROR_SC_3;
0905             goto ERROR_SC_2;
0906         }
0907     }
0908 
0909     return 0;
0910 
0911 /* Undo inits in case of errors */
0912 ERROR_SC_3:
0913     i2c_unregister_device(data->lm75[0]);
0914 ERROR_SC_2:
0915 ERROR_SC_1:
0916     return err;
0917 }
0918 
0919 #define IN_UNIT_ATTRS(X)                    \
0920     &sensor_dev_attr_in##X##_input.dev_attr.attr,       \
0921     &sensor_dev_attr_in##X##_min.dev_attr.attr,     \
0922     &sensor_dev_attr_in##X##_max.dev_attr.attr,     \
0923     &sensor_dev_attr_in##X##_alarm.dev_attr.attr,       \
0924     &sensor_dev_attr_in##X##_beep.dev_attr.attr
0925 
0926 #define FAN_UNIT_ATTRS(X)                   \
0927     &sensor_dev_attr_fan##X##_input.dev_attr.attr,      \
0928     &sensor_dev_attr_fan##X##_min.dev_attr.attr,        \
0929     &sensor_dev_attr_fan##X##_div.dev_attr.attr,        \
0930     &sensor_dev_attr_fan##X##_alarm.dev_attr.attr,      \
0931     &sensor_dev_attr_fan##X##_beep.dev_attr.attr
0932 
0933 #define TEMP_UNIT_ATTRS(X)                  \
0934     &sensor_dev_attr_temp##X##_input.dev_attr.attr,     \
0935     &sensor_dev_attr_temp##X##_max.dev_attr.attr,       \
0936     &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr,  \
0937     &sensor_dev_attr_temp##X##_alarm.dev_attr.attr,     \
0938     &sensor_dev_attr_temp##X##_beep.dev_attr.attr
0939 
0940 static struct attribute *w83781d_attributes[] = {
0941     IN_UNIT_ATTRS(0),
0942     IN_UNIT_ATTRS(2),
0943     IN_UNIT_ATTRS(3),
0944     IN_UNIT_ATTRS(4),
0945     IN_UNIT_ATTRS(5),
0946     IN_UNIT_ATTRS(6),
0947     FAN_UNIT_ATTRS(1),
0948     FAN_UNIT_ATTRS(2),
0949     FAN_UNIT_ATTRS(3),
0950     TEMP_UNIT_ATTRS(1),
0951     TEMP_UNIT_ATTRS(2),
0952     &dev_attr_cpu0_vid.attr,
0953     &dev_attr_vrm.attr,
0954     &dev_attr_alarms.attr,
0955     &dev_attr_beep_mask.attr,
0956     &sensor_dev_attr_beep_enable.dev_attr.attr,
0957     NULL
0958 };
0959 static const struct attribute_group w83781d_group = {
0960     .attrs = w83781d_attributes,
0961 };
0962 
0963 static struct attribute *w83781d_attributes_in1[] = {
0964     IN_UNIT_ATTRS(1),
0965     NULL
0966 };
0967 static const struct attribute_group w83781d_group_in1 = {
0968     .attrs = w83781d_attributes_in1,
0969 };
0970 
0971 static struct attribute *w83781d_attributes_in78[] = {
0972     IN_UNIT_ATTRS(7),
0973     IN_UNIT_ATTRS(8),
0974     NULL
0975 };
0976 static const struct attribute_group w83781d_group_in78 = {
0977     .attrs = w83781d_attributes_in78,
0978 };
0979 
0980 static struct attribute *w83781d_attributes_temp3[] = {
0981     TEMP_UNIT_ATTRS(3),
0982     NULL
0983 };
0984 static const struct attribute_group w83781d_group_temp3 = {
0985     .attrs = w83781d_attributes_temp3,
0986 };
0987 
0988 static struct attribute *w83781d_attributes_pwm12[] = {
0989     &sensor_dev_attr_pwm1.dev_attr.attr,
0990     &sensor_dev_attr_pwm2.dev_attr.attr,
0991     &dev_attr_pwm2_enable.attr,
0992     NULL
0993 };
0994 static const struct attribute_group w83781d_group_pwm12 = {
0995     .attrs = w83781d_attributes_pwm12,
0996 };
0997 
0998 static struct attribute *w83781d_attributes_pwm34[] = {
0999     &sensor_dev_attr_pwm3.dev_attr.attr,
1000     &sensor_dev_attr_pwm4.dev_attr.attr,
1001     NULL
1002 };
1003 static const struct attribute_group w83781d_group_pwm34 = {
1004     .attrs = w83781d_attributes_pwm34,
1005 };
1006 
1007 static struct attribute *w83781d_attributes_other[] = {
1008     &sensor_dev_attr_temp1_type.dev_attr.attr,
1009     &sensor_dev_attr_temp2_type.dev_attr.attr,
1010     &sensor_dev_attr_temp3_type.dev_attr.attr,
1011     NULL
1012 };
1013 static const struct attribute_group w83781d_group_other = {
1014     .attrs = w83781d_attributes_other,
1015 };
1016 
1017 /* No clean up is done on error, it's up to the caller */
1018 static int
1019 w83781d_create_files(struct device *dev, int kind, int is_isa)
1020 {
1021     int err;
1022 
1023     err = sysfs_create_group(&dev->kobj, &w83781d_group);
1024     if (err)
1025         return err;
1026 
1027     if (kind != w83783s) {
1028         err = sysfs_create_group(&dev->kobj, &w83781d_group_in1);
1029         if (err)
1030             return err;
1031     }
1032     if (kind != as99127f && kind != w83781d && kind != w83783s) {
1033         err = sysfs_create_group(&dev->kobj, &w83781d_group_in78);
1034         if (err)
1035             return err;
1036     }
1037     if (kind != w83783s) {
1038         err = sysfs_create_group(&dev->kobj, &w83781d_group_temp3);
1039         if (err)
1040             return err;
1041 
1042         if (kind != w83781d) {
1043             err = sysfs_chmod_file(&dev->kobj,
1044                 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1045                 S_IRUGO | S_IWUSR);
1046             if (err)
1047                 return err;
1048         }
1049     }
1050 
1051     if (kind != w83781d && kind != as99127f) {
1052         err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm12);
1053         if (err)
1054             return err;
1055     }
1056     if (kind == w83782d && !is_isa) {
1057         err = sysfs_create_group(&dev->kobj, &w83781d_group_pwm34);
1058         if (err)
1059             return err;
1060     }
1061 
1062     if (kind != as99127f && kind != w83781d) {
1063         err = device_create_file(dev,
1064                      &sensor_dev_attr_temp1_type.dev_attr);
1065         if (err)
1066             return err;
1067         err = device_create_file(dev,
1068                      &sensor_dev_attr_temp2_type.dev_attr);
1069         if (err)
1070             return err;
1071         if (kind != w83783s) {
1072             err = device_create_file(dev,
1073                     &sensor_dev_attr_temp3_type.dev_attr);
1074             if (err)
1075                 return err;
1076         }
1077     }
1078 
1079     return 0;
1080 }
1081 
1082 /* Return 0 if detection is successful, -ENODEV otherwise */
1083 static int
1084 w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
1085 {
1086     int val1, val2;
1087     struct w83781d_data *isa = w83781d_data_if_isa();
1088     struct i2c_adapter *adapter = client->adapter;
1089     int address = client->addr;
1090     const char *client_name;
1091     enum vendor { winbond, asus } vendid;
1092 
1093     if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1094         return -ENODEV;
1095 
1096     /*
1097      * We block updates of the ISA device to minimize the risk of
1098      * concurrent access to the same W83781D chip through different
1099      * interfaces.
1100      */
1101     if (isa)
1102         mutex_lock(&isa->update_lock);
1103 
1104     if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
1105         dev_dbg(&adapter->dev,
1106             "Detection of w83781d chip failed at step 3\n");
1107         goto err_nodev;
1108     }
1109 
1110     val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
1111     val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1112     /* Check for Winbond or Asus ID if in bank 0 */
1113     if (!(val1 & 0x07) &&
1114         ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
1115          ((val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
1116         dev_dbg(&adapter->dev,
1117             "Detection of w83781d chip failed at step 4\n");
1118         goto err_nodev;
1119     }
1120     /*
1121      * If Winbond SMBus, check address at 0x48.
1122      * Asus doesn't support, except for as99127f rev.2
1123      */
1124     if ((!(val1 & 0x80) && val2 == 0xa3) ||
1125         ((val1 & 0x80) && val2 == 0x5c)) {
1126         if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
1127             != address) {
1128             dev_dbg(&adapter->dev,
1129                 "Detection of w83781d chip failed at step 5\n");
1130             goto err_nodev;
1131         }
1132     }
1133 
1134     /* Put it now into bank 0 and Vendor ID High Byte */
1135     i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1136         (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
1137          & 0x78) | 0x80);
1138 
1139     /* Get the vendor ID */
1140     val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
1141     if (val2 == 0x5c)
1142         vendid = winbond;
1143     else if (val2 == 0x12)
1144         vendid = asus;
1145     else {
1146         dev_dbg(&adapter->dev,
1147             "w83781d chip vendor is neither Winbond nor Asus\n");
1148         goto err_nodev;
1149     }
1150 
1151     /* Determine the chip type. */
1152     val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
1153     if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1154         client_name = "w83781d";
1155     else if (val1 == 0x30 && vendid == winbond)
1156         client_name = "w83782d";
1157     else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1158         client_name = "w83783s";
1159     else if (val1 == 0x31)
1160         client_name = "as99127f";
1161     else
1162         goto err_nodev;
1163 
1164     if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
1165         dev_dbg(&adapter->dev,
1166             "Device at 0x%02x appears to be the same as ISA device\n",
1167             address);
1168         goto err_nodev;
1169     }
1170 
1171     if (isa)
1172         mutex_unlock(&isa->update_lock);
1173 
1174     strlcpy(info->type, client_name, I2C_NAME_SIZE);
1175 
1176     return 0;
1177 
1178  err_nodev:
1179     if (isa)
1180         mutex_unlock(&isa->update_lock);
1181     return -ENODEV;
1182 }
1183 
1184 static void w83781d_remove_files(struct device *dev)
1185 {
1186     sysfs_remove_group(&dev->kobj, &w83781d_group);
1187     sysfs_remove_group(&dev->kobj, &w83781d_group_in1);
1188     sysfs_remove_group(&dev->kobj, &w83781d_group_in78);
1189     sysfs_remove_group(&dev->kobj, &w83781d_group_temp3);
1190     sysfs_remove_group(&dev->kobj, &w83781d_group_pwm12);
1191     sysfs_remove_group(&dev->kobj, &w83781d_group_pwm34);
1192     sysfs_remove_group(&dev->kobj, &w83781d_group_other);
1193 }
1194 
1195 static const struct i2c_device_id w83781d_ids[];
1196 
1197 static int w83781d_probe(struct i2c_client *client)
1198 {
1199     struct device *dev = &client->dev;
1200     struct w83781d_data *data;
1201     int err;
1202 
1203     data = devm_kzalloc(dev, sizeof(struct w83781d_data), GFP_KERNEL);
1204     if (!data)
1205         return -ENOMEM;
1206 
1207     i2c_set_clientdata(client, data);
1208     mutex_init(&data->lock);
1209     mutex_init(&data->update_lock);
1210 
1211     data->type = i2c_match_id(w83781d_ids, client)->driver_data;
1212     data->client = client;
1213 
1214     /* attach secondary i2c lm75-like clients */
1215     err = w83781d_detect_subclients(client);
1216     if (err)
1217         return err;
1218 
1219     /* Initialize the chip */
1220     w83781d_init_device(dev);
1221 
1222     /* Register sysfs hooks */
1223     err = w83781d_create_files(dev, data->type, 0);
1224     if (err)
1225         goto exit_remove_files;
1226 
1227     data->hwmon_dev = hwmon_device_register(dev);
1228     if (IS_ERR(data->hwmon_dev)) {
1229         err = PTR_ERR(data->hwmon_dev);
1230         goto exit_remove_files;
1231     }
1232 
1233     return 0;
1234 
1235  exit_remove_files:
1236     w83781d_remove_files(dev);
1237     i2c_unregister_device(data->lm75[0]);
1238     i2c_unregister_device(data->lm75[1]);
1239     return err;
1240 }
1241 
1242 static int
1243 w83781d_remove(struct i2c_client *client)
1244 {
1245     struct w83781d_data *data = i2c_get_clientdata(client);
1246     struct device *dev = &client->dev;
1247 
1248     hwmon_device_unregister(data->hwmon_dev);
1249     w83781d_remove_files(dev);
1250 
1251     i2c_unregister_device(data->lm75[0]);
1252     i2c_unregister_device(data->lm75[1]);
1253 
1254     return 0;
1255 }
1256 
1257 static int
1258 w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
1259 {
1260     struct i2c_client *client = data->client;
1261     int res, bank;
1262     struct i2c_client *cl;
1263 
1264     bank = (reg >> 8) & 0x0f;
1265     if (bank > 2)
1266         /* switch banks */
1267         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1268                       bank);
1269     if (bank == 0 || bank > 2) {
1270         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1271     } else {
1272         /* switch to subclient */
1273         cl = data->lm75[bank - 1];
1274         /* convert from ISA to LM75 I2C addresses */
1275         switch (reg & 0xff) {
1276         case 0x50:  /* TEMP */
1277             res = i2c_smbus_read_word_swapped(cl, 0);
1278             break;
1279         case 0x52:  /* CONFIG */
1280             res = i2c_smbus_read_byte_data(cl, 1);
1281             break;
1282         case 0x53:  /* HYST */
1283             res = i2c_smbus_read_word_swapped(cl, 2);
1284             break;
1285         case 0x55:  /* OVER */
1286         default:
1287             res = i2c_smbus_read_word_swapped(cl, 3);
1288             break;
1289         }
1290     }
1291     if (bank > 2)
1292         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1293 
1294     return res;
1295 }
1296 
1297 static int
1298 w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
1299 {
1300     struct i2c_client *client = data->client;
1301     int bank;
1302     struct i2c_client *cl;
1303 
1304     bank = (reg >> 8) & 0x0f;
1305     if (bank > 2)
1306         /* switch banks */
1307         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1308                       bank);
1309     if (bank == 0 || bank > 2) {
1310         i2c_smbus_write_byte_data(client, reg & 0xff,
1311                       value & 0xff);
1312     } else {
1313         /* switch to subclient */
1314         cl = data->lm75[bank - 1];
1315         /* convert from ISA to LM75 I2C addresses */
1316         switch (reg & 0xff) {
1317         case 0x52:  /* CONFIG */
1318             i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1319             break;
1320         case 0x53:  /* HYST */
1321             i2c_smbus_write_word_swapped(cl, 2, value);
1322             break;
1323         case 0x55:  /* OVER */
1324             i2c_smbus_write_word_swapped(cl, 3, value);
1325             break;
1326         }
1327     }
1328     if (bank > 2)
1329         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1330 
1331     return 0;
1332 }
1333 
1334 static void
1335 w83781d_init_device(struct device *dev)
1336 {
1337     struct w83781d_data *data = dev_get_drvdata(dev);
1338     int i, p;
1339     int type = data->type;
1340     u8 tmp;
1341 
1342     if (reset && type != as99127f) { /*
1343                       * this resets registers we don't have
1344                       * documentation for on the as99127f
1345                       */
1346         /*
1347          * Resetting the chip has been the default for a long time,
1348          * but it causes the BIOS initializations (fan clock dividers,
1349          * thermal sensor types...) to be lost, so it is now optional.
1350          * It might even go away if nobody reports it as being useful,
1351          * as I see very little reason why this would be needed at
1352          * all.
1353          */
1354         dev_info(dev,
1355              "If reset=1 solved a problem you were having, please report!\n");
1356 
1357         /* save these registers */
1358         i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1359         p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1360         /*
1361          * Reset all except Watchdog values and last conversion values
1362          * This sets fan-divs to 2, among others
1363          */
1364         w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1365         /*
1366          * Restore the registers and disable power-on abnormal beep.
1367          * This saves FAN 1/2/3 input/output values set by BIOS.
1368          */
1369         w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1370         w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1371         /*
1372          * Disable master beep-enable (reset turns it on).
1373          * Individual beep_mask should be reset to off but for some
1374          * reason disabling this bit helps some people not get beeped
1375          */
1376         w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1377     }
1378 
1379     /*
1380      * Disable power-on abnormal beep, as advised by the datasheet.
1381      * Already done if reset=1.
1382      */
1383     if (init && !reset && type != as99127f) {
1384         i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1385         w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1386     }
1387 
1388     data->vrm = vid_which_vrm();
1389 
1390     if ((type != w83781d) && (type != as99127f)) {
1391         tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1392         for (i = 1; i <= 3; i++) {
1393             if (!(tmp & BIT_SCFG1[i - 1])) {
1394                 data->sens[i - 1] = 4;
1395             } else {
1396                 if (w83781d_read_value
1397                     (data,
1398                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1399                     data->sens[i - 1] = 1;
1400                 else
1401                     data->sens[i - 1] = 2;
1402             }
1403             if (type == w83783s && i == 2)
1404                 break;
1405         }
1406     }
1407 
1408     if (init && type != as99127f) {
1409         /* Enable temp2 */
1410         tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1411         if (tmp & 0x01) {
1412             dev_warn(dev,
1413                  "Enabling temp2, readings might not make sense\n");
1414             w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1415                 tmp & 0xfe);
1416         }
1417 
1418         /* Enable temp3 */
1419         if (type != w83783s) {
1420             tmp = w83781d_read_value(data,
1421                 W83781D_REG_TEMP3_CONFIG);
1422             if (tmp & 0x01) {
1423                 dev_warn(dev,
1424                      "Enabling temp3, readings might not make sense\n");
1425                 w83781d_write_value(data,
1426                     W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1427             }
1428         }
1429     }
1430 
1431     /* Start monitoring */
1432     w83781d_write_value(data, W83781D_REG_CONFIG,
1433                 (w83781d_read_value(data,
1434                         W83781D_REG_CONFIG) & 0xf7)
1435                 | 0x01);
1436 
1437     /* A few vars need to be filled upon startup */
1438     for (i = 0; i < 3; i++) {
1439         data->fan_min[i] = w83781d_read_value(data,
1440                     W83781D_REG_FAN_MIN(i));
1441     }
1442 
1443     mutex_init(&data->update_lock);
1444 }
1445 
1446 static struct w83781d_data *w83781d_update_device(struct device *dev)
1447 {
1448     struct w83781d_data *data = dev_get_drvdata(dev);
1449     struct i2c_client *client = data->client;
1450     int i;
1451 
1452     mutex_lock(&data->update_lock);
1453 
1454     if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1455         || !data->valid) {
1456         dev_dbg(dev, "Starting device update\n");
1457 
1458         for (i = 0; i <= 8; i++) {
1459             if (data->type == w83783s && i == 1)
1460                 continue;   /* 783S has no in1 */
1461             data->in[i] =
1462                 w83781d_read_value(data, W83781D_REG_IN(i));
1463             data->in_min[i] =
1464                 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1465             data->in_max[i] =
1466                 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1467             if ((data->type != w83782d) && (i == 6))
1468                 break;
1469         }
1470         for (i = 0; i < 3; i++) {
1471             data->fan[i] =
1472                 w83781d_read_value(data, W83781D_REG_FAN(i));
1473             data->fan_min[i] =
1474                 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1475         }
1476         if (data->type != w83781d && data->type != as99127f) {
1477             for (i = 0; i < 4; i++) {
1478                 data->pwm[i] =
1479                     w83781d_read_value(data,
1480                                W83781D_REG_PWM[i]);
1481                 /* Only W83782D on SMBus has PWM3 and PWM4 */
1482                 if ((data->type != w83782d || !client)
1483                     && i == 1)
1484                     break;
1485             }
1486             /* Only PWM2 can be disabled */
1487             data->pwm2_enable = (w83781d_read_value(data,
1488                          W83781D_REG_PWMCLK12) & 0x08) >> 3;
1489         }
1490 
1491         data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1492         data->temp_max =
1493             w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1494         data->temp_max_hyst =
1495             w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1496         data->temp_add[0] =
1497             w83781d_read_value(data, W83781D_REG_TEMP(2));
1498         data->temp_max_add[0] =
1499             w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1500         data->temp_max_hyst_add[0] =
1501             w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1502         if (data->type != w83783s) {
1503             data->temp_add[1] =
1504                 w83781d_read_value(data, W83781D_REG_TEMP(3));
1505             data->temp_max_add[1] =
1506                 w83781d_read_value(data,
1507                            W83781D_REG_TEMP_OVER(3));
1508             data->temp_max_hyst_add[1] =
1509                 w83781d_read_value(data,
1510                            W83781D_REG_TEMP_HYST(3));
1511         }
1512         i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1513         data->vid = i & 0x0f;
1514         data->vid |= (w83781d_read_value(data,
1515                     W83781D_REG_CHIPID) & 0x01) << 4;
1516         data->fan_div[0] = (i >> 4) & 0x03;
1517         data->fan_div[1] = (i >> 6) & 0x03;
1518         data->fan_div[2] = (w83781d_read_value(data,
1519                     W83781D_REG_PIN) >> 6) & 0x03;
1520         if ((data->type != w83781d) && (data->type != as99127f)) {
1521             i = w83781d_read_value(data, W83781D_REG_VBAT);
1522             data->fan_div[0] |= (i >> 3) & 0x04;
1523             data->fan_div[1] |= (i >> 4) & 0x04;
1524             data->fan_div[2] |= (i >> 5) & 0x04;
1525         }
1526         if (data->type == w83782d) {
1527             data->alarms = w83781d_read_value(data,
1528                         W83782D_REG_ALARM1)
1529                      | (w83781d_read_value(data,
1530                         W83782D_REG_ALARM2) << 8)
1531                      | (w83781d_read_value(data,
1532                         W83782D_REG_ALARM3) << 16);
1533         } else if (data->type == w83783s) {
1534             data->alarms = w83781d_read_value(data,
1535                         W83782D_REG_ALARM1)
1536                      | (w83781d_read_value(data,
1537                         W83782D_REG_ALARM2) << 8);
1538         } else {
1539             /*
1540              * No real-time status registers, fall back to
1541              * interrupt status registers
1542              */
1543             data->alarms = w83781d_read_value(data,
1544                         W83781D_REG_ALARM1)
1545                      | (w83781d_read_value(data,
1546                         W83781D_REG_ALARM2) << 8);
1547         }
1548         i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1549         data->beep_mask = (i << 8) +
1550             w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1551         if ((data->type != w83781d) && (data->type != as99127f)) {
1552             data->beep_mask |=
1553                 w83781d_read_value(data,
1554                            W83781D_REG_BEEP_INTS3) << 16;
1555         }
1556         data->last_updated = jiffies;
1557         data->valid = true;
1558     }
1559 
1560     mutex_unlock(&data->update_lock);
1561 
1562     return data;
1563 }
1564 
1565 static const struct i2c_device_id w83781d_ids[] = {
1566     { "w83781d", w83781d, },
1567     { "w83782d", w83782d, },
1568     { "w83783s", w83783s, },
1569     { "as99127f", as99127f },
1570     { /* LIST END */ }
1571 };
1572 MODULE_DEVICE_TABLE(i2c, w83781d_ids);
1573 
1574 static const struct of_device_id w83781d_of_match[] = {
1575     { .compatible = "winbond,w83781d" },
1576     { .compatible = "winbond,w83781g" },
1577     { .compatible = "winbond,w83782d" },
1578     { .compatible = "winbond,w83783s" },
1579     { .compatible = "asus,as99127f" },
1580     { },
1581 };
1582 MODULE_DEVICE_TABLE(of, w83781d_of_match);
1583 
1584 static struct i2c_driver w83781d_driver = {
1585     .class      = I2C_CLASS_HWMON,
1586     .driver = {
1587         .name = "w83781d",
1588         .of_match_table = w83781d_of_match,
1589     },
1590     .probe_new  = w83781d_probe,
1591     .remove     = w83781d_remove,
1592     .id_table   = w83781d_ids,
1593     .detect     = w83781d_detect,
1594     .address_list   = normal_i2c,
1595 };
1596 
1597 /*
1598  * ISA related code
1599  */
1600 #ifdef CONFIG_ISA
1601 
1602 /* ISA device, if found */
1603 static struct platform_device *pdev;
1604 
1605 static unsigned short isa_address = 0x290;
1606 
1607 /*
1608  * I2C devices get this name attribute automatically, but for ISA devices
1609  * we must create it by ourselves.
1610  */
1611 static ssize_t
1612 name_show(struct device *dev, struct device_attribute *devattr, char *buf)
1613 {
1614     struct w83781d_data *data = dev_get_drvdata(dev);
1615     return sprintf(buf, "%s\n", data->name);
1616 }
1617 static DEVICE_ATTR_RO(name);
1618 
1619 static struct w83781d_data *w83781d_data_if_isa(void)
1620 {
1621     return pdev ? platform_get_drvdata(pdev) : NULL;
1622 }
1623 
1624 /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
1625 static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
1626 {
1627     struct w83781d_data *isa;
1628     int i;
1629 
1630     if (!pdev)  /* No ISA chip */
1631         return 0;
1632 
1633     isa = platform_get_drvdata(pdev);
1634 
1635     if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
1636         return 0;   /* Address doesn't match */
1637     if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
1638         return 0;   /* Chip type doesn't match */
1639 
1640     /*
1641      * We compare all the limit registers, the config register and the
1642      * interrupt mask registers
1643      */
1644     for (i = 0x2b; i <= 0x3d; i++) {
1645         if (w83781d_read_value(isa, i) !=
1646             i2c_smbus_read_byte_data(client, i))
1647             return 0;
1648     }
1649     if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
1650         i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
1651         return 0;
1652     for (i = 0x43; i <= 0x46; i++) {
1653         if (w83781d_read_value(isa, i) !=
1654             i2c_smbus_read_byte_data(client, i))
1655             return 0;
1656     }
1657 
1658     return 1;
1659 }
1660 
1661 static int
1662 w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
1663 {
1664     int word_sized, res;
1665 
1666     word_sized = (((reg & 0xff00) == 0x100)
1667               || ((reg & 0xff00) == 0x200))
1668         && (((reg & 0x00ff) == 0x50)
1669         || ((reg & 0x00ff) == 0x53)
1670         || ((reg & 0x00ff) == 0x55));
1671     if (reg & 0xff00) {
1672         outb_p(W83781D_REG_BANK,
1673                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1674         outb_p(reg >> 8,
1675                data->isa_addr + W83781D_DATA_REG_OFFSET);
1676     }
1677     outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1678     res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
1679     if (word_sized) {
1680         outb_p((reg & 0xff) + 1,
1681                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1682         res =
1683             (res << 8) + inb_p(data->isa_addr +
1684                        W83781D_DATA_REG_OFFSET);
1685     }
1686     if (reg & 0xff00) {
1687         outb_p(W83781D_REG_BANK,
1688                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1689         outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1690     }
1691     return res;
1692 }
1693 
1694 static void
1695 w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
1696 {
1697     int word_sized;
1698 
1699     word_sized = (((reg & 0xff00) == 0x100)
1700               || ((reg & 0xff00) == 0x200))
1701         && (((reg & 0x00ff) == 0x53)
1702         || ((reg & 0x00ff) == 0x55));
1703     if (reg & 0xff00) {
1704         outb_p(W83781D_REG_BANK,
1705                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1706         outb_p(reg >> 8,
1707                data->isa_addr + W83781D_DATA_REG_OFFSET);
1708     }
1709     outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
1710     if (word_sized) {
1711         outb_p(value >> 8,
1712                data->isa_addr + W83781D_DATA_REG_OFFSET);
1713         outb_p((reg & 0xff) + 1,
1714                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1715     }
1716     outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
1717     if (reg & 0xff00) {
1718         outb_p(W83781D_REG_BANK,
1719                data->isa_addr + W83781D_ADDR_REG_OFFSET);
1720         outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
1721     }
1722 }
1723 
1724 /*
1725  * The SMBus locks itself, usually, but nothing may access the Winbond between
1726  * bank switches. ISA access must always be locked explicitly!
1727  * We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1728  * would slow down the W83781D access and should not be necessary.
1729  * There are some ugly typecasts here, but the good news is - they should
1730  * nowhere else be necessary!
1731  */
1732 static int
1733 w83781d_read_value(struct w83781d_data *data, u16 reg)
1734 {
1735     struct i2c_client *client = data->client;
1736     int res;
1737 
1738     mutex_lock(&data->lock);
1739     if (client)
1740         res = w83781d_read_value_i2c(data, reg);
1741     else
1742         res = w83781d_read_value_isa(data, reg);
1743     mutex_unlock(&data->lock);
1744     return res;
1745 }
1746 
1747 static int
1748 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1749 {
1750     struct i2c_client *client = data->client;
1751 
1752     mutex_lock(&data->lock);
1753     if (client)
1754         w83781d_write_value_i2c(data, reg, value);
1755     else
1756         w83781d_write_value_isa(data, reg, value);
1757     mutex_unlock(&data->lock);
1758     return 0;
1759 }
1760 
1761 static int
1762 w83781d_isa_probe(struct platform_device *pdev)
1763 {
1764     int err, reg;
1765     struct w83781d_data *data;
1766     struct resource *res;
1767 
1768     /* Reserve the ISA region */
1769     res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1770     if (!devm_request_region(&pdev->dev,
1771                  res->start + W83781D_ADDR_REG_OFFSET, 2,
1772                  "w83781d"))
1773         return -EBUSY;
1774 
1775     data = devm_kzalloc(&pdev->dev, sizeof(struct w83781d_data),
1776                 GFP_KERNEL);
1777     if (!data)
1778         return -ENOMEM;
1779 
1780     mutex_init(&data->lock);
1781     data->isa_addr = res->start;
1782     platform_set_drvdata(pdev, data);
1783 
1784     reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1785     switch (reg) {
1786     case 0x30:
1787         data->type = w83782d;
1788         data->name = "w83782d";
1789         break;
1790     default:
1791         data->type = w83781d;
1792         data->name = "w83781d";
1793     }
1794 
1795     /* Initialize the W83781D chip */
1796     w83781d_init_device(&pdev->dev);
1797 
1798     /* Register sysfs hooks */
1799     err = w83781d_create_files(&pdev->dev, data->type, 1);
1800     if (err)
1801         goto exit_remove_files;
1802 
1803     err = device_create_file(&pdev->dev, &dev_attr_name);
1804     if (err)
1805         goto exit_remove_files;
1806 
1807     data->hwmon_dev = hwmon_device_register(&pdev->dev);
1808     if (IS_ERR(data->hwmon_dev)) {
1809         err = PTR_ERR(data->hwmon_dev);
1810         goto exit_remove_files;
1811     }
1812 
1813     return 0;
1814 
1815  exit_remove_files:
1816     w83781d_remove_files(&pdev->dev);
1817     device_remove_file(&pdev->dev, &dev_attr_name);
1818     return err;
1819 }
1820 
1821 static int
1822 w83781d_isa_remove(struct platform_device *pdev)
1823 {
1824     struct w83781d_data *data = platform_get_drvdata(pdev);
1825 
1826     hwmon_device_unregister(data->hwmon_dev);
1827     w83781d_remove_files(&pdev->dev);
1828     device_remove_file(&pdev->dev, &dev_attr_name);
1829 
1830     return 0;
1831 }
1832 
1833 static struct platform_driver w83781d_isa_driver = {
1834     .driver = {
1835         .name = "w83781d",
1836     },
1837     .probe = w83781d_isa_probe,
1838     .remove = w83781d_isa_remove,
1839 };
1840 
1841 /* return 1 if a supported chip is found, 0 otherwise */
1842 static int __init
1843 w83781d_isa_found(unsigned short address)
1844 {
1845     int val, save, found = 0;
1846     int port;
1847 
1848     /*
1849      * Some boards declare base+0 to base+7 as a PNP device, some base+4
1850      * to base+7 and some base+5 to base+6. So we better request each port
1851      * individually for the probing phase.
1852      */
1853     for (port = address; port < address + W83781D_EXTENT; port++) {
1854         if (!request_region(port, 1, "w83781d")) {
1855             pr_debug("Failed to request port 0x%x\n", port);
1856             goto release;
1857         }
1858     }
1859 
1860 #define REALLY_SLOW_IO
1861     /*
1862      * We need the timeouts for at least some W83781D-like
1863      * chips. But only if we read 'undefined' registers.
1864      */
1865     val = inb_p(address + 1);
1866     if (inb_p(address + 2) != val
1867      || inb_p(address + 3) != val
1868      || inb_p(address + 7) != val) {
1869         pr_debug("Detection failed at step %d\n", 1);
1870         goto release;
1871     }
1872 #undef REALLY_SLOW_IO
1873 
1874     /*
1875      * We should be able to change the 7 LSB of the address port. The
1876      * MSB (busy flag) should be clear initially, set after the write.
1877      */
1878     save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1879     if (save & 0x80) {
1880         pr_debug("Detection failed at step %d\n", 2);
1881         goto release;
1882     }
1883     val = ~save & 0x7f;
1884     outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1885     if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1886         outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1887         pr_debug("Detection failed at step %d\n", 3);
1888         goto release;
1889     }
1890 
1891     /* We found a device, now see if it could be a W83781D */
1892     outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1893     val = inb_p(address + W83781D_DATA_REG_OFFSET);
1894     if (val & 0x80) {
1895         pr_debug("Detection failed at step %d\n", 4);
1896         goto release;
1897     }
1898     outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1899     save = inb_p(address + W83781D_DATA_REG_OFFSET);
1900     outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1901     val = inb_p(address + W83781D_DATA_REG_OFFSET);
1902     if ((!(save & 0x80) && (val != 0xa3))
1903      || ((save & 0x80) && (val != 0x5c))) {
1904         pr_debug("Detection failed at step %d\n", 5);
1905         goto release;
1906     }
1907     outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1908     val = inb_p(address + W83781D_DATA_REG_OFFSET);
1909     if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1910         pr_debug("Detection failed at step %d\n", 6);
1911         goto release;
1912     }
1913 
1914     /* The busy flag should be clear again */
1915     if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1916         pr_debug("Detection failed at step %d\n", 7);
1917         goto release;
1918     }
1919 
1920     /* Determine the chip type */
1921     outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1922     save = inb_p(address + W83781D_DATA_REG_OFFSET);
1923     outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1924     outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1925     val = inb_p(address + W83781D_DATA_REG_OFFSET);
1926     if ((val & 0xfe) == 0x10    /* W83781D */
1927      || val == 0x30)        /* W83782D */
1928         found = 1;
1929 
1930     if (found)
1931         pr_info("Found a %s chip at %#x\n",
1932             val == 0x30 ? "W83782D" : "W83781D", (int)address);
1933 
1934  release:
1935     for (port--; port >= address; port--)
1936         release_region(port, 1);
1937     return found;
1938 }
1939 
1940 static int __init
1941 w83781d_isa_device_add(unsigned short address)
1942 {
1943     struct resource res = {
1944         .start  = address,
1945         .end    = address + W83781D_EXTENT - 1,
1946         .name   = "w83781d",
1947         .flags  = IORESOURCE_IO,
1948     };
1949     int err;
1950 
1951     pdev = platform_device_alloc("w83781d", address);
1952     if (!pdev) {
1953         err = -ENOMEM;
1954         pr_err("Device allocation failed\n");
1955         goto exit;
1956     }
1957 
1958     err = platform_device_add_resources(pdev, &res, 1);
1959     if (err) {
1960         pr_err("Device resource addition failed (%d)\n", err);
1961         goto exit_device_put;
1962     }
1963 
1964     err = platform_device_add(pdev);
1965     if (err) {
1966         pr_err("Device addition failed (%d)\n", err);
1967         goto exit_device_put;
1968     }
1969 
1970     return 0;
1971 
1972  exit_device_put:
1973     platform_device_put(pdev);
1974  exit:
1975     pdev = NULL;
1976     return err;
1977 }
1978 
1979 static int __init
1980 w83781d_isa_register(void)
1981 {
1982     int res;
1983 
1984     if (w83781d_isa_found(isa_address)) {
1985         res = platform_driver_register(&w83781d_isa_driver);
1986         if (res)
1987             goto exit;
1988 
1989         /* Sets global pdev as a side effect */
1990         res = w83781d_isa_device_add(isa_address);
1991         if (res)
1992             goto exit_unreg_isa_driver;
1993     }
1994 
1995     return 0;
1996 
1997 exit_unreg_isa_driver:
1998     platform_driver_unregister(&w83781d_isa_driver);
1999 exit:
2000     return res;
2001 }
2002 
2003 static void
2004 w83781d_isa_unregister(void)
2005 {
2006     if (pdev) {
2007         platform_device_unregister(pdev);
2008         platform_driver_unregister(&w83781d_isa_driver);
2009     }
2010 }
2011 #else /* !CONFIG_ISA */
2012 
2013 static struct w83781d_data *w83781d_data_if_isa(void)
2014 {
2015     return NULL;
2016 }
2017 
2018 static int
2019 w83781d_alias_detect(struct i2c_client *client, u8 chipid)
2020 {
2021     return 0;
2022 }
2023 
2024 static int
2025 w83781d_read_value(struct w83781d_data *data, u16 reg)
2026 {
2027     int res;
2028 
2029     mutex_lock(&data->lock);
2030     res = w83781d_read_value_i2c(data, reg);
2031     mutex_unlock(&data->lock);
2032 
2033     return res;
2034 }
2035 
2036 static int
2037 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
2038 {
2039     mutex_lock(&data->lock);
2040     w83781d_write_value_i2c(data, reg, value);
2041     mutex_unlock(&data->lock);
2042 
2043     return 0;
2044 }
2045 
2046 static int __init
2047 w83781d_isa_register(void)
2048 {
2049     return 0;
2050 }
2051 
2052 static void
2053 w83781d_isa_unregister(void)
2054 {
2055 }
2056 #endif /* CONFIG_ISA */
2057 
2058 static int __init
2059 sensors_w83781d_init(void)
2060 {
2061     int res;
2062 
2063     /*
2064      * We register the ISA device first, so that we can skip the
2065      * registration of an I2C interface to the same device.
2066      */
2067     res = w83781d_isa_register();
2068     if (res)
2069         goto exit;
2070 
2071     res = i2c_add_driver(&w83781d_driver);
2072     if (res)
2073         goto exit_unreg_isa;
2074 
2075     return 0;
2076 
2077  exit_unreg_isa:
2078     w83781d_isa_unregister();
2079  exit:
2080     return res;
2081 }
2082 
2083 static void __exit
2084 sensors_w83781d_exit(void)
2085 {
2086     w83781d_isa_unregister();
2087     i2c_del_driver(&w83781d_driver);
2088 }
2089 
2090 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
2091           "Philip Edelbrock <phil@netroedge.com>, "
2092           "and Mark Studebaker <mdsxyz123@yahoo.com>");
2093 MODULE_DESCRIPTION("W83781D driver");
2094 MODULE_LICENSE("GPL");
2095 
2096 module_init(sensors_w83781d_init);
2097 module_exit(sensors_w83781d_exit);
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