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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 
0003 /* Driver for the Texas Instruments TMP464 SMBus temperature sensor IC.
0004  * Supported models: TMP464, TMP468
0005 
0006  * Copyright (C) 2022 Agathe Porte <agathe.porte@nokia.com>
0007  * Preliminary support by:
0008  * Lionel Pouliquen <lionel.lp.pouliquen@nokia.com>
0009  */
0010 
0011 #include <linux/err.h>
0012 #include <linux/hwmon.h>
0013 #include <linux/i2c.h>
0014 #include <linux/init.h>
0015 #include <linux/module.h>
0016 #include <linux/mutex.h>
0017 #include <linux/of_device.h>
0018 #include <linux/regmap.h>
0019 #include <linux/slab.h>
0020 
0021 /* Addresses to scan */
0022 static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, I2C_CLIENT_END };
0023 
0024 #define TMP464_NUM_CHANNELS     5   /* chan 0 is internal, 1-4 are remote */
0025 #define TMP468_NUM_CHANNELS     9   /* chan 0 is internal, 1-8 are remote */
0026 
0027 #define MAX_CHANNELS            9
0028 
0029 #define TMP464_TEMP_REG(channel)    (channel)
0030 #define TMP464_TEMP_OFFSET_REG(channel) (0x40 + ((channel) - 1) * 8)
0031 #define TMP464_N_FACTOR_REG(channel)    (0x41 + ((channel) - 1) * 8)
0032 
0033 static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
0034     0x39, 0x42, 0x4A, 0x52, 0x5A, 0x62, 0x6a, 0x72, 0x7a };
0035 static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
0036     0x3A, 0x43, 0x4B, 0x53, 0x5B, 0x63, 0x6b, 0x73, 0x7b };
0037 
0038 #define TMP464_THERM_STATUS_REG         0x21
0039 #define TMP464_THERM2_STATUS_REG        0x22
0040 #define TMP464_REMOTE_OPEN_REG          0x23
0041 #define TMP464_CONFIG_REG           0x30
0042 #define TMP464_TEMP_HYST_REG            0x38
0043 #define TMP464_LOCK_REG             0xc4
0044 
0045 /* Identification */
0046 #define TMP464_MANUFACTURER_ID_REG      0xFE
0047 #define TMP464_DEVICE_ID_REG            0xFF
0048 
0049 /* Flags */
0050 #define TMP464_CONFIG_SHUTDOWN          BIT(5)
0051 #define TMP464_CONFIG_RANGE         0x04
0052 #define TMP464_CONFIG_REG_REN(x)        (BIT(7 + (x)))
0053 #define TMP464_CONFIG_REG_REN_MASK      GENMASK(15, 7)
0054 #define TMP464_CONFIG_CONVERSION_RATE_B0    2
0055 #define TMP464_CONFIG_CONVERSION_RATE_B2    4
0056 #define TMP464_CONFIG_CONVERSION_RATE_MASK      GENMASK(TMP464_CONFIG_CONVERSION_RATE_B2, \
0057                             TMP464_CONFIG_CONVERSION_RATE_B0)
0058 
0059 #define TMP464_UNLOCK_VAL           0xeb19
0060 #define TMP464_LOCK_VAL             0x5ca6
0061 #define TMP464_LOCKED               0x8000
0062 
0063 /* Manufacturer / Device ID's */
0064 #define TMP464_MANUFACTURER_ID          0x5449
0065 #define TMP464_DEVICE_ID            0x1468
0066 #define TMP468_DEVICE_ID            0x0468
0067 
0068 static const struct i2c_device_id tmp464_id[] = {
0069     { "tmp464", TMP464_NUM_CHANNELS },
0070     { "tmp468", TMP468_NUM_CHANNELS },
0071     { }
0072 };
0073 MODULE_DEVICE_TABLE(i2c, tmp464_id);
0074 
0075 static const struct of_device_id __maybe_unused tmp464_of_match[] = {
0076     {
0077         .compatible = "ti,tmp464",
0078         .data = (void *)TMP464_NUM_CHANNELS
0079     },
0080     {
0081         .compatible = "ti,tmp468",
0082         .data = (void *)TMP468_NUM_CHANNELS
0083     },
0084     {},
0085 };
0086 MODULE_DEVICE_TABLE(of, tmp464_of_match);
0087 
0088 struct tmp464_channel {
0089     const char *label;
0090     bool enabled;
0091 };
0092 
0093 struct tmp464_data {
0094     struct regmap *regmap;
0095     struct mutex update_lock;
0096     int channels;
0097     s16 config_orig;
0098     u16 open_reg;
0099     unsigned long last_updated;
0100     bool valid;
0101     int update_interval;
0102     struct tmp464_channel channel[MAX_CHANNELS];
0103 };
0104 
0105 static int temp_from_reg(s16 reg)
0106 {
0107     return DIV_ROUND_CLOSEST((reg >> 3) * 625, 10);
0108 }
0109 
0110 static s16 temp_to_limit_reg(long temp)
0111 {
0112     return DIV_ROUND_CLOSEST(temp, 500) << 6;
0113 }
0114 
0115 static s16 temp_to_offset_reg(long temp)
0116 {
0117     return DIV_ROUND_CLOSEST(temp * 10, 625) << 3;
0118 }
0119 
0120 static int tmp464_enable_channels(struct tmp464_data *data)
0121 {
0122     struct regmap *regmap = data->regmap;
0123     u16 enable = 0;
0124     int i;
0125 
0126     for (i = 0; i < data->channels; i++)
0127         if (data->channel[i].enabled)
0128             enable |= TMP464_CONFIG_REG_REN(i);
0129 
0130     return regmap_update_bits(regmap, TMP464_CONFIG_REG, TMP464_CONFIG_REG_REN_MASK, enable);
0131 }
0132 
0133 static int tmp464_chip_read(struct device *dev, u32 attr, int channel, long *val)
0134 {
0135     struct tmp464_data *data = dev_get_drvdata(dev);
0136 
0137     switch (attr) {
0138     case hwmon_chip_update_interval:
0139         *val = data->update_interval;
0140         return 0;
0141     default:
0142         return -EOPNOTSUPP;
0143     }
0144 }
0145 
0146 static int tmp464_temp_read(struct device *dev, u32 attr, int channel, long *val)
0147 {
0148     struct tmp464_data *data = dev_get_drvdata(dev);
0149     struct regmap *regmap = data->regmap;
0150     unsigned int regval, regval2;
0151     int err = 0;
0152 
0153     mutex_lock(&data->update_lock);
0154 
0155     switch (attr) {
0156     case hwmon_temp_max_alarm:
0157         err = regmap_read(regmap, TMP464_THERM_STATUS_REG, &regval);
0158         if (err < 0)
0159             break;
0160         *val = !!(regval & BIT(channel + 7));
0161         break;
0162     case hwmon_temp_crit_alarm:
0163         err = regmap_read(regmap, TMP464_THERM2_STATUS_REG, &regval);
0164         if (err < 0)
0165             break;
0166         *val = !!(regval & BIT(channel + 7));
0167         break;
0168     case hwmon_temp_fault:
0169         /*
0170          * The chip clears TMP464_REMOTE_OPEN_REG after it is read
0171          * and only updates it after the next measurement cycle is
0172          * complete. That means we have to cache the value internally
0173          * for one measurement cycle and report the cached value.
0174          */
0175         if (!data->valid || time_after(jiffies, data->last_updated +
0176                            msecs_to_jiffies(data->update_interval))) {
0177             err = regmap_read(regmap, TMP464_REMOTE_OPEN_REG, &regval);
0178             if (err < 0)
0179                 break;
0180             data->open_reg = regval;
0181             data->last_updated = jiffies;
0182             data->valid = true;
0183         }
0184         *val = !!(data->open_reg & BIT(channel + 7));
0185         break;
0186     case hwmon_temp_max_hyst:
0187         err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], &regval);
0188         if (err < 0)
0189             break;
0190         err = regmap_read(regmap, TMP464_TEMP_HYST_REG, &regval2);
0191         if (err < 0)
0192             break;
0193         regval -= regval2;
0194         *val = temp_from_reg(regval);
0195         break;
0196     case hwmon_temp_max:
0197         err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], &regval);
0198         if (err < 0)
0199             break;
0200         *val = temp_from_reg(regval);
0201         break;
0202     case hwmon_temp_crit_hyst:
0203         err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], &regval);
0204         if (err < 0)
0205             break;
0206         err = regmap_read(regmap, TMP464_TEMP_HYST_REG, &regval2);
0207         if (err < 0)
0208             break;
0209         regval -= regval2;
0210         *val = temp_from_reg(regval);
0211         break;
0212     case hwmon_temp_crit:
0213         err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], &regval);
0214         if (err < 0)
0215             break;
0216         *val = temp_from_reg(regval);
0217         break;
0218     case hwmon_temp_offset:
0219         err = regmap_read(regmap, TMP464_TEMP_OFFSET_REG(channel), &regval);
0220         if (err < 0)
0221             break;
0222         *val = temp_from_reg(regval);
0223         break;
0224     case hwmon_temp_input:
0225         if (!data->channel[channel].enabled) {
0226             err = -ENODATA;
0227             break;
0228         }
0229         err = regmap_read(regmap, TMP464_TEMP_REG(channel), &regval);
0230         if (err < 0)
0231             break;
0232         *val = temp_from_reg(regval);
0233         break;
0234     case hwmon_temp_enable:
0235         *val = data->channel[channel].enabled;
0236         break;
0237     default:
0238         err = -EOPNOTSUPP;
0239         break;
0240     }
0241 
0242     mutex_unlock(&data->update_lock);
0243 
0244     return err;
0245 }
0246 
0247 static int tmp464_read(struct device *dev, enum hwmon_sensor_types type,
0248                u32 attr, int channel, long *val)
0249 {
0250     switch (type) {
0251     case hwmon_chip:
0252         return tmp464_chip_read(dev, attr, channel, val);
0253     case hwmon_temp:
0254         return tmp464_temp_read(dev, attr, channel, val);
0255     default:
0256         return -EOPNOTSUPP;
0257     }
0258 }
0259 
0260 static int tmp464_read_string(struct device *dev, enum hwmon_sensor_types type,
0261                   u32 attr, int channel, const char **str)
0262 {
0263     struct tmp464_data *data = dev_get_drvdata(dev);
0264 
0265     *str = data->channel[channel].label;
0266 
0267     return 0;
0268 }
0269 
0270 static int tmp464_set_convrate(struct tmp464_data *data, long interval)
0271 {
0272     int rate;
0273 
0274     /*
0275      * For valid rates, interval in milli-seconds can be calculated as
0276      *      interval = 125 << (7 - rate);
0277      * or
0278      *      interval = (1 << (7 - rate)) * 125;
0279      * The rate is therefore
0280      *      rate = 7 - __fls(interval / 125);
0281      * and the rounded rate is
0282      *      rate = 7 - __fls(interval * 4 / (125 * 3));
0283      * Use clamp_val() to avoid overflows, and to ensure valid input
0284      * for __fls.
0285      */
0286     interval = clamp_val(interval, 125, 16000);
0287     rate = 7 - __fls(interval * 4 / (125 * 3));
0288     data->update_interval = 125 << (7 - rate);
0289 
0290     return regmap_update_bits(data->regmap, TMP464_CONFIG_REG,
0291                   TMP464_CONFIG_CONVERSION_RATE_MASK,
0292                   rate << TMP464_CONFIG_CONVERSION_RATE_B0);
0293 }
0294 
0295 static int tmp464_chip_write(struct tmp464_data *data, u32 attr, int channel, long val)
0296 {
0297     switch (attr) {
0298     case hwmon_chip_update_interval:
0299         return tmp464_set_convrate(data, val);
0300     default:
0301         return -EOPNOTSUPP;
0302     }
0303 }
0304 
0305 static int tmp464_temp_write(struct tmp464_data *data, u32 attr, int channel, long val)
0306 {
0307     struct regmap *regmap = data->regmap;
0308     unsigned int regval;
0309     int err = 0;
0310 
0311     switch (attr) {
0312     case hwmon_temp_max_hyst:
0313         err = regmap_read(regmap, TMP464_THERM_LIMIT[0], &regval);
0314         if (err < 0)
0315             break;
0316         val = clamp_val(val, -256000, 256000);  /* prevent overflow/underflow */
0317         val = clamp_val(temp_from_reg(regval) - val, 0, 255000);
0318         err = regmap_write(regmap, TMP464_TEMP_HYST_REG,
0319                    DIV_ROUND_CLOSEST(val, 1000) << 7);
0320         break;
0321     case hwmon_temp_max:
0322         val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
0323         err = regmap_write(regmap, TMP464_THERM_LIMIT[channel], val);
0324         break;
0325     case hwmon_temp_crit:
0326         val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
0327         err = regmap_write(regmap, TMP464_THERM2_LIMIT[channel], val);
0328         break;
0329     case hwmon_temp_offset:
0330         val = temp_to_offset_reg(clamp_val(val, -128000, 127937));
0331         err = regmap_write(regmap, TMP464_TEMP_OFFSET_REG(channel), val);
0332         break;
0333     case hwmon_temp_enable:
0334         data->channel[channel].enabled = !!val;
0335         err = tmp464_enable_channels(data);
0336         break;
0337     default:
0338         err = -EOPNOTSUPP;
0339         break;
0340     }
0341 
0342     return err;
0343 }
0344 
0345 static int tmp464_write(struct device *dev, enum hwmon_sensor_types type,
0346             u32 attr, int channel, long val)
0347 {
0348     struct tmp464_data *data = dev_get_drvdata(dev);
0349     int err;
0350 
0351     mutex_lock(&data->update_lock);
0352 
0353     switch (type) {
0354     case hwmon_chip:
0355         err = tmp464_chip_write(data, attr, channel, val);
0356         break;
0357     case hwmon_temp:
0358         err = tmp464_temp_write(data, attr, channel, val);
0359         break;
0360     default:
0361         err = -EOPNOTSUPP;
0362         break;
0363     }
0364 
0365     mutex_unlock(&data->update_lock);
0366 
0367     return err;
0368 }
0369 
0370 static umode_t tmp464_is_visible(const void *_data, enum hwmon_sensor_types type,
0371                  u32 attr, int channel)
0372 {
0373     const struct tmp464_data *data = _data;
0374 
0375     if (channel >= data->channels)
0376         return 0;
0377 
0378     if (type == hwmon_chip) {
0379         if (attr == hwmon_chip_update_interval)
0380             return 0644;
0381         return 0;
0382     }
0383 
0384     switch (attr) {
0385     case hwmon_temp_input:
0386     case hwmon_temp_max_alarm:
0387     case hwmon_temp_crit_alarm:
0388     case hwmon_temp_crit_hyst:
0389         return 0444;
0390     case hwmon_temp_enable:
0391     case hwmon_temp_max:
0392     case hwmon_temp_crit:
0393         return 0644;
0394     case hwmon_temp_max_hyst:
0395         if (!channel)
0396             return 0644;
0397         return 0444;
0398     case hwmon_temp_label:
0399         if (data->channel[channel].label)
0400             return 0444;
0401         return 0;
0402     case hwmon_temp_fault:
0403         if (channel)
0404             return 0444;
0405         return 0;
0406     case hwmon_temp_offset:
0407         if (channel)
0408             return 0644;
0409         return 0;
0410     default:
0411         return 0;
0412     }
0413 }
0414 
0415 static void tmp464_restore_lock(void *regmap)
0416 {
0417     regmap_write(regmap, TMP464_LOCK_REG, TMP464_LOCK_VAL);
0418 }
0419 
0420 static void tmp464_restore_config(void *_data)
0421 {
0422     struct tmp464_data *data = _data;
0423 
0424     regmap_write(data->regmap, TMP464_CONFIG_REG, data->config_orig);
0425 }
0426 
0427 static int tmp464_init_client(struct device *dev, struct tmp464_data *data)
0428 {
0429     struct regmap *regmap = data->regmap;
0430     unsigned int regval;
0431     int err;
0432 
0433     err = regmap_read(regmap, TMP464_LOCK_REG, &regval);
0434     if (err)
0435         return err;
0436     if (regval == TMP464_LOCKED) {
0437         /* Explicitly unlock chip if it is locked */
0438         err = regmap_write(regmap, TMP464_LOCK_REG, TMP464_UNLOCK_VAL);
0439         if (err)
0440             return err;
0441         /* and lock it again when unloading the driver */
0442         err = devm_add_action_or_reset(dev, tmp464_restore_lock, regmap);
0443         if (err)
0444             return err;
0445     }
0446 
0447     err = regmap_read(regmap, TMP464_CONFIG_REG, &regval);
0448     if (err)
0449         return err;
0450     data->config_orig = regval;
0451     err = devm_add_action_or_reset(dev, tmp464_restore_config, data);
0452     if (err)
0453         return err;
0454 
0455     /* Default to 500 ms update interval */
0456     err = regmap_update_bits(regmap, TMP464_CONFIG_REG,
0457                  TMP464_CONFIG_CONVERSION_RATE_MASK | TMP464_CONFIG_SHUTDOWN,
0458                  BIT(TMP464_CONFIG_CONVERSION_RATE_B0) |
0459                  BIT(TMP464_CONFIG_CONVERSION_RATE_B2));
0460     if (err)
0461         return err;
0462 
0463     data->update_interval = 500;
0464 
0465     return tmp464_enable_channels(data);
0466 }
0467 
0468 static int tmp464_detect(struct i2c_client *client,
0469              struct i2c_board_info *info)
0470 {
0471     struct i2c_adapter *adapter = client->adapter;
0472     char *name, *chip;
0473     int reg;
0474 
0475     if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
0476         return -ENODEV;
0477 
0478     reg = i2c_smbus_read_word_swapped(client, TMP464_MANUFACTURER_ID_REG);
0479     if (reg < 0)
0480         return reg;
0481     if (reg != TMP464_MANUFACTURER_ID)
0482         return -ENODEV;
0483 
0484     /* Check for "always return zero" bits */
0485     reg = i2c_smbus_read_word_swapped(client, TMP464_THERM_STATUS_REG);
0486     if (reg < 0)
0487         return reg;
0488     if (reg & 0x1f)
0489         return -ENODEV;
0490     reg = i2c_smbus_read_word_swapped(client, TMP464_THERM2_STATUS_REG);
0491     if (reg < 0)
0492         return reg;
0493     if (reg & 0x1f)
0494         return -ENODEV;
0495 
0496     reg = i2c_smbus_read_word_swapped(client, TMP464_DEVICE_ID_REG);
0497     if (reg < 0)
0498         return reg;
0499     switch (reg) {
0500     case TMP464_DEVICE_ID:
0501         name = "tmp464";
0502         chip = "TMP464";
0503         break;
0504     case TMP468_DEVICE_ID:
0505         name = "tmp468";
0506         chip = "TMP468";
0507         break;
0508     default:
0509         return -ENODEV;
0510     }
0511 
0512     strscpy(info->type, name, I2C_NAME_SIZE);
0513     dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", chip, client->addr);
0514 
0515     return 0;
0516 }
0517 
0518 static int tmp464_probe_child_from_dt(struct device *dev,
0519                       struct device_node *child,
0520                       struct tmp464_data *data)
0521 
0522 {
0523     struct regmap *regmap = data->regmap;
0524     u32 channel;
0525     s32 nfactor;
0526     int err;
0527 
0528     err = of_property_read_u32(child, "reg", &channel);
0529     if (err) {
0530         dev_err(dev, "missing reg property of %pOFn\n", child);
0531         return err;
0532     }
0533 
0534     if (channel >= data->channels) {
0535         dev_err(dev, "invalid reg %d of %pOFn\n", channel, child);
0536         return -EINVAL;
0537     }
0538 
0539     of_property_read_string(child, "label", &data->channel[channel].label);
0540 
0541     data->channel[channel].enabled = of_device_is_available(child);
0542 
0543     err = of_property_read_s32(child, "ti,n-factor", &nfactor);
0544     if (err && err != -EINVAL)
0545         return err;
0546     if (!err) {
0547         if (channel == 0) {
0548             dev_err(dev, "n-factor can't be set for internal channel\n");
0549             return -EINVAL;
0550         }
0551         if (nfactor > 127 || nfactor < -128) {
0552             dev_err(dev, "n-factor for channel %d invalid (%d)\n",
0553                 channel, nfactor);
0554             return -EINVAL;
0555         }
0556         err = regmap_write(regmap, TMP464_N_FACTOR_REG(channel),
0557                    (nfactor << 8) & 0xff00);
0558         if (err)
0559             return err;
0560     }
0561 
0562     return 0;
0563 }
0564 
0565 static int tmp464_probe_from_dt(struct device *dev, struct tmp464_data *data)
0566 {
0567     const struct device_node *np = dev->of_node;
0568     struct device_node *child;
0569     int err;
0570 
0571     for_each_child_of_node(np, child) {
0572         if (strcmp(child->name, "channel"))
0573             continue;
0574 
0575         err = tmp464_probe_child_from_dt(dev, child, data);
0576         if (err) {
0577             of_node_put(child);
0578             return err;
0579         }
0580     }
0581 
0582     return 0;
0583 }
0584 
0585 static const struct hwmon_ops tmp464_ops = {
0586     .is_visible = tmp464_is_visible,
0587     .read = tmp464_read,
0588     .read_string = tmp464_read_string,
0589     .write = tmp464_write,
0590 };
0591 
0592 static const struct hwmon_channel_info *tmp464_info[] = {
0593     HWMON_CHANNEL_INFO(chip,
0594                HWMON_C_UPDATE_INTERVAL),
0595     HWMON_CHANNEL_INFO(temp,
0596                HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
0597                HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
0598                HWMON_T_LABEL | HWMON_T_ENABLE,
0599                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0600                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0601                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0602                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0603                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0604                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0605                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0606                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0607                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0608                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0609                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0610                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0611                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0612                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0613                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0614                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0615                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0616                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0617                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0618                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0619                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
0620                HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
0621                HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
0622                HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE),
0623     NULL
0624 };
0625 
0626 static const struct hwmon_chip_info tmp464_chip_info = {
0627     .ops = &tmp464_ops,
0628     .info = tmp464_info,
0629 };
0630 
0631 /* regmap */
0632 
0633 static bool tmp464_is_volatile_reg(struct device *dev, unsigned int reg)
0634 {
0635     return (reg < TMP464_TEMP_REG(TMP468_NUM_CHANNELS) ||
0636         reg == TMP464_THERM_STATUS_REG ||
0637         reg == TMP464_THERM2_STATUS_REG ||
0638         reg == TMP464_REMOTE_OPEN_REG);
0639 }
0640 
0641 static const struct regmap_config tmp464_regmap_config = {
0642     .reg_bits = 8,
0643     .val_bits = 16,
0644     .max_register = TMP464_DEVICE_ID_REG,
0645     .volatile_reg = tmp464_is_volatile_reg,
0646     .val_format_endian = REGMAP_ENDIAN_BIG,
0647     .cache_type = REGCACHE_RBTREE,
0648     .use_single_read = true,
0649     .use_single_write = true,
0650 };
0651 
0652 static int tmp464_probe(struct i2c_client *client)
0653 {
0654     struct device *dev = &client->dev;
0655     struct device *hwmon_dev;
0656     struct tmp464_data *data;
0657     int i, err;
0658 
0659     if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
0660         dev_err(&client->dev, "i2c functionality check failed\n");
0661         return -ENODEV;
0662     }
0663     data = devm_kzalloc(dev, sizeof(struct tmp464_data), GFP_KERNEL);
0664     if (!data)
0665         return -ENOMEM;
0666 
0667     mutex_init(&data->update_lock);
0668 
0669     if (dev->of_node)
0670         data->channels = (int)(unsigned long)of_device_get_match_data(&client->dev);
0671     else
0672         data->channels = i2c_match_id(tmp464_id, client)->driver_data;
0673 
0674     data->regmap = devm_regmap_init_i2c(client, &tmp464_regmap_config);
0675     if (IS_ERR(data->regmap))
0676         return PTR_ERR(data->regmap);
0677 
0678     for (i = 0; i < data->channels; i++)
0679         data->channel[i].enabled = true;
0680 
0681     err = tmp464_init_client(dev, data);
0682     if (err)
0683         return err;
0684 
0685     if (dev->of_node) {
0686         err = tmp464_probe_from_dt(dev, data);
0687         if (err)
0688             return err;
0689     }
0690 
0691     hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
0692                              data, &tmp464_chip_info, NULL);
0693     return PTR_ERR_OR_ZERO(hwmon_dev);
0694 }
0695 
0696 static struct i2c_driver tmp464_driver = {
0697     .class = I2C_CLASS_HWMON,
0698     .driver = {
0699         .name   = "tmp464",
0700         .of_match_table = of_match_ptr(tmp464_of_match),
0701     },
0702     .probe_new = tmp464_probe,
0703     .id_table = tmp464_id,
0704     .detect = tmp464_detect,
0705     .address_list = normal_i2c,
0706 };
0707 
0708 module_i2c_driver(tmp464_driver);
0709 
0710 MODULE_AUTHOR("Agathe Porte <agathe.porte@nokia.com>");
0711 MODULE_DESCRIPTION("Texas Instruments TMP464 temperature sensor driver");
0712 MODULE_LICENSE("GPL");
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