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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* tmp401.c
0003  *
0004  * Copyright (C) 2007,2008 Hans de Goede <hdegoede@redhat.com>
0005  * Preliminary tmp411 support by:
0006  * Gabriel Konat, Sander Leget, Wouter Willems
0007  * Copyright (C) 2009 Andre Prendel <andre.prendel@gmx.de>
0008  *
0009  * Cleanup and support for TMP431 and TMP432 by Guenter Roeck
0010  * Copyright (c) 2013 Guenter Roeck <linux@roeck-us.net>
0011  */
0012 
0013 /*
0014  * Driver for the Texas Instruments TMP401 SMBUS temperature sensor IC.
0015  *
0016  * Note this IC is in some aspect similar to the LM90, but it has quite a
0017  * few differences too, for example the local temp has a higher resolution
0018  * and thus has 16 bits registers for its value and limit instead of 8 bits.
0019  */
0020 
0021 #include <linux/bitops.h>
0022 #include <linux/err.h>
0023 #include <linux/i2c.h>
0024 #include <linux/hwmon.h>
0025 #include <linux/init.h>
0026 #include <linux/module.h>
0027 #include <linux/mutex.h>
0028 #include <linux/regmap.h>
0029 #include <linux/slab.h>
0030 
0031 /* Addresses to scan */
0032 static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4c, 0x4d,
0033     0x4e, 0x4f, I2C_CLIENT_END };
0034 
0035 enum chips { tmp401, tmp411, tmp431, tmp432, tmp435 };
0036 
0037 /*
0038  * The TMP401 registers, note some registers have different addresses for
0039  * reading and writing
0040  */
0041 #define TMP401_STATUS               0x02
0042 #define TMP401_CONFIG               0x03
0043 #define TMP401_CONVERSION_RATE          0x04
0044 #define TMP4XX_N_FACTOR_REG         0x18
0045 #define TMP43X_BETA_RANGE           0x25
0046 #define TMP401_TEMP_CRIT_HYST           0x21
0047 #define TMP401_MANUFACTURER_ID_REG      0xFE
0048 #define TMP401_DEVICE_ID_REG            0xFF
0049 
0050 static const u8 TMP401_TEMP_MSB[7][3] = {
0051     { 0x00, 0x01, 0x23 },   /* temp */
0052     { 0x06, 0x08, 0x16 },   /* low limit */
0053     { 0x05, 0x07, 0x15 },   /* high limit */
0054     { 0x20, 0x19, 0x1a },   /* therm (crit) limit */
0055     { 0x30, 0x34, 0x00 },   /* lowest */
0056     { 0x32, 0xf6, 0x00 },   /* highest */
0057 };
0058 
0059 /* [0] = fault, [1] = low, [2] = high, [3] = therm/crit */
0060 static const u8 TMP432_STATUS_REG[] = {
0061     0x1b, 0x36, 0x35, 0x37 };
0062 
0063 /* Flags */
0064 #define TMP401_CONFIG_RANGE         BIT(2)
0065 #define TMP401_CONFIG_SHUTDOWN          BIT(6)
0066 #define TMP401_STATUS_LOCAL_CRIT        BIT(0)
0067 #define TMP401_STATUS_REMOTE_CRIT       BIT(1)
0068 #define TMP401_STATUS_REMOTE_OPEN       BIT(2)
0069 #define TMP401_STATUS_REMOTE_LOW        BIT(3)
0070 #define TMP401_STATUS_REMOTE_HIGH       BIT(4)
0071 #define TMP401_STATUS_LOCAL_LOW         BIT(5)
0072 #define TMP401_STATUS_LOCAL_HIGH        BIT(6)
0073 
0074 /* On TMP432, each status has its own register */
0075 #define TMP432_STATUS_LOCAL         BIT(0)
0076 #define TMP432_STATUS_REMOTE1           BIT(1)
0077 #define TMP432_STATUS_REMOTE2           BIT(2)
0078 
0079 /* Manufacturer / Device ID's */
0080 #define TMP401_MANUFACTURER_ID          0x55
0081 #define TMP401_DEVICE_ID            0x11
0082 #define TMP411A_DEVICE_ID           0x12
0083 #define TMP411B_DEVICE_ID           0x13
0084 #define TMP411C_DEVICE_ID           0x10
0085 #define TMP431_DEVICE_ID            0x31
0086 #define TMP432_DEVICE_ID            0x32
0087 #define TMP435_DEVICE_ID            0x35
0088 
0089 /*
0090  * Driver data (common to all clients)
0091  */
0092 
0093 static const struct i2c_device_id tmp401_id[] = {
0094     { "tmp401", tmp401 },
0095     { "tmp411", tmp411 },
0096     { "tmp431", tmp431 },
0097     { "tmp432", tmp432 },
0098     { "tmp435", tmp435 },
0099     { }
0100 };
0101 MODULE_DEVICE_TABLE(i2c, tmp401_id);
0102 
0103 /*
0104  * Client data (each client gets its own)
0105  */
0106 
0107 struct tmp401_data {
0108     struct i2c_client *client;
0109     struct regmap *regmap;
0110     struct mutex update_lock;
0111     enum chips kind;
0112 
0113     bool extended_range;
0114 
0115     /* hwmon API configuration data */
0116     u32 chip_channel_config[4];
0117     struct hwmon_channel_info chip_info;
0118     u32 temp_channel_config[4];
0119     struct hwmon_channel_info temp_info;
0120     const struct hwmon_channel_info *info[3];
0121     struct hwmon_chip_info chip;
0122 };
0123 
0124 /* regmap */
0125 
0126 static bool tmp401_regmap_is_volatile(struct device *dev, unsigned int reg)
0127 {
0128     switch (reg) {
0129     case 0:         /* local temp msb */
0130     case 1:         /* remote temp msb */
0131     case 2:         /* status */
0132     case 0x10:      /* remote temp lsb */
0133     case 0x15:      /* local temp lsb */
0134     case 0x1b:      /* status (tmp432) */
0135     case 0x23 ... 0x24: /* remote temp 2 msb / lsb */
0136     case 0x30 ... 0x37: /* lowest/highest temp; status (tmp432) */
0137         return true;
0138     default:
0139         return false;
0140     }
0141 }
0142 
0143 static int tmp401_reg_read(void *context, unsigned int reg, unsigned int *val)
0144 {
0145     struct tmp401_data *data = context;
0146     struct i2c_client *client = data->client;
0147     int regval;
0148 
0149     switch (reg) {
0150     case 0:         /* local temp msb */
0151     case 1:         /* remote temp msb */
0152     case 5:         /* local temp high limit msb */
0153     case 6:         /* local temp low limit msb */
0154     case 7:         /* remote temp ligh limit msb */
0155     case 8:         /* remote temp low limit msb */
0156     case 0x15:      /* remote temp 2 high limit msb */
0157     case 0x16:      /* remote temp 2 low limit msb */
0158     case 0x23:      /* remote temp 2 msb */
0159     case 0x30:      /* local temp minimum, tmp411 */
0160     case 0x32:      /* local temp maximum, tmp411 */
0161     case 0x34:      /* remote temp minimum, tmp411 */
0162     case 0xf6:      /* remote temp maximum, tmp411 (really 0x36) */
0163         /* work around register overlap between TMP411 and TMP432 */
0164         if (reg == 0xf6)
0165             reg = 0x36;
0166         regval = i2c_smbus_read_word_swapped(client, reg);
0167         if (regval < 0)
0168             return regval;
0169         *val = regval;
0170         break;
0171     case 0x19:      /* critical limits, 8-bit registers */
0172     case 0x1a:
0173     case 0x20:
0174         regval = i2c_smbus_read_byte_data(client, reg);
0175         if (regval < 0)
0176             return regval;
0177         *val = regval << 8;
0178         break;
0179     case 0x1b:
0180     case 0x35 ... 0x37:
0181         if (data->kind == tmp432) {
0182             regval = i2c_smbus_read_byte_data(client, reg);
0183             if (regval < 0)
0184                 return regval;
0185             *val = regval;
0186             break;
0187         }
0188         /* simulate TMP432 status registers */
0189         regval = i2c_smbus_read_byte_data(client, TMP401_STATUS);
0190         if (regval < 0)
0191             return regval;
0192         *val = 0;
0193         switch (reg) {
0194         case 0x1b:  /* open / fault */
0195             if (regval & TMP401_STATUS_REMOTE_OPEN)
0196                 *val |= BIT(1);
0197             break;
0198         case 0x35:  /* high limit */
0199             if (regval & TMP401_STATUS_LOCAL_HIGH)
0200                 *val |= BIT(0);
0201             if (regval & TMP401_STATUS_REMOTE_HIGH)
0202                 *val |= BIT(1);
0203             break;
0204         case 0x36:  /* low limit */
0205             if (regval & TMP401_STATUS_LOCAL_LOW)
0206                 *val |= BIT(0);
0207             if (regval & TMP401_STATUS_REMOTE_LOW)
0208                 *val |= BIT(1);
0209             break;
0210         case 0x37:  /* therm / crit limit */
0211             if (regval & TMP401_STATUS_LOCAL_CRIT)
0212                 *val |= BIT(0);
0213             if (regval & TMP401_STATUS_REMOTE_CRIT)
0214                 *val |= BIT(1);
0215             break;
0216         }
0217         break;
0218     default:
0219         regval = i2c_smbus_read_byte_data(client, reg);
0220         if (regval < 0)
0221             return regval;
0222         *val = regval;
0223         break;
0224     }
0225     return 0;
0226 }
0227 
0228 static int tmp401_reg_write(void *context, unsigned int reg, unsigned int val)
0229 {
0230     struct tmp401_data *data = context;
0231     struct i2c_client *client = data->client;
0232 
0233     switch (reg) {
0234     case 0x05:      /* local temp high limit msb */
0235     case 0x06:      /* local temp low limit msb */
0236     case 0x07:      /* remote temp ligh limit msb */
0237     case 0x08:      /* remote temp low limit msb */
0238         reg += 6;   /* adjust for register write address */
0239         fallthrough;
0240     case 0x15:      /* remote temp 2 high limit msb */
0241     case 0x16:      /* remote temp 2 low limit msb */
0242         return i2c_smbus_write_word_swapped(client, reg, val);
0243     case 0x19:      /* critical limits, 8-bit registers */
0244     case 0x1a:
0245     case 0x20:
0246         return i2c_smbus_write_byte_data(client, reg, val >> 8);
0247     case TMP401_CONVERSION_RATE:
0248     case TMP401_CONFIG:
0249         reg += 6;   /* adjust for register write address */
0250         fallthrough;
0251     default:
0252         return i2c_smbus_write_byte_data(client, reg, val);
0253     }
0254 }
0255 
0256 static const struct regmap_config tmp401_regmap_config = {
0257     .reg_bits = 8,
0258     .val_bits = 16,
0259     .cache_type = REGCACHE_RBTREE,
0260     .volatile_reg = tmp401_regmap_is_volatile,
0261     .reg_read = tmp401_reg_read,
0262     .reg_write = tmp401_reg_write,
0263 };
0264 
0265 /* temperature conversion */
0266 
0267 static int tmp401_register_to_temp(u16 reg, bool extended)
0268 {
0269     int temp = reg;
0270 
0271     if (extended)
0272         temp -= 64 * 256;
0273 
0274     return DIV_ROUND_CLOSEST(temp * 125, 32);
0275 }
0276 
0277 static u16 tmp401_temp_to_register(long temp, bool extended, int zbits)
0278 {
0279     if (extended) {
0280         temp = clamp_val(temp, -64000, 191000);
0281         temp += 64000;
0282     } else {
0283         temp = clamp_val(temp, 0, 127000);
0284     }
0285 
0286     return DIV_ROUND_CLOSEST(temp * (1 << (8 - zbits)), 1000) << zbits;
0287 }
0288 
0289 /* hwmon API functions */
0290 
0291 static const u8 tmp401_temp_reg_index[] = {
0292     [hwmon_temp_input] = 0,
0293     [hwmon_temp_min] = 1,
0294     [hwmon_temp_max] = 2,
0295     [hwmon_temp_crit] = 3,
0296     [hwmon_temp_lowest] = 4,
0297     [hwmon_temp_highest] = 5,
0298 };
0299 
0300 static const u8 tmp401_status_reg_index[] = {
0301     [hwmon_temp_fault] = 0,
0302     [hwmon_temp_min_alarm] = 1,
0303     [hwmon_temp_max_alarm] = 2,
0304     [hwmon_temp_crit_alarm] = 3,
0305 };
0306 
0307 static int tmp401_temp_read(struct device *dev, u32 attr, int channel, long *val)
0308 {
0309     struct tmp401_data *data = dev_get_drvdata(dev);
0310     struct regmap *regmap = data->regmap;
0311     unsigned int regval;
0312     int reg, ret;
0313 
0314     switch (attr) {
0315     case hwmon_temp_input:
0316     case hwmon_temp_min:
0317     case hwmon_temp_max:
0318     case hwmon_temp_crit:
0319     case hwmon_temp_lowest:
0320     case hwmon_temp_highest:
0321         reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
0322         ret = regmap_read(regmap, reg, &regval);
0323         if (ret < 0)
0324             return ret;
0325         *val = tmp401_register_to_temp(regval, data->extended_range);
0326         break;
0327     case hwmon_temp_crit_hyst:
0328         mutex_lock(&data->update_lock);
0329         reg = TMP401_TEMP_MSB[3][channel];
0330         ret = regmap_read(regmap, reg, &regval);
0331         if (ret < 0)
0332             goto unlock;
0333         *val = tmp401_register_to_temp(regval, data->extended_range);
0334         ret = regmap_read(regmap, TMP401_TEMP_CRIT_HYST, &regval);
0335         if (ret < 0)
0336             goto unlock;
0337         *val -= regval * 1000;
0338 unlock:
0339         mutex_unlock(&data->update_lock);
0340         if (ret < 0)
0341             return ret;
0342         break;
0343     case hwmon_temp_fault:
0344     case hwmon_temp_min_alarm:
0345     case hwmon_temp_max_alarm:
0346     case hwmon_temp_crit_alarm:
0347         reg = TMP432_STATUS_REG[tmp401_status_reg_index[attr]];
0348         ret = regmap_read(regmap, reg, &regval);
0349         if (ret < 0)
0350             return ret;
0351         *val = !!(regval & BIT(channel));
0352         break;
0353     default:
0354         return -EOPNOTSUPP;
0355     }
0356     return 0;
0357 }
0358 
0359 static int tmp401_temp_write(struct device *dev, u32 attr, int channel,
0360                  long val)
0361 {
0362     struct tmp401_data *data = dev_get_drvdata(dev);
0363     struct regmap *regmap = data->regmap;
0364     unsigned int regval;
0365     int reg, ret, temp;
0366 
0367     mutex_lock(&data->update_lock);
0368     switch (attr) {
0369     case hwmon_temp_min:
0370     case hwmon_temp_max:
0371     case hwmon_temp_crit:
0372         reg = TMP401_TEMP_MSB[tmp401_temp_reg_index[attr]][channel];
0373         regval = tmp401_temp_to_register(val, data->extended_range,
0374                          attr == hwmon_temp_crit ? 8 : 4);
0375         ret = regmap_write(regmap, reg, regval);
0376         break;
0377     case hwmon_temp_crit_hyst:
0378         if (data->extended_range)
0379             val = clamp_val(val, -64000, 191000);
0380         else
0381             val = clamp_val(val, 0, 127000);
0382 
0383         reg = TMP401_TEMP_MSB[3][channel];
0384         ret = regmap_read(regmap, reg, &regval);
0385         if (ret < 0)
0386             break;
0387         temp = tmp401_register_to_temp(regval, data->extended_range);
0388         val = clamp_val(val, temp - 255000, temp);
0389         regval = ((temp - val) + 500) / 1000;
0390         ret = regmap_write(regmap, TMP401_TEMP_CRIT_HYST, regval);
0391         break;
0392     default:
0393         ret = -EOPNOTSUPP;
0394         break;
0395     }
0396     mutex_unlock(&data->update_lock);
0397     return ret;
0398 }
0399 
0400 static int tmp401_chip_read(struct device *dev, u32 attr, int channel, long *val)
0401 {
0402     struct tmp401_data *data = dev_get_drvdata(dev);
0403     u32 regval;
0404     int ret;
0405 
0406     switch (attr) {
0407     case hwmon_chip_update_interval:
0408         ret = regmap_read(data->regmap, TMP401_CONVERSION_RATE, &regval);
0409         if (ret < 0)
0410             return ret;
0411         *val = (1 << (7 - regval)) * 125;
0412         break;
0413     case hwmon_chip_temp_reset_history:
0414         *val = 0;
0415         break;
0416     default:
0417         return -EOPNOTSUPP;
0418     }
0419 
0420     return 0;
0421 }
0422 
0423 static int tmp401_set_convrate(struct regmap *regmap, long val)
0424 {
0425     int rate;
0426 
0427     /*
0428      * For valid rates, interval can be calculated as
0429      *  interval = (1 << (7 - rate)) * 125;
0430      * Rounded rate is therefore
0431      *  rate = 7 - __fls(interval * 4 / (125 * 3));
0432      * Use clamp_val() to avoid overflows, and to ensure valid input
0433      * for __fls.
0434      */
0435     val = clamp_val(val, 125, 16000);
0436     rate = 7 - __fls(val * 4 / (125 * 3));
0437     return regmap_write(regmap, TMP401_CONVERSION_RATE, rate);
0438 }
0439 
0440 static int tmp401_chip_write(struct device *dev, u32 attr, int channel, long val)
0441 {
0442     struct tmp401_data *data = dev_get_drvdata(dev);
0443     struct regmap *regmap = data->regmap;
0444     int err;
0445 
0446     mutex_lock(&data->update_lock);
0447     switch (attr) {
0448     case hwmon_chip_update_interval:
0449         err = tmp401_set_convrate(regmap, val);
0450         break;
0451     case hwmon_chip_temp_reset_history:
0452         if (val != 1) {
0453             err = -EINVAL;
0454             break;
0455         }
0456         /*
0457          * Reset history by writing any value to any of the
0458          * minimum/maximum registers (0x30-0x37).
0459          */
0460         err = regmap_write(regmap, 0x30, 0);
0461         break;
0462     default:
0463         err = -EOPNOTSUPP;
0464         break;
0465     }
0466     mutex_unlock(&data->update_lock);
0467 
0468     return err;
0469 }
0470 
0471 static int tmp401_read(struct device *dev, enum hwmon_sensor_types type,
0472                u32 attr, int channel, long *val)
0473 {
0474     switch (type) {
0475     case hwmon_chip:
0476         return tmp401_chip_read(dev, attr, channel, val);
0477     case hwmon_temp:
0478         return tmp401_temp_read(dev, attr, channel, val);
0479     default:
0480         return -EOPNOTSUPP;
0481     }
0482 }
0483 
0484 static int tmp401_write(struct device *dev, enum hwmon_sensor_types type,
0485             u32 attr, int channel, long val)
0486 {
0487     switch (type) {
0488     case hwmon_chip:
0489         return tmp401_chip_write(dev, attr, channel, val);
0490     case hwmon_temp:
0491         return tmp401_temp_write(dev, attr, channel, val);
0492     default:
0493         return -EOPNOTSUPP;
0494     }
0495 }
0496 
0497 static umode_t tmp401_is_visible(const void *data, enum hwmon_sensor_types type,
0498                  u32 attr, int channel)
0499 {
0500     switch (type) {
0501     case hwmon_chip:
0502         switch (attr) {
0503         case hwmon_chip_update_interval:
0504         case hwmon_chip_temp_reset_history:
0505             return 0644;
0506         default:
0507             break;
0508         }
0509         break;
0510     case hwmon_temp:
0511         switch (attr) {
0512         case hwmon_temp_input:
0513         case hwmon_temp_min_alarm:
0514         case hwmon_temp_max_alarm:
0515         case hwmon_temp_crit_alarm:
0516         case hwmon_temp_fault:
0517         case hwmon_temp_lowest:
0518         case hwmon_temp_highest:
0519             return 0444;
0520         case hwmon_temp_min:
0521         case hwmon_temp_max:
0522         case hwmon_temp_crit:
0523         case hwmon_temp_crit_hyst:
0524             return 0644;
0525         default:
0526             break;
0527         }
0528         break;
0529     default:
0530         break;
0531     }
0532     return 0;
0533 }
0534 
0535 static const struct hwmon_ops tmp401_ops = {
0536     .is_visible = tmp401_is_visible,
0537     .read = tmp401_read,
0538     .write = tmp401_write,
0539 };
0540 
0541 /* chip initialization, detect, probe */
0542 
0543 static int tmp401_init_client(struct tmp401_data *data)
0544 {
0545     struct regmap *regmap = data->regmap;
0546     u32 config, config_orig;
0547     int ret;
0548     u32 val = 0;
0549     s32 nfactor = 0;
0550 
0551     /* Set conversion rate to 2 Hz */
0552     ret = regmap_write(regmap, TMP401_CONVERSION_RATE, 5);
0553     if (ret < 0)
0554         return ret;
0555 
0556     /* Start conversions (disable shutdown if necessary) */
0557     ret = regmap_read(regmap, TMP401_CONFIG, &config);
0558     if (ret < 0)
0559         return ret;
0560 
0561     config_orig = config;
0562     config &= ~TMP401_CONFIG_SHUTDOWN;
0563 
0564     if (of_property_read_bool(data->client->dev.of_node, "ti,extended-range-enable")) {
0565         /* Enable measurement over extended temperature range */
0566         config |= TMP401_CONFIG_RANGE;
0567     }
0568 
0569     data->extended_range = !!(config & TMP401_CONFIG_RANGE);
0570 
0571     if (config != config_orig) {
0572         ret = regmap_write(regmap, TMP401_CONFIG, config);
0573         if (ret < 0)
0574             return ret;
0575     }
0576 
0577     ret = of_property_read_u32(data->client->dev.of_node, "ti,n-factor", &nfactor);
0578     if (!ret) {
0579         if (data->kind == tmp401) {
0580             dev_err(&data->client->dev, "ti,tmp401 does not support n-factor correction\n");
0581             return -EINVAL;
0582         }
0583         if (nfactor < -128 || nfactor > 127) {
0584             dev_err(&data->client->dev, "n-factor is invalid (%d)\n", nfactor);
0585             return -EINVAL;
0586         }
0587         ret = regmap_write(regmap, TMP4XX_N_FACTOR_REG, (unsigned int)nfactor);
0588         if (ret < 0)
0589             return ret;
0590     }
0591 
0592     ret = of_property_read_u32(data->client->dev.of_node, "ti,beta-compensation", &val);
0593     if (!ret) {
0594         if (data->kind == tmp401 || data->kind == tmp411) {
0595             dev_err(&data->client->dev, "ti,tmp401 or ti,tmp411 does not support beta compensation\n");
0596             return -EINVAL;
0597         }
0598         if (val > 15) {
0599             dev_err(&data->client->dev, "beta-compensation is invalid (%u)\n", val);
0600             return -EINVAL;
0601         }
0602         ret = regmap_write(regmap, TMP43X_BETA_RANGE, val);
0603         if (ret < 0)
0604             return ret;
0605     }
0606 
0607     return 0;
0608 }
0609 
0610 static int tmp401_detect(struct i2c_client *client,
0611              struct i2c_board_info *info)
0612 {
0613     enum chips kind;
0614     struct i2c_adapter *adapter = client->adapter;
0615     u8 reg;
0616 
0617     if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
0618         return -ENODEV;
0619 
0620     /* Detect and identify the chip */
0621     reg = i2c_smbus_read_byte_data(client, TMP401_MANUFACTURER_ID_REG);
0622     if (reg != TMP401_MANUFACTURER_ID)
0623         return -ENODEV;
0624 
0625     reg = i2c_smbus_read_byte_data(client, TMP401_DEVICE_ID_REG);
0626 
0627     switch (reg) {
0628     case TMP401_DEVICE_ID:
0629         if (client->addr != 0x4c)
0630             return -ENODEV;
0631         kind = tmp401;
0632         break;
0633     case TMP411A_DEVICE_ID:
0634         if (client->addr != 0x4c)
0635             return -ENODEV;
0636         kind = tmp411;
0637         break;
0638     case TMP411B_DEVICE_ID:
0639         if (client->addr != 0x4d)
0640             return -ENODEV;
0641         kind = tmp411;
0642         break;
0643     case TMP411C_DEVICE_ID:
0644         if (client->addr != 0x4e)
0645             return -ENODEV;
0646         kind = tmp411;
0647         break;
0648     case TMP431_DEVICE_ID:
0649         if (client->addr != 0x4c && client->addr != 0x4d)
0650             return -ENODEV;
0651         kind = tmp431;
0652         break;
0653     case TMP432_DEVICE_ID:
0654         if (client->addr != 0x4c && client->addr != 0x4d)
0655             return -ENODEV;
0656         kind = tmp432;
0657         break;
0658     case TMP435_DEVICE_ID:
0659         kind = tmp435;
0660         break;
0661     default:
0662         return -ENODEV;
0663     }
0664 
0665     reg = i2c_smbus_read_byte_data(client, TMP401_CONFIG);
0666     if (reg & 0x1b)
0667         return -ENODEV;
0668 
0669     reg = i2c_smbus_read_byte_data(client, TMP401_CONVERSION_RATE);
0670     /* Datasheet says: 0x1-0x6 */
0671     if (reg > 15)
0672         return -ENODEV;
0673 
0674     strlcpy(info->type, tmp401_id[kind].name, I2C_NAME_SIZE);
0675 
0676     return 0;
0677 }
0678 
0679 static int tmp401_probe(struct i2c_client *client)
0680 {
0681     static const char * const names[] = {
0682         "TMP401", "TMP411", "TMP431", "TMP432", "TMP435"
0683     };
0684     struct device *dev = &client->dev;
0685     struct hwmon_channel_info *info;
0686     struct device *hwmon_dev;
0687     struct tmp401_data *data;
0688     int status;
0689 
0690     data = devm_kzalloc(dev, sizeof(struct tmp401_data), GFP_KERNEL);
0691     if (!data)
0692         return -ENOMEM;
0693 
0694     data->client = client;
0695     mutex_init(&data->update_lock);
0696     data->kind = i2c_match_id(tmp401_id, client)->driver_data;
0697 
0698     data->regmap = devm_regmap_init(dev, NULL, data, &tmp401_regmap_config);
0699     if (IS_ERR(data->regmap))
0700         return PTR_ERR(data->regmap);
0701 
0702     /* initialize configuration data */
0703     data->chip.ops = &tmp401_ops;
0704     data->chip.info = data->info;
0705 
0706     data->info[0] = &data->chip_info;
0707     data->info[1] = &data->temp_info;
0708 
0709     info = &data->chip_info;
0710     info->type = hwmon_chip;
0711     info->config = data->chip_channel_config;
0712 
0713     data->chip_channel_config[0] = HWMON_C_UPDATE_INTERVAL;
0714 
0715     info = &data->temp_info;
0716     info->type = hwmon_temp;
0717     info->config = data->temp_channel_config;
0718 
0719     data->temp_channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
0720         HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
0721         HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
0722     data->temp_channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
0723         HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
0724         HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
0725 
0726     if (data->kind == tmp411) {
0727         data->temp_channel_config[0] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
0728         data->temp_channel_config[1] |= HWMON_T_HIGHEST | HWMON_T_LOWEST;
0729         data->chip_channel_config[0] |= HWMON_C_TEMP_RESET_HISTORY;
0730     }
0731 
0732     if (data->kind == tmp432) {
0733         data->temp_channel_config[2] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
0734             HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
0735             HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
0736     }
0737 
0738     /* Initialize the TMP401 chip */
0739     status = tmp401_init_client(data);
0740     if (status < 0)
0741         return status;
0742 
0743     hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, data,
0744                              &data->chip, NULL);
0745     if (IS_ERR(hwmon_dev))
0746         return PTR_ERR(hwmon_dev);
0747 
0748     dev_info(dev, "Detected TI %s chip\n", names[data->kind]);
0749 
0750     return 0;
0751 }
0752 
0753 static const struct of_device_id __maybe_unused tmp4xx_of_match[] = {
0754     { .compatible = "ti,tmp401", },
0755     { .compatible = "ti,tmp411", },
0756     { .compatible = "ti,tmp431", },
0757     { .compatible = "ti,tmp432", },
0758     { .compatible = "ti,tmp435", },
0759     { },
0760 };
0761 MODULE_DEVICE_TABLE(of, tmp4xx_of_match);
0762 
0763 static struct i2c_driver tmp401_driver = {
0764     .class      = I2C_CLASS_HWMON,
0765     .driver = {
0766         .name   = "tmp401",
0767         .of_match_table = of_match_ptr(tmp4xx_of_match),
0768     },
0769     .probe_new  = tmp401_probe,
0770     .id_table   = tmp401_id,
0771     .detect     = tmp401_detect,
0772     .address_list   = normal_i2c,
0773 };
0774 
0775 module_i2c_driver(tmp401_driver);
0776 
0777 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
0778 MODULE_DESCRIPTION("Texas Instruments TMP401 temperature sensor driver");
0779 MODULE_LICENSE("GPL");
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