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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  pc87427.c - hardware monitoring driver for the
0004  *              National Semiconductor PC87427 Super-I/O chip
0005  *  Copyright (C) 2006, 2008, 2010  Jean Delvare <jdelvare@suse.de>
0006  *
0007  *  Supports the following chips:
0008  *
0009  *  Chip        #vin    #fan    #pwm    #temp   devid
0010  *  PC87427     -       8       4       6       0xF2
0011  *
0012  *  This driver assumes that no more than one chip is present.
0013  *  Only fans are fully supported so far. Temperatures are in read-only
0014  *  mode, and voltages aren't supported at all.
0015  */
0016 
0017 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0018 
0019 #include <linux/module.h>
0020 #include <linux/init.h>
0021 #include <linux/slab.h>
0022 #include <linux/jiffies.h>
0023 #include <linux/platform_device.h>
0024 #include <linux/hwmon.h>
0025 #include <linux/hwmon-sysfs.h>
0026 #include <linux/err.h>
0027 #include <linux/mutex.h>
0028 #include <linux/sysfs.h>
0029 #include <linux/ioport.h>
0030 #include <linux/acpi.h>
0031 #include <linux/io.h>
0032 
0033 static unsigned short force_id;
0034 module_param(force_id, ushort, 0);
0035 MODULE_PARM_DESC(force_id, "Override the detected device ID");
0036 
0037 static struct platform_device *pdev;
0038 
0039 #define DRVNAME "pc87427"
0040 
0041 /*
0042  * The lock mutex protects both the I/O accesses (needed because the
0043  * device is using banked registers) and the register cache (needed to keep
0044  * the data in the registers and the cache in sync at any time).
0045  */
0046 struct pc87427_data {
0047     struct device *hwmon_dev;
0048     struct mutex lock;
0049     int address[2];
0050     const char *name;
0051 
0052     unsigned long last_updated; /* in jiffies */
0053     u8 fan_enabled;         /* bit vector */
0054     u16 fan[8];         /* register values */
0055     u16 fan_min[8];         /* register values */
0056     u8 fan_status[8];       /* register values */
0057 
0058     u8 pwm_enabled;         /* bit vector */
0059     u8 pwm_auto_ok;         /* bit vector */
0060     u8 pwm_enable[4];       /* register values */
0061     u8 pwm[4];          /* register values */
0062 
0063     u8 temp_enabled;        /* bit vector */
0064     s16 temp[6];            /* register values */
0065     s8 temp_min[6];         /* register values */
0066     s8 temp_max[6];         /* register values */
0067     s8 temp_crit[6];        /* register values */
0068     u8 temp_status[6];      /* register values */
0069     u8 temp_type[6];        /* register values */
0070 };
0071 
0072 struct pc87427_sio_data {
0073     unsigned short address[2];
0074     u8 has_fanin;
0075     u8 has_fanout;
0076 };
0077 
0078 /*
0079  * Super-I/O registers and operations
0080  */
0081 
0082 #define SIOREG_LDSEL    0x07    /* Logical device select */
0083 #define SIOREG_DEVID    0x20    /* Device ID */
0084 #define SIOREG_CF2  0x22    /* Configuration 2 */
0085 #define SIOREG_CF3  0x23    /* Configuration 3 */
0086 #define SIOREG_CF4  0x24    /* Configuration 4 */
0087 #define SIOREG_CF5  0x25    /* Configuration 5 */
0088 #define SIOREG_CFB  0x2B    /* Configuration B */
0089 #define SIOREG_CFC  0x2C    /* Configuration C */
0090 #define SIOREG_CFD  0x2D    /* Configuration D */
0091 #define SIOREG_ACT  0x30    /* Device activation */
0092 #define SIOREG_MAP  0x50    /* I/O or memory mapping */
0093 #define SIOREG_IOBASE   0x60    /* I/O base address */
0094 
0095 static const u8 logdev[2] = { 0x09, 0x14 };
0096 static const char *logdev_str[2] = { DRVNAME " FMC", DRVNAME " HMC" };
0097 #define LD_FAN      0
0098 #define LD_IN       1
0099 #define LD_TEMP     1
0100 
0101 static inline int superio_enter(int sioaddr)
0102 {
0103     if (!request_muxed_region(sioaddr, 2, DRVNAME))
0104         return -EBUSY;
0105     return 0;
0106 }
0107 
0108 static inline void superio_outb(int sioaddr, int reg, int val)
0109 {
0110     outb(reg, sioaddr);
0111     outb(val, sioaddr + 1);
0112 }
0113 
0114 static inline int superio_inb(int sioaddr, int reg)
0115 {
0116     outb(reg, sioaddr);
0117     return inb(sioaddr + 1);
0118 }
0119 
0120 static inline void superio_exit(int sioaddr)
0121 {
0122     outb(0x02, sioaddr);
0123     outb(0x02, sioaddr + 1);
0124     release_region(sioaddr, 2);
0125 }
0126 
0127 /*
0128  * Logical devices
0129  */
0130 
0131 #define REGION_LENGTH       32
0132 #define PC87427_REG_BANK    0x0f
0133 #define BANK_FM(nr)     (nr)
0134 #define BANK_FT(nr)     (0x08 + (nr))
0135 #define BANK_FC(nr)     (0x10 + (nr) * 2)
0136 #define BANK_TM(nr)     (nr)
0137 #define BANK_VM(nr)     (0x08 + (nr))
0138 
0139 /*
0140  * I/O access functions
0141  */
0142 
0143 /* ldi is the logical device index */
0144 static inline int pc87427_read8(struct pc87427_data *data, u8 ldi, u8 reg)
0145 {
0146     return inb(data->address[ldi] + reg);
0147 }
0148 
0149 /* Must be called with data->lock held, except during init */
0150 static inline int pc87427_read8_bank(struct pc87427_data *data, u8 ldi,
0151                      u8 bank, u8 reg)
0152 {
0153     outb(bank, data->address[ldi] + PC87427_REG_BANK);
0154     return inb(data->address[ldi] + reg);
0155 }
0156 
0157 /* Must be called with data->lock held, except during init */
0158 static inline void pc87427_write8_bank(struct pc87427_data *data, u8 ldi,
0159                        u8 bank, u8 reg, u8 value)
0160 {
0161     outb(bank, data->address[ldi] + PC87427_REG_BANK);
0162     outb(value, data->address[ldi] + reg);
0163 }
0164 
0165 /*
0166  * Fan registers and conversions
0167  */
0168 
0169 /* fan data registers are 16-bit wide */
0170 #define PC87427_REG_FAN         0x12
0171 #define PC87427_REG_FAN_MIN     0x14
0172 #define PC87427_REG_FAN_STATUS      0x10
0173 
0174 #define FAN_STATUS_STALL        (1 << 3)
0175 #define FAN_STATUS_LOSPD        (1 << 1)
0176 #define FAN_STATUS_MONEN        (1 << 0)
0177 
0178 /*
0179  * Dedicated function to read all registers related to a given fan input.
0180  * This saves us quite a few locks and bank selections.
0181  * Must be called with data->lock held.
0182  * nr is from 0 to 7
0183  */
0184 static void pc87427_readall_fan(struct pc87427_data *data, u8 nr)
0185 {
0186     int iobase = data->address[LD_FAN];
0187 
0188     outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
0189     data->fan[nr] = inw(iobase + PC87427_REG_FAN);
0190     data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN);
0191     data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS);
0192     /* Clear fan alarm bits */
0193     outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS);
0194 }
0195 
0196 /*
0197  * The 2 LSB of fan speed registers are used for something different.
0198  * The actual 2 LSB of the measurements are not available.
0199  */
0200 static inline unsigned long fan_from_reg(u16 reg)
0201 {
0202     reg &= 0xfffc;
0203     if (reg == 0x0000 || reg == 0xfffc)
0204         return 0;
0205     return 5400000UL / reg;
0206 }
0207 
0208 /* The 2 LSB of the fan speed limit registers are not significant. */
0209 static inline u16 fan_to_reg(unsigned long val)
0210 {
0211     if (val < 83UL)
0212         return 0xffff;
0213     if (val >= 1350000UL)
0214         return 0x0004;
0215     return ((1350000UL + val / 2) / val) << 2;
0216 }
0217 
0218 /*
0219  * PWM registers and conversions
0220  */
0221 
0222 #define PC87427_REG_PWM_ENABLE      0x10
0223 #define PC87427_REG_PWM_DUTY        0x12
0224 
0225 #define PWM_ENABLE_MODE_MASK        (7 << 4)
0226 #define PWM_ENABLE_CTLEN        (1 << 0)
0227 
0228 #define PWM_MODE_MANUAL         (0 << 4)
0229 #define PWM_MODE_AUTO           (1 << 4)
0230 #define PWM_MODE_OFF            (2 << 4)
0231 #define PWM_MODE_ON         (7 << 4)
0232 
0233 /*
0234  * Dedicated function to read all registers related to a given PWM output.
0235  * This saves us quite a few locks and bank selections.
0236  * Must be called with data->lock held.
0237  * nr is from 0 to 3
0238  */
0239 static void pc87427_readall_pwm(struct pc87427_data *data, u8 nr)
0240 {
0241     int iobase = data->address[LD_FAN];
0242 
0243     outb(BANK_FC(nr), iobase + PC87427_REG_BANK);
0244     data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE);
0245     data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY);
0246 }
0247 
0248 static inline int pwm_enable_from_reg(u8 reg)
0249 {
0250     switch (reg & PWM_ENABLE_MODE_MASK) {
0251     case PWM_MODE_ON:
0252         return 0;
0253     case PWM_MODE_MANUAL:
0254     case PWM_MODE_OFF:
0255         return 1;
0256     case PWM_MODE_AUTO:
0257         return 2;
0258     default:
0259         return -EPROTO;
0260     }
0261 }
0262 
0263 static inline u8 pwm_enable_to_reg(unsigned long val, u8 pwmval)
0264 {
0265     switch (val) {
0266     default:
0267         return PWM_MODE_ON;
0268     case 1:
0269         return pwmval ? PWM_MODE_MANUAL : PWM_MODE_OFF;
0270     case 2:
0271         return PWM_MODE_AUTO;
0272     }
0273 }
0274 
0275 /*
0276  * Temperature registers and conversions
0277  */
0278 
0279 #define PC87427_REG_TEMP_STATUS     0x10
0280 #define PC87427_REG_TEMP        0x14
0281 #define PC87427_REG_TEMP_MAX        0x18
0282 #define PC87427_REG_TEMP_MIN        0x19
0283 #define PC87427_REG_TEMP_CRIT       0x1a
0284 #define PC87427_REG_TEMP_TYPE       0x1d
0285 
0286 #define TEMP_STATUS_CHANEN      (1 << 0)
0287 #define TEMP_STATUS_LOWFLG      (1 << 1)
0288 #define TEMP_STATUS_HIGHFLG     (1 << 2)
0289 #define TEMP_STATUS_CRITFLG     (1 << 3)
0290 #define TEMP_STATUS_SENSERR     (1 << 5)
0291 #define TEMP_TYPE_MASK          (3 << 5)
0292 
0293 #define TEMP_TYPE_THERMISTOR        (1 << 5)
0294 #define TEMP_TYPE_REMOTE_DIODE      (2 << 5)
0295 #define TEMP_TYPE_LOCAL_DIODE       (3 << 5)
0296 
0297 /*
0298  * Dedicated function to read all registers related to a given temperature
0299  * input. This saves us quite a few locks and bank selections.
0300  * Must be called with data->lock held.
0301  * nr is from 0 to 5
0302  */
0303 static void pc87427_readall_temp(struct pc87427_data *data, u8 nr)
0304 {
0305     int iobase = data->address[LD_TEMP];
0306 
0307     outb(BANK_TM(nr), iobase + PC87427_REG_BANK);
0308     data->temp[nr] = le16_to_cpu(inw(iobase + PC87427_REG_TEMP));
0309     data->temp_max[nr] = inb(iobase + PC87427_REG_TEMP_MAX);
0310     data->temp_min[nr] = inb(iobase + PC87427_REG_TEMP_MIN);
0311     data->temp_crit[nr] = inb(iobase + PC87427_REG_TEMP_CRIT);
0312     data->temp_type[nr] = inb(iobase + PC87427_REG_TEMP_TYPE);
0313     data->temp_status[nr] = inb(iobase + PC87427_REG_TEMP_STATUS);
0314     /* Clear fan alarm bits */
0315     outb(data->temp_status[nr], iobase + PC87427_REG_TEMP_STATUS);
0316 }
0317 
0318 static inline unsigned int temp_type_from_reg(u8 reg)
0319 {
0320     switch (reg & TEMP_TYPE_MASK) {
0321     case TEMP_TYPE_THERMISTOR:
0322         return 4;
0323     case TEMP_TYPE_REMOTE_DIODE:
0324     case TEMP_TYPE_LOCAL_DIODE:
0325         return 3;
0326     default:
0327         return 0;
0328     }
0329 }
0330 
0331 /*
0332  * We assume 8-bit thermal sensors; 9-bit thermal sensors are possible
0333  * too, but I have no idea how to figure out when they are used.
0334  */
0335 static inline long temp_from_reg(s16 reg)
0336 {
0337     return reg * 1000 / 256;
0338 }
0339 
0340 static inline long temp_from_reg8(s8 reg)
0341 {
0342     return reg * 1000;
0343 }
0344 
0345 /*
0346  * Data interface
0347  */
0348 
0349 static struct pc87427_data *pc87427_update_device(struct device *dev)
0350 {
0351     struct pc87427_data *data = dev_get_drvdata(dev);
0352     int i;
0353 
0354     mutex_lock(&data->lock);
0355     if (!time_after(jiffies, data->last_updated + HZ)
0356      && data->last_updated)
0357         goto done;
0358 
0359     /* Fans */
0360     for (i = 0; i < 8; i++) {
0361         if (!(data->fan_enabled & (1 << i)))
0362             continue;
0363         pc87427_readall_fan(data, i);
0364     }
0365 
0366     /* PWM outputs */
0367     for (i = 0; i < 4; i++) {
0368         if (!(data->pwm_enabled & (1 << i)))
0369             continue;
0370         pc87427_readall_pwm(data, i);
0371     }
0372 
0373     /* Temperature channels */
0374     for (i = 0; i < 6; i++) {
0375         if (!(data->temp_enabled & (1 << i)))
0376             continue;
0377         pc87427_readall_temp(data, i);
0378     }
0379 
0380     data->last_updated = jiffies;
0381 
0382 done:
0383     mutex_unlock(&data->lock);
0384     return data;
0385 }
0386 
0387 static ssize_t fan_input_show(struct device *dev,
0388                   struct device_attribute *devattr, char *buf)
0389 {
0390     struct pc87427_data *data = pc87427_update_device(dev);
0391     int nr = to_sensor_dev_attr(devattr)->index;
0392 
0393     return sprintf(buf, "%lu\n", fan_from_reg(data->fan[nr]));
0394 }
0395 
0396 static ssize_t fan_min_show(struct device *dev,
0397                 struct device_attribute *devattr, char *buf)
0398 {
0399     struct pc87427_data *data = pc87427_update_device(dev);
0400     int nr = to_sensor_dev_attr(devattr)->index;
0401 
0402     return sprintf(buf, "%lu\n", fan_from_reg(data->fan_min[nr]));
0403 }
0404 
0405 static ssize_t fan_alarm_show(struct device *dev,
0406                   struct device_attribute *devattr, char *buf)
0407 {
0408     struct pc87427_data *data = pc87427_update_device(dev);
0409     int nr = to_sensor_dev_attr(devattr)->index;
0410 
0411     return sprintf(buf, "%d\n", !!(data->fan_status[nr]
0412                        & FAN_STATUS_LOSPD));
0413 }
0414 
0415 static ssize_t fan_fault_show(struct device *dev,
0416                   struct device_attribute *devattr, char *buf)
0417 {
0418     struct pc87427_data *data = pc87427_update_device(dev);
0419     int nr = to_sensor_dev_attr(devattr)->index;
0420 
0421     return sprintf(buf, "%d\n", !!(data->fan_status[nr]
0422                        & FAN_STATUS_STALL));
0423 }
0424 
0425 static ssize_t fan_min_store(struct device *dev,
0426                  struct device_attribute *devattr,
0427                  const char *buf, size_t count)
0428 {
0429     struct pc87427_data *data = dev_get_drvdata(dev);
0430     int nr = to_sensor_dev_attr(devattr)->index;
0431     unsigned long val;
0432     int iobase = data->address[LD_FAN];
0433 
0434     if (kstrtoul(buf, 10, &val) < 0)
0435         return -EINVAL;
0436 
0437     mutex_lock(&data->lock);
0438     outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
0439     /*
0440      * The low speed limit registers are read-only while monitoring
0441      * is enabled, so we have to disable monitoring, then change the
0442      * limit, and finally enable monitoring again.
0443      */
0444     outb(0, iobase + PC87427_REG_FAN_STATUS);
0445     data->fan_min[nr] = fan_to_reg(val);
0446     outw(data->fan_min[nr], iobase + PC87427_REG_FAN_MIN);
0447     outb(FAN_STATUS_MONEN, iobase + PC87427_REG_FAN_STATUS);
0448     mutex_unlock(&data->lock);
0449 
0450     return count;
0451 }
0452 
0453 static SENSOR_DEVICE_ATTR_RO(fan1_input, fan_input, 0);
0454 static SENSOR_DEVICE_ATTR_RO(fan2_input, fan_input, 1);
0455 static SENSOR_DEVICE_ATTR_RO(fan3_input, fan_input, 2);
0456 static SENSOR_DEVICE_ATTR_RO(fan4_input, fan_input, 3);
0457 static SENSOR_DEVICE_ATTR_RO(fan5_input, fan_input, 4);
0458 static SENSOR_DEVICE_ATTR_RO(fan6_input, fan_input, 5);
0459 static SENSOR_DEVICE_ATTR_RO(fan7_input, fan_input, 6);
0460 static SENSOR_DEVICE_ATTR_RO(fan8_input, fan_input, 7);
0461 
0462 static SENSOR_DEVICE_ATTR_RW(fan1_min, fan_min, 0);
0463 static SENSOR_DEVICE_ATTR_RW(fan2_min, fan_min, 1);
0464 static SENSOR_DEVICE_ATTR_RW(fan3_min, fan_min, 2);
0465 static SENSOR_DEVICE_ATTR_RW(fan4_min, fan_min, 3);
0466 static SENSOR_DEVICE_ATTR_RW(fan5_min, fan_min, 4);
0467 static SENSOR_DEVICE_ATTR_RW(fan6_min, fan_min, 5);
0468 static SENSOR_DEVICE_ATTR_RW(fan7_min, fan_min, 6);
0469 static SENSOR_DEVICE_ATTR_RW(fan8_min, fan_min, 7);
0470 
0471 static SENSOR_DEVICE_ATTR_RO(fan1_alarm, fan_alarm, 0);
0472 static SENSOR_DEVICE_ATTR_RO(fan2_alarm, fan_alarm, 1);
0473 static SENSOR_DEVICE_ATTR_RO(fan3_alarm, fan_alarm, 2);
0474 static SENSOR_DEVICE_ATTR_RO(fan4_alarm, fan_alarm, 3);
0475 static SENSOR_DEVICE_ATTR_RO(fan5_alarm, fan_alarm, 4);
0476 static SENSOR_DEVICE_ATTR_RO(fan6_alarm, fan_alarm, 5);
0477 static SENSOR_DEVICE_ATTR_RO(fan7_alarm, fan_alarm, 6);
0478 static SENSOR_DEVICE_ATTR_RO(fan8_alarm, fan_alarm, 7);
0479 
0480 static SENSOR_DEVICE_ATTR_RO(fan1_fault, fan_fault, 0);
0481 static SENSOR_DEVICE_ATTR_RO(fan2_fault, fan_fault, 1);
0482 static SENSOR_DEVICE_ATTR_RO(fan3_fault, fan_fault, 2);
0483 static SENSOR_DEVICE_ATTR_RO(fan4_fault, fan_fault, 3);
0484 static SENSOR_DEVICE_ATTR_RO(fan5_fault, fan_fault, 4);
0485 static SENSOR_DEVICE_ATTR_RO(fan6_fault, fan_fault, 5);
0486 static SENSOR_DEVICE_ATTR_RO(fan7_fault, fan_fault, 6);
0487 static SENSOR_DEVICE_ATTR_RO(fan8_fault, fan_fault, 7);
0488 
0489 static struct attribute *pc87427_attributes_fan[8][5] = {
0490     {
0491         &sensor_dev_attr_fan1_input.dev_attr.attr,
0492         &sensor_dev_attr_fan1_min.dev_attr.attr,
0493         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
0494         &sensor_dev_attr_fan1_fault.dev_attr.attr,
0495         NULL
0496     }, {
0497         &sensor_dev_attr_fan2_input.dev_attr.attr,
0498         &sensor_dev_attr_fan2_min.dev_attr.attr,
0499         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
0500         &sensor_dev_attr_fan2_fault.dev_attr.attr,
0501         NULL
0502     }, {
0503         &sensor_dev_attr_fan3_input.dev_attr.attr,
0504         &sensor_dev_attr_fan3_min.dev_attr.attr,
0505         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
0506         &sensor_dev_attr_fan3_fault.dev_attr.attr,
0507         NULL
0508     }, {
0509         &sensor_dev_attr_fan4_input.dev_attr.attr,
0510         &sensor_dev_attr_fan4_min.dev_attr.attr,
0511         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
0512         &sensor_dev_attr_fan4_fault.dev_attr.attr,
0513         NULL
0514     }, {
0515         &sensor_dev_attr_fan5_input.dev_attr.attr,
0516         &sensor_dev_attr_fan5_min.dev_attr.attr,
0517         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
0518         &sensor_dev_attr_fan5_fault.dev_attr.attr,
0519         NULL
0520     }, {
0521         &sensor_dev_attr_fan6_input.dev_attr.attr,
0522         &sensor_dev_attr_fan6_min.dev_attr.attr,
0523         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
0524         &sensor_dev_attr_fan6_fault.dev_attr.attr,
0525         NULL
0526     }, {
0527         &sensor_dev_attr_fan7_input.dev_attr.attr,
0528         &sensor_dev_attr_fan7_min.dev_attr.attr,
0529         &sensor_dev_attr_fan7_alarm.dev_attr.attr,
0530         &sensor_dev_attr_fan7_fault.dev_attr.attr,
0531         NULL
0532     }, {
0533         &sensor_dev_attr_fan8_input.dev_attr.attr,
0534         &sensor_dev_attr_fan8_min.dev_attr.attr,
0535         &sensor_dev_attr_fan8_alarm.dev_attr.attr,
0536         &sensor_dev_attr_fan8_fault.dev_attr.attr,
0537         NULL
0538     }
0539 };
0540 
0541 static const struct attribute_group pc87427_group_fan[8] = {
0542     { .attrs = pc87427_attributes_fan[0] },
0543     { .attrs = pc87427_attributes_fan[1] },
0544     { .attrs = pc87427_attributes_fan[2] },
0545     { .attrs = pc87427_attributes_fan[3] },
0546     { .attrs = pc87427_attributes_fan[4] },
0547     { .attrs = pc87427_attributes_fan[5] },
0548     { .attrs = pc87427_attributes_fan[6] },
0549     { .attrs = pc87427_attributes_fan[7] },
0550 };
0551 
0552 /*
0553  * Must be called with data->lock held and pc87427_readall_pwm() freshly
0554  * called
0555  */
0556 static void update_pwm_enable(struct pc87427_data *data, int nr, u8 mode)
0557 {
0558     int iobase = data->address[LD_FAN];
0559     data->pwm_enable[nr] &= ~PWM_ENABLE_MODE_MASK;
0560     data->pwm_enable[nr] |= mode;
0561     outb(data->pwm_enable[nr], iobase + PC87427_REG_PWM_ENABLE);
0562 }
0563 
0564 static ssize_t pwm_enable_show(struct device *dev,
0565                    struct device_attribute *devattr, char *buf)
0566 {
0567     struct pc87427_data *data = pc87427_update_device(dev);
0568     int nr = to_sensor_dev_attr(devattr)->index;
0569     int pwm_enable;
0570 
0571     pwm_enable = pwm_enable_from_reg(data->pwm_enable[nr]);
0572     if (pwm_enable < 0)
0573         return pwm_enable;
0574     return sprintf(buf, "%d\n", pwm_enable);
0575 }
0576 
0577 static ssize_t pwm_enable_store(struct device *dev,
0578                 struct device_attribute *devattr,
0579                 const char *buf, size_t count)
0580 {
0581     struct pc87427_data *data = dev_get_drvdata(dev);
0582     int nr = to_sensor_dev_attr(devattr)->index;
0583     unsigned long val;
0584 
0585     if (kstrtoul(buf, 10, &val) < 0 || val > 2)
0586         return -EINVAL;
0587     /* Can't go to automatic mode if it isn't configured */
0588     if (val == 2 && !(data->pwm_auto_ok & (1 << nr)))
0589         return -EINVAL;
0590 
0591     mutex_lock(&data->lock);
0592     pc87427_readall_pwm(data, nr);
0593     update_pwm_enable(data, nr, pwm_enable_to_reg(val, data->pwm[nr]));
0594     mutex_unlock(&data->lock);
0595 
0596     return count;
0597 }
0598 
0599 static ssize_t pwm_show(struct device *dev, struct device_attribute *devattr,
0600             char *buf)
0601 {
0602     struct pc87427_data *data = pc87427_update_device(dev);
0603     int nr = to_sensor_dev_attr(devattr)->index;
0604 
0605     return sprintf(buf, "%d\n", (int)data->pwm[nr]);
0606 }
0607 
0608 static ssize_t pwm_store(struct device *dev, struct device_attribute *devattr,
0609              const char *buf, size_t count)
0610 {
0611     struct pc87427_data *data = dev_get_drvdata(dev);
0612     int nr = to_sensor_dev_attr(devattr)->index;
0613     unsigned long val;
0614     int iobase = data->address[LD_FAN];
0615     u8 mode;
0616 
0617     if (kstrtoul(buf, 10, &val) < 0 || val > 0xff)
0618         return -EINVAL;
0619 
0620     mutex_lock(&data->lock);
0621     pc87427_readall_pwm(data, nr);
0622     mode = data->pwm_enable[nr] & PWM_ENABLE_MODE_MASK;
0623     if (mode != PWM_MODE_MANUAL && mode != PWM_MODE_OFF) {
0624         dev_notice(dev,
0625                "Can't set PWM%d duty cycle while not in manual mode\n",
0626                nr + 1);
0627         mutex_unlock(&data->lock);
0628         return -EPERM;
0629     }
0630 
0631     /* We may have to change the mode */
0632     if (mode == PWM_MODE_MANUAL && val == 0) {
0633         /* Transition from Manual to Off */
0634         update_pwm_enable(data, nr, PWM_MODE_OFF);
0635         mode = PWM_MODE_OFF;
0636         dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
0637             "manual", "off");
0638     } else if (mode == PWM_MODE_OFF && val != 0) {
0639         /* Transition from Off to Manual */
0640         update_pwm_enable(data, nr, PWM_MODE_MANUAL);
0641         mode = PWM_MODE_MANUAL;
0642         dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
0643             "off", "manual");
0644     }
0645 
0646     data->pwm[nr] = val;
0647     if (mode == PWM_MODE_MANUAL)
0648         outb(val, iobase + PC87427_REG_PWM_DUTY);
0649     mutex_unlock(&data->lock);
0650 
0651     return count;
0652 }
0653 
0654 static SENSOR_DEVICE_ATTR_RW(pwm1_enable, pwm_enable, 0);
0655 static SENSOR_DEVICE_ATTR_RW(pwm2_enable, pwm_enable, 1);
0656 static SENSOR_DEVICE_ATTR_RW(pwm3_enable, pwm_enable, 2);
0657 static SENSOR_DEVICE_ATTR_RW(pwm4_enable, pwm_enable, 3);
0658 
0659 static SENSOR_DEVICE_ATTR_RW(pwm1, pwm, 0);
0660 static SENSOR_DEVICE_ATTR_RW(pwm2, pwm, 1);
0661 static SENSOR_DEVICE_ATTR_RW(pwm3, pwm, 2);
0662 static SENSOR_DEVICE_ATTR_RW(pwm4, pwm, 3);
0663 
0664 static struct attribute *pc87427_attributes_pwm[4][3] = {
0665     {
0666         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
0667         &sensor_dev_attr_pwm1.dev_attr.attr,
0668         NULL
0669     }, {
0670         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
0671         &sensor_dev_attr_pwm2.dev_attr.attr,
0672         NULL
0673     }, {
0674         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
0675         &sensor_dev_attr_pwm3.dev_attr.attr,
0676         NULL
0677     }, {
0678         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
0679         &sensor_dev_attr_pwm4.dev_attr.attr,
0680         NULL
0681     }
0682 };
0683 
0684 static const struct attribute_group pc87427_group_pwm[4] = {
0685     { .attrs = pc87427_attributes_pwm[0] },
0686     { .attrs = pc87427_attributes_pwm[1] },
0687     { .attrs = pc87427_attributes_pwm[2] },
0688     { .attrs = pc87427_attributes_pwm[3] },
0689 };
0690 
0691 static ssize_t temp_input_show(struct device *dev,
0692                    struct device_attribute *devattr, char *buf)
0693 {
0694     struct pc87427_data *data = pc87427_update_device(dev);
0695     int nr = to_sensor_dev_attr(devattr)->index;
0696 
0697     return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
0698 }
0699 
0700 static ssize_t temp_min_show(struct device *dev,
0701                  struct device_attribute *devattr, char *buf)
0702 {
0703     struct pc87427_data *data = pc87427_update_device(dev);
0704     int nr = to_sensor_dev_attr(devattr)->index;
0705 
0706     return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_min[nr]));
0707 }
0708 
0709 static ssize_t temp_max_show(struct device *dev,
0710                  struct device_attribute *devattr, char *buf)
0711 {
0712     struct pc87427_data *data = pc87427_update_device(dev);
0713     int nr = to_sensor_dev_attr(devattr)->index;
0714 
0715     return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_max[nr]));
0716 }
0717 
0718 static ssize_t temp_crit_show(struct device *dev,
0719                   struct device_attribute *devattr, char *buf)
0720 {
0721     struct pc87427_data *data = pc87427_update_device(dev);
0722     int nr = to_sensor_dev_attr(devattr)->index;
0723 
0724     return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_crit[nr]));
0725 }
0726 
0727 static ssize_t temp_type_show(struct device *dev,
0728                   struct device_attribute *devattr, char *buf)
0729 {
0730     struct pc87427_data *data = pc87427_update_device(dev);
0731     int nr = to_sensor_dev_attr(devattr)->index;
0732 
0733     return sprintf(buf, "%u\n", temp_type_from_reg(data->temp_type[nr]));
0734 }
0735 
0736 static ssize_t temp_min_alarm_show(struct device *dev,
0737                    struct device_attribute *devattr,
0738                    char *buf)
0739 {
0740     struct pc87427_data *data = pc87427_update_device(dev);
0741     int nr = to_sensor_dev_attr(devattr)->index;
0742 
0743     return sprintf(buf, "%d\n", !!(data->temp_status[nr]
0744                        & TEMP_STATUS_LOWFLG));
0745 }
0746 
0747 static ssize_t temp_max_alarm_show(struct device *dev,
0748                    struct device_attribute *devattr,
0749                    char *buf)
0750 {
0751     struct pc87427_data *data = pc87427_update_device(dev);
0752     int nr = to_sensor_dev_attr(devattr)->index;
0753 
0754     return sprintf(buf, "%d\n", !!(data->temp_status[nr]
0755                        & TEMP_STATUS_HIGHFLG));
0756 }
0757 
0758 static ssize_t temp_crit_alarm_show(struct device *dev,
0759                     struct device_attribute *devattr,
0760                     char *buf)
0761 {
0762     struct pc87427_data *data = pc87427_update_device(dev);
0763     int nr = to_sensor_dev_attr(devattr)->index;
0764 
0765     return sprintf(buf, "%d\n", !!(data->temp_status[nr]
0766                        & TEMP_STATUS_CRITFLG));
0767 }
0768 
0769 static ssize_t temp_fault_show(struct device *dev,
0770                    struct device_attribute *devattr, char *buf)
0771 {
0772     struct pc87427_data *data = pc87427_update_device(dev);
0773     int nr = to_sensor_dev_attr(devattr)->index;
0774 
0775     return sprintf(buf, "%d\n", !!(data->temp_status[nr]
0776                        & TEMP_STATUS_SENSERR));
0777 }
0778 
0779 static SENSOR_DEVICE_ATTR_RO(temp1_input, temp_input, 0);
0780 static SENSOR_DEVICE_ATTR_RO(temp2_input, temp_input, 1);
0781 static SENSOR_DEVICE_ATTR_RO(temp3_input, temp_input, 2);
0782 static SENSOR_DEVICE_ATTR_RO(temp4_input, temp_input, 3);
0783 static SENSOR_DEVICE_ATTR_RO(temp5_input, temp_input, 4);
0784 static SENSOR_DEVICE_ATTR_RO(temp6_input, temp_input, 5);
0785 
0786 static SENSOR_DEVICE_ATTR_RO(temp1_min, temp_min, 0);
0787 static SENSOR_DEVICE_ATTR_RO(temp2_min, temp_min, 1);
0788 static SENSOR_DEVICE_ATTR_RO(temp3_min, temp_min, 2);
0789 static SENSOR_DEVICE_ATTR_RO(temp4_min, temp_min, 3);
0790 static SENSOR_DEVICE_ATTR_RO(temp5_min, temp_min, 4);
0791 static SENSOR_DEVICE_ATTR_RO(temp6_min, temp_min, 5);
0792 
0793 static SENSOR_DEVICE_ATTR_RO(temp1_max, temp_max, 0);
0794 static SENSOR_DEVICE_ATTR_RO(temp2_max, temp_max, 1);
0795 static SENSOR_DEVICE_ATTR_RO(temp3_max, temp_max, 2);
0796 static SENSOR_DEVICE_ATTR_RO(temp4_max, temp_max, 3);
0797 static SENSOR_DEVICE_ATTR_RO(temp5_max, temp_max, 4);
0798 static SENSOR_DEVICE_ATTR_RO(temp6_max, temp_max, 5);
0799 
0800 static SENSOR_DEVICE_ATTR_RO(temp1_crit, temp_crit, 0);
0801 static SENSOR_DEVICE_ATTR_RO(temp2_crit, temp_crit, 1);
0802 static SENSOR_DEVICE_ATTR_RO(temp3_crit, temp_crit, 2);
0803 static SENSOR_DEVICE_ATTR_RO(temp4_crit, temp_crit, 3);
0804 static SENSOR_DEVICE_ATTR_RO(temp5_crit, temp_crit, 4);
0805 static SENSOR_DEVICE_ATTR_RO(temp6_crit, temp_crit, 5);
0806 
0807 static SENSOR_DEVICE_ATTR_RO(temp1_type, temp_type, 0);
0808 static SENSOR_DEVICE_ATTR_RO(temp2_type, temp_type, 1);
0809 static SENSOR_DEVICE_ATTR_RO(temp3_type, temp_type, 2);
0810 static SENSOR_DEVICE_ATTR_RO(temp4_type, temp_type, 3);
0811 static SENSOR_DEVICE_ATTR_RO(temp5_type, temp_type, 4);
0812 static SENSOR_DEVICE_ATTR_RO(temp6_type, temp_type, 5);
0813 
0814 static SENSOR_DEVICE_ATTR_RO(temp1_min_alarm, temp_min_alarm, 0);
0815 static SENSOR_DEVICE_ATTR_RO(temp2_min_alarm, temp_min_alarm, 1);
0816 static SENSOR_DEVICE_ATTR_RO(temp3_min_alarm, temp_min_alarm, 2);
0817 static SENSOR_DEVICE_ATTR_RO(temp4_min_alarm, temp_min_alarm, 3);
0818 static SENSOR_DEVICE_ATTR_RO(temp5_min_alarm, temp_min_alarm, 4);
0819 static SENSOR_DEVICE_ATTR_RO(temp6_min_alarm, temp_min_alarm, 5);
0820 
0821 static SENSOR_DEVICE_ATTR_RO(temp1_max_alarm, temp_max_alarm, 0);
0822 static SENSOR_DEVICE_ATTR_RO(temp2_max_alarm, temp_max_alarm, 1);
0823 static SENSOR_DEVICE_ATTR_RO(temp3_max_alarm, temp_max_alarm, 2);
0824 static SENSOR_DEVICE_ATTR_RO(temp4_max_alarm, temp_max_alarm, 3);
0825 static SENSOR_DEVICE_ATTR_RO(temp5_max_alarm, temp_max_alarm, 4);
0826 static SENSOR_DEVICE_ATTR_RO(temp6_max_alarm, temp_max_alarm, 5);
0827 
0828 static SENSOR_DEVICE_ATTR_RO(temp1_crit_alarm, temp_crit_alarm, 0);
0829 static SENSOR_DEVICE_ATTR_RO(temp2_crit_alarm, temp_crit_alarm, 1);
0830 static SENSOR_DEVICE_ATTR_RO(temp3_crit_alarm, temp_crit_alarm, 2);
0831 static SENSOR_DEVICE_ATTR_RO(temp4_crit_alarm, temp_crit_alarm, 3);
0832 static SENSOR_DEVICE_ATTR_RO(temp5_crit_alarm, temp_crit_alarm, 4);
0833 static SENSOR_DEVICE_ATTR_RO(temp6_crit_alarm, temp_crit_alarm, 5);
0834 
0835 static SENSOR_DEVICE_ATTR_RO(temp1_fault, temp_fault, 0);
0836 static SENSOR_DEVICE_ATTR_RO(temp2_fault, temp_fault, 1);
0837 static SENSOR_DEVICE_ATTR_RO(temp3_fault, temp_fault, 2);
0838 static SENSOR_DEVICE_ATTR_RO(temp4_fault, temp_fault, 3);
0839 static SENSOR_DEVICE_ATTR_RO(temp5_fault, temp_fault, 4);
0840 static SENSOR_DEVICE_ATTR_RO(temp6_fault, temp_fault, 5);
0841 
0842 static struct attribute *pc87427_attributes_temp[6][10] = {
0843     {
0844         &sensor_dev_attr_temp1_input.dev_attr.attr,
0845         &sensor_dev_attr_temp1_min.dev_attr.attr,
0846         &sensor_dev_attr_temp1_max.dev_attr.attr,
0847         &sensor_dev_attr_temp1_crit.dev_attr.attr,
0848         &sensor_dev_attr_temp1_type.dev_attr.attr,
0849         &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
0850         &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
0851         &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
0852         &sensor_dev_attr_temp1_fault.dev_attr.attr,
0853         NULL
0854     }, {
0855         &sensor_dev_attr_temp2_input.dev_attr.attr,
0856         &sensor_dev_attr_temp2_min.dev_attr.attr,
0857         &sensor_dev_attr_temp2_max.dev_attr.attr,
0858         &sensor_dev_attr_temp2_crit.dev_attr.attr,
0859         &sensor_dev_attr_temp2_type.dev_attr.attr,
0860         &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
0861         &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
0862         &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
0863         &sensor_dev_attr_temp2_fault.dev_attr.attr,
0864         NULL
0865     }, {
0866         &sensor_dev_attr_temp3_input.dev_attr.attr,
0867         &sensor_dev_attr_temp3_min.dev_attr.attr,
0868         &sensor_dev_attr_temp3_max.dev_attr.attr,
0869         &sensor_dev_attr_temp3_crit.dev_attr.attr,
0870         &sensor_dev_attr_temp3_type.dev_attr.attr,
0871         &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
0872         &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
0873         &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
0874         &sensor_dev_attr_temp3_fault.dev_attr.attr,
0875         NULL
0876     }, {
0877         &sensor_dev_attr_temp4_input.dev_attr.attr,
0878         &sensor_dev_attr_temp4_min.dev_attr.attr,
0879         &sensor_dev_attr_temp4_max.dev_attr.attr,
0880         &sensor_dev_attr_temp4_crit.dev_attr.attr,
0881         &sensor_dev_attr_temp4_type.dev_attr.attr,
0882         &sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
0883         &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
0884         &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
0885         &sensor_dev_attr_temp4_fault.dev_attr.attr,
0886         NULL
0887     }, {
0888         &sensor_dev_attr_temp5_input.dev_attr.attr,
0889         &sensor_dev_attr_temp5_min.dev_attr.attr,
0890         &sensor_dev_attr_temp5_max.dev_attr.attr,
0891         &sensor_dev_attr_temp5_crit.dev_attr.attr,
0892         &sensor_dev_attr_temp5_type.dev_attr.attr,
0893         &sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
0894         &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
0895         &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
0896         &sensor_dev_attr_temp5_fault.dev_attr.attr,
0897         NULL
0898     }, {
0899         &sensor_dev_attr_temp6_input.dev_attr.attr,
0900         &sensor_dev_attr_temp6_min.dev_attr.attr,
0901         &sensor_dev_attr_temp6_max.dev_attr.attr,
0902         &sensor_dev_attr_temp6_crit.dev_attr.attr,
0903         &sensor_dev_attr_temp6_type.dev_attr.attr,
0904         &sensor_dev_attr_temp6_min_alarm.dev_attr.attr,
0905         &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
0906         &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
0907         &sensor_dev_attr_temp6_fault.dev_attr.attr,
0908         NULL
0909     }
0910 };
0911 
0912 static const struct attribute_group pc87427_group_temp[6] = {
0913     { .attrs = pc87427_attributes_temp[0] },
0914     { .attrs = pc87427_attributes_temp[1] },
0915     { .attrs = pc87427_attributes_temp[2] },
0916     { .attrs = pc87427_attributes_temp[3] },
0917     { .attrs = pc87427_attributes_temp[4] },
0918     { .attrs = pc87427_attributes_temp[5] },
0919 };
0920 
0921 static ssize_t name_show(struct device *dev, struct device_attribute
0922              *devattr, char *buf)
0923 {
0924     struct pc87427_data *data = dev_get_drvdata(dev);
0925 
0926     return sprintf(buf, "%s\n", data->name);
0927 }
0928 static DEVICE_ATTR_RO(name);
0929 
0930 
0931 /*
0932  * Device detection, attach and detach
0933  */
0934 
0935 static int pc87427_request_regions(struct platform_device *pdev,
0936                          int count)
0937 {
0938     struct resource *res;
0939     int i;
0940 
0941     for (i = 0; i < count; i++) {
0942         res = platform_get_resource(pdev, IORESOURCE_IO, i);
0943         if (!res) {
0944             dev_err(&pdev->dev, "Missing resource #%d\n", i);
0945             return -ENOENT;
0946         }
0947         if (!devm_request_region(&pdev->dev, res->start,
0948                      resource_size(res), DRVNAME)) {
0949             dev_err(&pdev->dev,
0950                 "Failed to request region 0x%lx-0x%lx\n",
0951                 (unsigned long)res->start,
0952                 (unsigned long)res->end);
0953             return -EBUSY;
0954         }
0955     }
0956     return 0;
0957 }
0958 
0959 static void pc87427_init_device(struct device *dev)
0960 {
0961     struct pc87427_sio_data *sio_data = dev_get_platdata(dev);
0962     struct pc87427_data *data = dev_get_drvdata(dev);
0963     int i;
0964     u8 reg;
0965 
0966     /* The FMC module should be ready */
0967     reg = pc87427_read8(data, LD_FAN, PC87427_REG_BANK);
0968     if (!(reg & 0x80))
0969         dev_warn(dev, "%s module not ready!\n", "FMC");
0970 
0971     /* Check which fans are enabled */
0972     for (i = 0; i < 8; i++) {
0973         if (!(sio_data->has_fanin & (1 << i)))  /* Not wired */
0974             continue;
0975         reg = pc87427_read8_bank(data, LD_FAN, BANK_FM(i),
0976                      PC87427_REG_FAN_STATUS);
0977         if (reg & FAN_STATUS_MONEN)
0978             data->fan_enabled |= (1 << i);
0979     }
0980 
0981     if (!data->fan_enabled) {
0982         dev_dbg(dev, "Enabling monitoring of all fans\n");
0983         for (i = 0; i < 8; i++) {
0984             if (!(sio_data->has_fanin & (1 << i)))  /* Not wired */
0985                 continue;
0986             pc87427_write8_bank(data, LD_FAN, BANK_FM(i),
0987                         PC87427_REG_FAN_STATUS,
0988                         FAN_STATUS_MONEN);
0989         }
0990         data->fan_enabled = sio_data->has_fanin;
0991     }
0992 
0993     /* Check which PWM outputs are enabled */
0994     for (i = 0; i < 4; i++) {
0995         if (!(sio_data->has_fanout & (1 << i))) /* Not wired */
0996             continue;
0997         reg = pc87427_read8_bank(data, LD_FAN, BANK_FC(i),
0998                      PC87427_REG_PWM_ENABLE);
0999         if (reg & PWM_ENABLE_CTLEN)
1000             data->pwm_enabled |= (1 << i);
1001 
1002         /*
1003          * We don't expose an interface to reconfigure the automatic
1004          * fan control mode, so only allow to return to this mode if
1005          * it was originally set.
1006          */
1007         if ((reg & PWM_ENABLE_MODE_MASK) == PWM_MODE_AUTO) {
1008             dev_dbg(dev, "PWM%d is in automatic control mode\n",
1009                 i + 1);
1010             data->pwm_auto_ok |= (1 << i);
1011         }
1012     }
1013 
1014     /* The HMC module should be ready */
1015     reg = pc87427_read8(data, LD_TEMP, PC87427_REG_BANK);
1016     if (!(reg & 0x80))
1017         dev_warn(dev, "%s module not ready!\n", "HMC");
1018 
1019     /* Check which temperature channels are enabled */
1020     for (i = 0; i < 6; i++) {
1021         reg = pc87427_read8_bank(data, LD_TEMP, BANK_TM(i),
1022                      PC87427_REG_TEMP_STATUS);
1023         if (reg & TEMP_STATUS_CHANEN)
1024             data->temp_enabled |= (1 << i);
1025     }
1026 }
1027 
1028 static void pc87427_remove_files(struct device *dev)
1029 {
1030     struct pc87427_data *data = dev_get_drvdata(dev);
1031     int i;
1032 
1033     device_remove_file(dev, &dev_attr_name);
1034     for (i = 0; i < 8; i++) {
1035         if (!(data->fan_enabled & (1 << i)))
1036             continue;
1037         sysfs_remove_group(&dev->kobj, &pc87427_group_fan[i]);
1038     }
1039     for (i = 0; i < 4; i++) {
1040         if (!(data->pwm_enabled & (1 << i)))
1041             continue;
1042         sysfs_remove_group(&dev->kobj, &pc87427_group_pwm[i]);
1043     }
1044     for (i = 0; i < 6; i++) {
1045         if (!(data->temp_enabled & (1 << i)))
1046             continue;
1047         sysfs_remove_group(&dev->kobj, &pc87427_group_temp[i]);
1048     }
1049 }
1050 
1051 static int pc87427_probe(struct platform_device *pdev)
1052 {
1053     struct pc87427_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1054     struct pc87427_data *data;
1055     int i, err, res_count;
1056 
1057     data = devm_kzalloc(&pdev->dev, sizeof(struct pc87427_data),
1058                 GFP_KERNEL);
1059     if (!data)
1060         return -ENOMEM;
1061 
1062     data->address[0] = sio_data->address[0];
1063     data->address[1] = sio_data->address[1];
1064     res_count = (data->address[0] != 0) + (data->address[1] != 0);
1065 
1066     err = pc87427_request_regions(pdev, res_count);
1067     if (err)
1068         return err;
1069 
1070     mutex_init(&data->lock);
1071     data->name = "pc87427";
1072     platform_set_drvdata(pdev, data);
1073     pc87427_init_device(&pdev->dev);
1074 
1075     /* Register sysfs hooks */
1076     err = device_create_file(&pdev->dev, &dev_attr_name);
1077     if (err)
1078         return err;
1079     for (i = 0; i < 8; i++) {
1080         if (!(data->fan_enabled & (1 << i)))
1081             continue;
1082         err = sysfs_create_group(&pdev->dev.kobj,
1083                      &pc87427_group_fan[i]);
1084         if (err)
1085             goto exit_remove_files;
1086     }
1087     for (i = 0; i < 4; i++) {
1088         if (!(data->pwm_enabled & (1 << i)))
1089             continue;
1090         err = sysfs_create_group(&pdev->dev.kobj,
1091                      &pc87427_group_pwm[i]);
1092         if (err)
1093             goto exit_remove_files;
1094     }
1095     for (i = 0; i < 6; i++) {
1096         if (!(data->temp_enabled & (1 << i)))
1097             continue;
1098         err = sysfs_create_group(&pdev->dev.kobj,
1099                      &pc87427_group_temp[i]);
1100         if (err)
1101             goto exit_remove_files;
1102     }
1103 
1104     data->hwmon_dev = hwmon_device_register(&pdev->dev);
1105     if (IS_ERR(data->hwmon_dev)) {
1106         err = PTR_ERR(data->hwmon_dev);
1107         dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1108         goto exit_remove_files;
1109     }
1110 
1111     return 0;
1112 
1113 exit_remove_files:
1114     pc87427_remove_files(&pdev->dev);
1115     return err;
1116 }
1117 
1118 static int pc87427_remove(struct platform_device *pdev)
1119 {
1120     struct pc87427_data *data = platform_get_drvdata(pdev);
1121 
1122     hwmon_device_unregister(data->hwmon_dev);
1123     pc87427_remove_files(&pdev->dev);
1124 
1125     return 0;
1126 }
1127 
1128 
1129 static struct platform_driver pc87427_driver = {
1130     .driver = {
1131         .name   = DRVNAME,
1132     },
1133     .probe      = pc87427_probe,
1134     .remove     = pc87427_remove,
1135 };
1136 
1137 static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data)
1138 {
1139     struct resource res[2] = {
1140         { .flags    = IORESOURCE_IO },
1141         { .flags    = IORESOURCE_IO },
1142     };
1143     int err, i, res_count;
1144 
1145     res_count = 0;
1146     for (i = 0; i < 2; i++) {
1147         if (!sio_data->address[i])
1148             continue;
1149         res[res_count].start = sio_data->address[i];
1150         res[res_count].end = sio_data->address[i] + REGION_LENGTH - 1;
1151         res[res_count].name = logdev_str[i];
1152 
1153         err = acpi_check_resource_conflict(&res[res_count]);
1154         if (err)
1155             goto exit;
1156 
1157         res_count++;
1158     }
1159 
1160     pdev = platform_device_alloc(DRVNAME, res[0].start);
1161     if (!pdev) {
1162         err = -ENOMEM;
1163         pr_err("Device allocation failed\n");
1164         goto exit;
1165     }
1166 
1167     err = platform_device_add_resources(pdev, res, res_count);
1168     if (err) {
1169         pr_err("Device resource addition failed (%d)\n", err);
1170         goto exit_device_put;
1171     }
1172 
1173     err = platform_device_add_data(pdev, sio_data,
1174                        sizeof(struct pc87427_sio_data));
1175     if (err) {
1176         pr_err("Platform data allocation failed\n");
1177         goto exit_device_put;
1178     }
1179 
1180     err = platform_device_add(pdev);
1181     if (err) {
1182         pr_err("Device addition failed (%d)\n", err);
1183         goto exit_device_put;
1184     }
1185 
1186     return 0;
1187 
1188 exit_device_put:
1189     platform_device_put(pdev);
1190 exit:
1191     return err;
1192 }
1193 
1194 static int __init pc87427_find(int sioaddr, struct pc87427_sio_data *sio_data)
1195 {
1196     u16 val;
1197     u8 cfg, cfg_b;
1198     int i, err;
1199 
1200     err = superio_enter(sioaddr);
1201     if (err)
1202         return err;
1203 
1204     /* Identify device */
1205     val = force_id ? force_id : superio_inb(sioaddr, SIOREG_DEVID);
1206     if (val != 0xf2) {  /* PC87427 */
1207         err = -ENODEV;
1208         goto exit;
1209     }
1210 
1211     for (i = 0; i < 2; i++) {
1212         sio_data->address[i] = 0;
1213         /* Select logical device */
1214         superio_outb(sioaddr, SIOREG_LDSEL, logdev[i]);
1215 
1216         val = superio_inb(sioaddr, SIOREG_ACT);
1217         if (!(val & 0x01)) {
1218             pr_info("Logical device 0x%02x not activated\n",
1219                 logdev[i]);
1220             continue;
1221         }
1222 
1223         val = superio_inb(sioaddr, SIOREG_MAP);
1224         if (val & 0x01) {
1225             pr_warn("Logical device 0x%02x is memory-mapped, can't use\n",
1226                 logdev[i]);
1227             continue;
1228         }
1229 
1230         val = (superio_inb(sioaddr, SIOREG_IOBASE) << 8)
1231             | superio_inb(sioaddr, SIOREG_IOBASE + 1);
1232         if (!val) {
1233             pr_info("I/O base address not set for logical device 0x%02x\n",
1234                 logdev[i]);
1235             continue;
1236         }
1237         sio_data->address[i] = val;
1238     }
1239 
1240     /* No point in loading the driver if everything is disabled */
1241     if (!sio_data->address[0] && !sio_data->address[1]) {
1242         err = -ENODEV;
1243         goto exit;
1244     }
1245 
1246     /* Check which fan inputs are wired */
1247     sio_data->has_fanin = (1 << 2) | (1 << 3);  /* FANIN2, FANIN3 */
1248 
1249     cfg = superio_inb(sioaddr, SIOREG_CF2);
1250     if (!(cfg & (1 << 3)))
1251         sio_data->has_fanin |= (1 << 0);    /* FANIN0 */
1252     if (!(cfg & (1 << 2)))
1253         sio_data->has_fanin |= (1 << 4);    /* FANIN4 */
1254 
1255     cfg = superio_inb(sioaddr, SIOREG_CFD);
1256     if (!(cfg & (1 << 0)))
1257         sio_data->has_fanin |= (1 << 1);    /* FANIN1 */
1258 
1259     cfg = superio_inb(sioaddr, SIOREG_CF4);
1260     if (!(cfg & (1 << 0)))
1261         sio_data->has_fanin |= (1 << 7);    /* FANIN7 */
1262     cfg_b = superio_inb(sioaddr, SIOREG_CFB);
1263     if (!(cfg & (1 << 1)) && (cfg_b & (1 << 3)))
1264         sio_data->has_fanin |= (1 << 5);    /* FANIN5 */
1265     cfg = superio_inb(sioaddr, SIOREG_CF3);
1266     if ((cfg & (1 << 3)) && !(cfg_b & (1 << 5)))
1267         sio_data->has_fanin |= (1 << 6);    /* FANIN6 */
1268 
1269     /* Check which fan outputs are wired */
1270     sio_data->has_fanout = (1 << 0);        /* FANOUT0 */
1271     if (cfg_b & (1 << 0))
1272         sio_data->has_fanout |= (1 << 3);   /* FANOUT3 */
1273 
1274     cfg = superio_inb(sioaddr, SIOREG_CFC);
1275     if (!(cfg & (1 << 4))) {
1276         if (cfg_b & (1 << 1))
1277             sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
1278         if (cfg_b & (1 << 2))
1279             sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
1280     }
1281 
1282     /* FANOUT1 and FANOUT2 can each be routed to 2 different pins */
1283     cfg = superio_inb(sioaddr, SIOREG_CF5);
1284     if (cfg & (1 << 6))
1285         sio_data->has_fanout |= (1 << 1);   /* FANOUT1 */
1286     if (cfg & (1 << 5))
1287         sio_data->has_fanout |= (1 << 2);   /* FANOUT2 */
1288 
1289 exit:
1290     superio_exit(sioaddr);
1291     return err;
1292 }
1293 
1294 static int __init pc87427_init(void)
1295 {
1296     int err;
1297     struct pc87427_sio_data sio_data;
1298 
1299     if (pc87427_find(0x2e, &sio_data)
1300      && pc87427_find(0x4e, &sio_data))
1301         return -ENODEV;
1302 
1303     err = platform_driver_register(&pc87427_driver);
1304     if (err)
1305         goto exit;
1306 
1307     /* Sets global pdev as a side effect */
1308     err = pc87427_device_add(&sio_data);
1309     if (err)
1310         goto exit_driver;
1311 
1312     return 0;
1313 
1314 exit_driver:
1315     platform_driver_unregister(&pc87427_driver);
1316 exit:
1317     return err;
1318 }
1319 
1320 static void __exit pc87427_exit(void)
1321 {
1322     platform_device_unregister(pdev);
1323     platform_driver_unregister(&pc87427_driver);
1324 }
1325 
1326 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1327 MODULE_DESCRIPTION("PC87427 hardware monitoring driver");
1328 MODULE_LICENSE("GPL");
1329 
1330 module_init(pc87427_init);
1331 module_exit(pc87427_exit);
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