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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * nct6775 - Platform driver for the hardware monitoring
0004  *       functionality of Nuvoton NCT677x Super-I/O chips
0005  *
0006  * Copyright (C) 2012  Guenter Roeck <linux@roeck-us.net>
0007  */
0008 
0009 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0010 
0011 #include <linux/acpi.h>
0012 #include <linux/dmi.h>
0013 #include <linux/hwmon-sysfs.h>
0014 #include <linux/hwmon-vid.h>
0015 #include <linux/init.h>
0016 #include <linux/io.h>
0017 #include <linux/module.h>
0018 #include <linux/platform_device.h>
0019 #include <linux/regmap.h>
0020 #include <linux/wmi.h>
0021 
0022 #include "nct6775.h"
0023 
0024 enum sensor_access { access_direct, access_asuswmi };
0025 
0026 static const char * const nct6775_sio_names[] __initconst = {
0027     "NCT6106D",
0028     "NCT6116D",
0029     "NCT6775F",
0030     "NCT6776D/F",
0031     "NCT6779D",
0032     "NCT6791D",
0033     "NCT6792D",
0034     "NCT6793D",
0035     "NCT6795D",
0036     "NCT6796D",
0037     "NCT6797D",
0038     "NCT6798D",
0039 };
0040 
0041 static unsigned short force_id;
0042 module_param(force_id, ushort, 0);
0043 MODULE_PARM_DESC(force_id, "Override the detected device ID");
0044 
0045 static unsigned short fan_debounce;
0046 module_param(fan_debounce, ushort, 0);
0047 MODULE_PARM_DESC(fan_debounce, "Enable debouncing for fan RPM signal");
0048 
0049 #define DRVNAME "nct6775"
0050 
0051 #define NCT6775_PORT_CHIPID 0x58
0052 
0053 /*
0054  * ISA constants
0055  */
0056 
0057 #define IOREGION_ALIGNMENT  (~7)
0058 #define IOREGION_OFFSET     5
0059 #define IOREGION_LENGTH     2
0060 #define ADDR_REG_OFFSET     0
0061 #define DATA_REG_OFFSET     1
0062 
0063 /*
0064  * Super-I/O constants and functions
0065  */
0066 
0067 #define NCT6775_LD_ACPI     0x0a
0068 #define NCT6775_LD_HWM      0x0b
0069 #define NCT6775_LD_VID      0x0d
0070 #define NCT6775_LD_12       0x12
0071 
0072 #define SIO_REG_LDSEL       0x07    /* Logical device select */
0073 #define SIO_REG_DEVID       0x20    /* Device ID (2 bytes) */
0074 #define SIO_REG_ENABLE      0x30    /* Logical device enable */
0075 #define SIO_REG_ADDR        0x60    /* Logical device address (2 bytes) */
0076 
0077 #define SIO_NCT6106_ID      0xc450
0078 #define SIO_NCT6116_ID      0xd280
0079 #define SIO_NCT6775_ID      0xb470
0080 #define SIO_NCT6776_ID      0xc330
0081 #define SIO_NCT6779_ID      0xc560
0082 #define SIO_NCT6791_ID      0xc800
0083 #define SIO_NCT6792_ID      0xc910
0084 #define SIO_NCT6793_ID      0xd120
0085 #define SIO_NCT6795_ID      0xd350
0086 #define SIO_NCT6796_ID      0xd420
0087 #define SIO_NCT6797_ID      0xd450
0088 #define SIO_NCT6798_ID      0xd428
0089 #define SIO_ID_MASK     0xFFF8
0090 
0091 /*
0092  * Control registers
0093  */
0094 #define NCT6775_REG_CR_FAN_DEBOUNCE 0xf0
0095 
0096 struct nct6775_sio_data {
0097     int sioreg;
0098     int ld;
0099     enum kinds kind;
0100     enum sensor_access access;
0101 
0102     /* superio_() callbacks  */
0103     void (*sio_outb)(struct nct6775_sio_data *sio_data, int reg, int val);
0104     int (*sio_inb)(struct nct6775_sio_data *sio_data, int reg);
0105     void (*sio_select)(struct nct6775_sio_data *sio_data, int ld);
0106     int (*sio_enter)(struct nct6775_sio_data *sio_data);
0107     void (*sio_exit)(struct nct6775_sio_data *sio_data);
0108 };
0109 
0110 #define ASUSWMI_MONITORING_GUID     "466747A0-70EC-11DE-8A39-0800200C9A66"
0111 #define ASUSWMI_METHODID_RSIO       0x5253494F
0112 #define ASUSWMI_METHODID_WSIO       0x5753494F
0113 #define ASUSWMI_METHODID_RHWM       0x5248574D
0114 #define ASUSWMI_METHODID_WHWM       0x5748574D
0115 #define ASUSWMI_UNSUPPORTED_METHOD  0xFFFFFFFE
0116 
0117 static int nct6775_asuswmi_evaluate_method(u32 method_id, u8 bank, u8 reg, u8 val, u32 *retval)
0118 {
0119 #if IS_ENABLED(CONFIG_ACPI_WMI)
0120     u32 args = bank | (reg << 8) | (val << 16);
0121     struct acpi_buffer input = { (acpi_size) sizeof(args), &args };
0122     struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL };
0123     acpi_status status;
0124     union acpi_object *obj;
0125     u32 tmp = ASUSWMI_UNSUPPORTED_METHOD;
0126 
0127     status = wmi_evaluate_method(ASUSWMI_MONITORING_GUID, 0,
0128                      method_id, &input, &output);
0129 
0130     if (ACPI_FAILURE(status))
0131         return -EIO;
0132 
0133     obj = output.pointer;
0134     if (obj && obj->type == ACPI_TYPE_INTEGER)
0135         tmp = obj->integer.value;
0136 
0137     if (retval)
0138         *retval = tmp;
0139 
0140     kfree(obj);
0141 
0142     if (tmp == ASUSWMI_UNSUPPORTED_METHOD)
0143         return -ENODEV;
0144     return 0;
0145 #else
0146     return -EOPNOTSUPP;
0147 #endif
0148 }
0149 
0150 static inline int nct6775_asuswmi_write(u8 bank, u8 reg, u8 val)
0151 {
0152     return nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WHWM, bank,
0153                           reg, val, NULL);
0154 }
0155 
0156 static inline int nct6775_asuswmi_read(u8 bank, u8 reg, u8 *val)
0157 {
0158     u32 ret, tmp = 0;
0159 
0160     ret = nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RHWM, bank,
0161                           reg, 0, &tmp);
0162     *val = tmp;
0163     return ret;
0164 }
0165 
0166 static int superio_wmi_inb(struct nct6775_sio_data *sio_data, int reg)
0167 {
0168     int tmp = 0;
0169 
0170     nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_RSIO, sio_data->ld,
0171                     reg, 0, &tmp);
0172     return tmp;
0173 }
0174 
0175 static void superio_wmi_outb(struct nct6775_sio_data *sio_data, int reg, int val)
0176 {
0177     nct6775_asuswmi_evaluate_method(ASUSWMI_METHODID_WSIO, sio_data->ld,
0178                     reg, val, NULL);
0179 }
0180 
0181 static void superio_wmi_select(struct nct6775_sio_data *sio_data, int ld)
0182 {
0183     sio_data->ld = ld;
0184 }
0185 
0186 static int superio_wmi_enter(struct nct6775_sio_data *sio_data)
0187 {
0188     return 0;
0189 }
0190 
0191 static void superio_wmi_exit(struct nct6775_sio_data *sio_data)
0192 {
0193 }
0194 
0195 static void superio_outb(struct nct6775_sio_data *sio_data, int reg, int val)
0196 {
0197     int ioreg = sio_data->sioreg;
0198 
0199     outb(reg, ioreg);
0200     outb(val, ioreg + 1);
0201 }
0202 
0203 static int superio_inb(struct nct6775_sio_data *sio_data, int reg)
0204 {
0205     int ioreg = sio_data->sioreg;
0206 
0207     outb(reg, ioreg);
0208     return inb(ioreg + 1);
0209 }
0210 
0211 static void superio_select(struct nct6775_sio_data *sio_data, int ld)
0212 {
0213     int ioreg = sio_data->sioreg;
0214 
0215     outb(SIO_REG_LDSEL, ioreg);
0216     outb(ld, ioreg + 1);
0217 }
0218 
0219 static int superio_enter(struct nct6775_sio_data *sio_data)
0220 {
0221     int ioreg = sio_data->sioreg;
0222 
0223     /*
0224      * Try to reserve <ioreg> and <ioreg + 1> for exclusive access.
0225      */
0226     if (!request_muxed_region(ioreg, 2, DRVNAME))
0227         return -EBUSY;
0228 
0229     outb(0x87, ioreg);
0230     outb(0x87, ioreg);
0231 
0232     return 0;
0233 }
0234 
0235 static void superio_exit(struct nct6775_sio_data *sio_data)
0236 {
0237     int ioreg = sio_data->sioreg;
0238 
0239     outb(0xaa, ioreg);
0240     outb(0x02, ioreg);
0241     outb(0x02, ioreg + 1);
0242     release_region(ioreg, 2);
0243 }
0244 
0245 static inline void nct6775_wmi_set_bank(struct nct6775_data *data, u16 reg)
0246 {
0247     u8 bank = reg >> 8;
0248 
0249     data->bank = bank;
0250 }
0251 
0252 static int nct6775_wmi_reg_read(void *ctx, unsigned int reg, unsigned int *val)
0253 {
0254     struct nct6775_data *data = ctx;
0255     int err, word_sized = nct6775_reg_is_word_sized(data, reg);
0256     u8 tmp = 0;
0257     u16 res;
0258 
0259     nct6775_wmi_set_bank(data, reg);
0260 
0261     err = nct6775_asuswmi_read(data->bank, reg & 0xff, &tmp);
0262     if (err)
0263         return err;
0264 
0265     res = tmp;
0266     if (word_sized) {
0267         err = nct6775_asuswmi_read(data->bank, (reg & 0xff) + 1, &tmp);
0268         if (err)
0269             return err;
0270 
0271         res = (res << 8) + tmp;
0272     }
0273     *val = res;
0274     return 0;
0275 }
0276 
0277 static int nct6775_wmi_reg_write(void *ctx, unsigned int reg, unsigned int value)
0278 {
0279     struct nct6775_data *data = ctx;
0280     int res, word_sized = nct6775_reg_is_word_sized(data, reg);
0281 
0282     nct6775_wmi_set_bank(data, reg);
0283 
0284     if (word_sized) {
0285         res = nct6775_asuswmi_write(data->bank, reg & 0xff, value >> 8);
0286         if (res)
0287             return res;
0288 
0289         res = nct6775_asuswmi_write(data->bank, (reg & 0xff) + 1, value);
0290     } else {
0291         res = nct6775_asuswmi_write(data->bank, reg & 0xff, value);
0292     }
0293 
0294     return res;
0295 }
0296 
0297 /*
0298  * On older chips, only registers 0x50-0x5f are banked.
0299  * On more recent chips, all registers are banked.
0300  * Assume that is the case and set the bank number for each access.
0301  * Cache the bank number so it only needs to be set if it changes.
0302  */
0303 static inline void nct6775_set_bank(struct nct6775_data *data, u16 reg)
0304 {
0305     u8 bank = reg >> 8;
0306 
0307     if (data->bank != bank) {
0308         outb_p(NCT6775_REG_BANK, data->addr + ADDR_REG_OFFSET);
0309         outb_p(bank, data->addr + DATA_REG_OFFSET);
0310         data->bank = bank;
0311     }
0312 }
0313 
0314 static int nct6775_reg_read(void *ctx, unsigned int reg, unsigned int *val)
0315 {
0316     struct nct6775_data *data = ctx;
0317     int word_sized = nct6775_reg_is_word_sized(data, reg);
0318 
0319     nct6775_set_bank(data, reg);
0320     outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
0321     *val = inb_p(data->addr + DATA_REG_OFFSET);
0322     if (word_sized) {
0323         outb_p((reg & 0xff) + 1,
0324                data->addr + ADDR_REG_OFFSET);
0325         *val = (*val << 8) + inb_p(data->addr + DATA_REG_OFFSET);
0326     }
0327     return 0;
0328 }
0329 
0330 static int nct6775_reg_write(void *ctx, unsigned int reg, unsigned int value)
0331 {
0332     struct nct6775_data *data = ctx;
0333     int word_sized = nct6775_reg_is_word_sized(data, reg);
0334 
0335     nct6775_set_bank(data, reg);
0336     outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
0337     if (word_sized) {
0338         outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
0339         outb_p((reg & 0xff) + 1,
0340                data->addr + ADDR_REG_OFFSET);
0341     }
0342     outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
0343     return 0;
0344 }
0345 
0346 static void nct6791_enable_io_mapping(struct nct6775_sio_data *sio_data)
0347 {
0348     int val;
0349 
0350     val = sio_data->sio_inb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE);
0351     if (val & 0x10) {
0352         pr_info("Enabling hardware monitor logical device mappings.\n");
0353         sio_data->sio_outb(sio_data, NCT6791_REG_HM_IO_SPACE_LOCK_ENABLE,
0354                    val & ~0x10);
0355     }
0356 }
0357 
0358 static int __maybe_unused nct6775_suspend(struct device *dev)
0359 {
0360     int err;
0361     u16 tmp;
0362     struct nct6775_data *data = nct6775_update_device(dev);
0363 
0364     if (IS_ERR(data))
0365         return PTR_ERR(data);
0366 
0367     mutex_lock(&data->update_lock);
0368     err = nct6775_read_value(data, data->REG_VBAT, &tmp);
0369     if (err)
0370         goto out;
0371     data->vbat = tmp;
0372     if (data->kind == nct6775) {
0373         err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &tmp);
0374         if (err)
0375             goto out;
0376         data->fandiv1 = tmp;
0377 
0378         err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &tmp);
0379         if (err)
0380             goto out;
0381         data->fandiv2 = tmp;
0382     }
0383 out:
0384     mutex_unlock(&data->update_lock);
0385 
0386     return err;
0387 }
0388 
0389 static int __maybe_unused nct6775_resume(struct device *dev)
0390 {
0391     struct nct6775_data *data = dev_get_drvdata(dev);
0392     struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
0393     int i, j, err = 0;
0394     u8 reg;
0395 
0396     mutex_lock(&data->update_lock);
0397     data->bank = 0xff;      /* Force initial bank selection */
0398 
0399     err = sio_data->sio_enter(sio_data);
0400     if (err)
0401         goto abort;
0402 
0403     sio_data->sio_select(sio_data, NCT6775_LD_HWM);
0404     reg = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
0405     if (reg != data->sio_reg_enable)
0406         sio_data->sio_outb(sio_data, SIO_REG_ENABLE, data->sio_reg_enable);
0407 
0408     if (data->kind == nct6791 || data->kind == nct6792 ||
0409         data->kind == nct6793 || data->kind == nct6795 ||
0410         data->kind == nct6796 || data->kind == nct6797 ||
0411         data->kind == nct6798)
0412         nct6791_enable_io_mapping(sio_data);
0413 
0414     sio_data->sio_exit(sio_data);
0415 
0416     /* Restore limits */
0417     for (i = 0; i < data->in_num; i++) {
0418         if (!(data->have_in & BIT(i)))
0419             continue;
0420 
0421         err = nct6775_write_value(data, data->REG_IN_MINMAX[0][i], data->in[i][1]);
0422         if (err)
0423             goto abort;
0424         err = nct6775_write_value(data, data->REG_IN_MINMAX[1][i], data->in[i][2]);
0425         if (err)
0426             goto abort;
0427     }
0428 
0429     for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
0430         if (!(data->has_fan_min & BIT(i)))
0431             continue;
0432 
0433         err = nct6775_write_value(data, data->REG_FAN_MIN[i], data->fan_min[i]);
0434         if (err)
0435             goto abort;
0436     }
0437 
0438     for (i = 0; i < NUM_TEMP; i++) {
0439         if (!(data->have_temp & BIT(i)))
0440             continue;
0441 
0442         for (j = 1; j < ARRAY_SIZE(data->reg_temp); j++)
0443             if (data->reg_temp[j][i]) {
0444                 err = nct6775_write_temp(data, data->reg_temp[j][i],
0445                              data->temp[j][i]);
0446                 if (err)
0447                     goto abort;
0448             }
0449     }
0450 
0451     /* Restore other settings */
0452     err = nct6775_write_value(data, data->REG_VBAT, data->vbat);
0453     if (err)
0454         goto abort;
0455     if (data->kind == nct6775) {
0456         err = nct6775_write_value(data, NCT6775_REG_FANDIV1, data->fandiv1);
0457         if (err)
0458             goto abort;
0459         err = nct6775_write_value(data, NCT6775_REG_FANDIV2, data->fandiv2);
0460     }
0461 
0462 abort:
0463     /* Force re-reading all values */
0464     data->valid = false;
0465     mutex_unlock(&data->update_lock);
0466 
0467     return err;
0468 }
0469 
0470 static SIMPLE_DEV_PM_OPS(nct6775_dev_pm_ops, nct6775_suspend, nct6775_resume);
0471 
0472 static void
0473 nct6775_check_fan_inputs(struct nct6775_data *data, struct nct6775_sio_data *sio_data)
0474 {
0475     bool fan3pin = false, fan4pin = false, fan4min = false;
0476     bool fan5pin = false, fan6pin = false, fan7pin = false;
0477     bool pwm3pin = false, pwm4pin = false, pwm5pin = false;
0478     bool pwm6pin = false, pwm7pin = false;
0479 
0480     /* Store SIO_REG_ENABLE for use during resume */
0481     sio_data->sio_select(sio_data, NCT6775_LD_HWM);
0482     data->sio_reg_enable = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
0483 
0484     /* fan4 and fan5 share some pins with the GPIO and serial flash */
0485     if (data->kind == nct6775) {
0486         int cr2c = sio_data->sio_inb(sio_data, 0x2c);
0487 
0488         fan3pin = cr2c & BIT(6);
0489         pwm3pin = cr2c & BIT(7);
0490 
0491         /* On NCT6775, fan4 shares pins with the fdc interface */
0492         fan4pin = !(sio_data->sio_inb(sio_data, 0x2A) & 0x80);
0493     } else if (data->kind == nct6776) {
0494         bool gpok = sio_data->sio_inb(sio_data, 0x27) & 0x80;
0495         const char *board_vendor, *board_name;
0496 
0497         board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
0498         board_name = dmi_get_system_info(DMI_BOARD_NAME);
0499 
0500         if (board_name && board_vendor &&
0501             !strcmp(board_vendor, "ASRock")) {
0502             /*
0503              * Auxiliary fan monitoring is not enabled on ASRock
0504              * Z77 Pro4-M if booted in UEFI Ultra-FastBoot mode.
0505              * Observed with BIOS version 2.00.
0506              */
0507             if (!strcmp(board_name, "Z77 Pro4-M")) {
0508                 if ((data->sio_reg_enable & 0xe0) != 0xe0) {
0509                     data->sio_reg_enable |= 0xe0;
0510                     sio_data->sio_outb(sio_data, SIO_REG_ENABLE,
0511                              data->sio_reg_enable);
0512                 }
0513             }
0514         }
0515 
0516         if (data->sio_reg_enable & 0x80)
0517             fan3pin = gpok;
0518         else
0519             fan3pin = !(sio_data->sio_inb(sio_data, 0x24) & 0x40);
0520 
0521         if (data->sio_reg_enable & 0x40)
0522             fan4pin = gpok;
0523         else
0524             fan4pin = sio_data->sio_inb(sio_data, 0x1C) & 0x01;
0525 
0526         if (data->sio_reg_enable & 0x20)
0527             fan5pin = gpok;
0528         else
0529             fan5pin = sio_data->sio_inb(sio_data, 0x1C) & 0x02;
0530 
0531         fan4min = fan4pin;
0532         pwm3pin = fan3pin;
0533     } else if (data->kind == nct6106) {
0534         int cr24 = sio_data->sio_inb(sio_data, 0x24);
0535 
0536         fan3pin = !(cr24 & 0x80);
0537         pwm3pin = cr24 & 0x08;
0538     } else if (data->kind == nct6116) {
0539         int cr1a = sio_data->sio_inb(sio_data, 0x1a);
0540         int cr1b = sio_data->sio_inb(sio_data, 0x1b);
0541         int cr24 = sio_data->sio_inb(sio_data, 0x24);
0542         int cr2a = sio_data->sio_inb(sio_data, 0x2a);
0543         int cr2b = sio_data->sio_inb(sio_data, 0x2b);
0544         int cr2f = sio_data->sio_inb(sio_data, 0x2f);
0545 
0546         fan3pin = !(cr2b & 0x10);
0547         fan4pin = (cr2b & 0x80) ||          // pin 1(2)
0548             (!(cr2f & 0x10) && (cr1a & 0x04));  // pin 65(66)
0549         fan5pin = (cr2b & 0x80) ||          // pin 126(127)
0550             (!(cr1b & 0x03) && (cr2a & 0x02));  // pin 94(96)
0551 
0552         pwm3pin = fan3pin && (cr24 & 0x08);
0553         pwm4pin = fan4pin;
0554         pwm5pin = fan5pin;
0555     } else {
0556         /*
0557          * NCT6779D, NCT6791D, NCT6792D, NCT6793D, NCT6795D, NCT6796D,
0558          * NCT6797D, NCT6798D
0559          */
0560         int cr1a = sio_data->sio_inb(sio_data, 0x1a);
0561         int cr1b = sio_data->sio_inb(sio_data, 0x1b);
0562         int cr1c = sio_data->sio_inb(sio_data, 0x1c);
0563         int cr1d = sio_data->sio_inb(sio_data, 0x1d);
0564         int cr2a = sio_data->sio_inb(sio_data, 0x2a);
0565         int cr2b = sio_data->sio_inb(sio_data, 0x2b);
0566         int cr2d = sio_data->sio_inb(sio_data, 0x2d);
0567         int cr2f = sio_data->sio_inb(sio_data, 0x2f);
0568         bool dsw_en = cr2f & BIT(3);
0569         bool ddr4_en = cr2f & BIT(4);
0570         int cre0;
0571         int creb;
0572         int cred;
0573 
0574         sio_data->sio_select(sio_data, NCT6775_LD_12);
0575         cre0 = sio_data->sio_inb(sio_data, 0xe0);
0576         creb = sio_data->sio_inb(sio_data, 0xeb);
0577         cred = sio_data->sio_inb(sio_data, 0xed);
0578 
0579         fan3pin = !(cr1c & BIT(5));
0580         fan4pin = !(cr1c & BIT(6));
0581         fan5pin = !(cr1c & BIT(7));
0582 
0583         pwm3pin = !(cr1c & BIT(0));
0584         pwm4pin = !(cr1c & BIT(1));
0585         pwm5pin = !(cr1c & BIT(2));
0586 
0587         switch (data->kind) {
0588         case nct6791:
0589             fan6pin = cr2d & BIT(1);
0590             pwm6pin = cr2d & BIT(0);
0591             break;
0592         case nct6792:
0593             fan6pin = !dsw_en && (cr2d & BIT(1));
0594             pwm6pin = !dsw_en && (cr2d & BIT(0));
0595             break;
0596         case nct6793:
0597             fan5pin |= cr1b & BIT(5);
0598             fan5pin |= creb & BIT(5);
0599 
0600             fan6pin = !dsw_en && (cr2d & BIT(1));
0601             fan6pin |= creb & BIT(3);
0602 
0603             pwm5pin |= cr2d & BIT(7);
0604             pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
0605 
0606             pwm6pin = !dsw_en && (cr2d & BIT(0));
0607             pwm6pin |= creb & BIT(2);
0608             break;
0609         case nct6795:
0610             fan5pin |= cr1b & BIT(5);
0611             fan5pin |= creb & BIT(5);
0612 
0613             fan6pin = (cr2a & BIT(4)) &&
0614                     (!dsw_en || (cred & BIT(4)));
0615             fan6pin |= creb & BIT(3);
0616 
0617             pwm5pin |= cr2d & BIT(7);
0618             pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
0619 
0620             pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
0621             pwm6pin |= creb & BIT(2);
0622             break;
0623         case nct6796:
0624             fan5pin |= cr1b & BIT(5);
0625             fan5pin |= (cre0 & BIT(3)) && !(cr1b & BIT(0));
0626             fan5pin |= creb & BIT(5);
0627 
0628             fan6pin = (cr2a & BIT(4)) &&
0629                     (!dsw_en || (cred & BIT(4)));
0630             fan6pin |= creb & BIT(3);
0631 
0632             fan7pin = !(cr2b & BIT(2));
0633 
0634             pwm5pin |= cr2d & BIT(7);
0635             pwm5pin |= (cre0 & BIT(4)) && !(cr1b & BIT(0));
0636             pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
0637 
0638             pwm6pin = (cr2a & BIT(3)) && (cred & BIT(2));
0639             pwm6pin |= creb & BIT(2);
0640 
0641             pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
0642             break;
0643         case nct6797:
0644             fan5pin |= !ddr4_en && (cr1b & BIT(5));
0645             fan5pin |= creb & BIT(5);
0646 
0647             fan6pin = cr2a & BIT(4);
0648             fan6pin |= creb & BIT(3);
0649 
0650             fan7pin = cr1a & BIT(1);
0651 
0652             pwm5pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
0653             pwm5pin |= !ddr4_en && (cr2d & BIT(7));
0654 
0655             pwm6pin = creb & BIT(2);
0656             pwm6pin |= cred & BIT(2);
0657 
0658             pwm7pin = cr1d & BIT(4);
0659             break;
0660         case nct6798:
0661             fan6pin = !(cr1b & BIT(0)) && (cre0 & BIT(3));
0662             fan6pin |= cr2a & BIT(4);
0663             fan6pin |= creb & BIT(5);
0664 
0665             fan7pin = cr1b & BIT(5);
0666             fan7pin |= !(cr2b & BIT(2));
0667             fan7pin |= creb & BIT(3);
0668 
0669             pwm6pin = !(cr1b & BIT(0)) && (cre0 & BIT(4));
0670             pwm6pin |= !(cred & BIT(2)) && (cr2a & BIT(3));
0671             pwm6pin |= (creb & BIT(4)) && !(cr2a & BIT(0));
0672 
0673             pwm7pin = !(cr1d & (BIT(2) | BIT(3)));
0674             pwm7pin |= cr2d & BIT(7);
0675             pwm7pin |= creb & BIT(2);
0676             break;
0677         default:    /* NCT6779D */
0678             break;
0679         }
0680 
0681         fan4min = fan4pin;
0682     }
0683 
0684     /* fan 1 and 2 (0x03) are always present */
0685     data->has_fan = 0x03 | (fan3pin << 2) | (fan4pin << 3) |
0686         (fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
0687     data->has_fan_min = 0x03 | (fan3pin << 2) | (fan4min << 3) |
0688         (fan5pin << 4) | (fan6pin << 5) | (fan7pin << 6);
0689     data->has_pwm = 0x03 | (pwm3pin << 2) | (pwm4pin << 3) |
0690         (pwm5pin << 4) | (pwm6pin << 5) | (pwm7pin << 6);
0691 }
0692 
0693 static ssize_t
0694 cpu0_vid_show(struct device *dev, struct device_attribute *attr, char *buf)
0695 {
0696     struct nct6775_data *data = dev_get_drvdata(dev);
0697 
0698     return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
0699 }
0700 
0701 static DEVICE_ATTR_RO(cpu0_vid);
0702 
0703 /* Case open detection */
0704 
0705 static const u8 NCT6775_REG_CR_CASEOPEN_CLR[] = { 0xe6, 0xee };
0706 static const u8 NCT6775_CR_CASEOPEN_CLR_MASK[] = { 0x20, 0x01 };
0707 
0708 static ssize_t
0709 clear_caseopen(struct device *dev, struct device_attribute *attr,
0710            const char *buf, size_t count)
0711 {
0712     struct nct6775_data *data = dev_get_drvdata(dev);
0713     struct nct6775_sio_data *sio_data = data->driver_data;
0714     int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
0715     unsigned long val;
0716     u8 reg;
0717     int ret;
0718 
0719     if (kstrtoul(buf, 10, &val) || val != 0)
0720         return -EINVAL;
0721 
0722     mutex_lock(&data->update_lock);
0723 
0724     /*
0725      * Use CR registers to clear caseopen status.
0726      * The CR registers are the same for all chips, and not all chips
0727      * support clearing the caseopen status through "regular" registers.
0728      */
0729     ret = sio_data->sio_enter(sio_data);
0730     if (ret) {
0731         count = ret;
0732         goto error;
0733     }
0734 
0735     sio_data->sio_select(sio_data, NCT6775_LD_ACPI);
0736     reg = sio_data->sio_inb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr]);
0737     reg |= NCT6775_CR_CASEOPEN_CLR_MASK[nr];
0738     sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
0739     reg &= ~NCT6775_CR_CASEOPEN_CLR_MASK[nr];
0740     sio_data->sio_outb(sio_data, NCT6775_REG_CR_CASEOPEN_CLR[nr], reg);
0741     sio_data->sio_exit(sio_data);
0742 
0743     data->valid = false;    /* Force cache refresh */
0744 error:
0745     mutex_unlock(&data->update_lock);
0746     return count;
0747 }
0748 
0749 static SENSOR_DEVICE_ATTR(intrusion0_alarm, 0644, nct6775_show_alarm,
0750               clear_caseopen, INTRUSION_ALARM_BASE);
0751 static SENSOR_DEVICE_ATTR(intrusion1_alarm, 0644, nct6775_show_alarm,
0752               clear_caseopen, INTRUSION_ALARM_BASE + 1);
0753 static SENSOR_DEVICE_ATTR(intrusion0_beep, 0644, nct6775_show_beep,
0754               nct6775_store_beep, INTRUSION_ALARM_BASE);
0755 static SENSOR_DEVICE_ATTR(intrusion1_beep, 0644, nct6775_show_beep,
0756               nct6775_store_beep, INTRUSION_ALARM_BASE + 1);
0757 static SENSOR_DEVICE_ATTR(beep_enable, 0644, nct6775_show_beep,
0758               nct6775_store_beep, BEEP_ENABLE_BASE);
0759 
0760 static umode_t nct6775_other_is_visible(struct kobject *kobj,
0761                     struct attribute *attr, int index)
0762 {
0763     struct device *dev = kobj_to_dev(kobj);
0764     struct nct6775_data *data = dev_get_drvdata(dev);
0765 
0766     if (index == 0 && !data->have_vid)
0767         return 0;
0768 
0769     if (index == 1 || index == 2) {
0770         if (data->ALARM_BITS[INTRUSION_ALARM_BASE + index - 1] < 0)
0771             return 0;
0772     }
0773 
0774     if (index == 3 || index == 4) {
0775         if (data->BEEP_BITS[INTRUSION_ALARM_BASE + index - 3] < 0)
0776             return 0;
0777     }
0778 
0779     return nct6775_attr_mode(data, attr);
0780 }
0781 
0782 /*
0783  * nct6775_other_is_visible uses the index into the following array
0784  * to determine if attributes should be created or not.
0785  * Any change in order or content must be matched.
0786  */
0787 static struct attribute *nct6775_attributes_other[] = {
0788     &dev_attr_cpu0_vid.attr,                /* 0 */
0789     &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,    /* 1 */
0790     &sensor_dev_attr_intrusion1_alarm.dev_attr.attr,    /* 2 */
0791     &sensor_dev_attr_intrusion0_beep.dev_attr.attr,     /* 3 */
0792     &sensor_dev_attr_intrusion1_beep.dev_attr.attr,     /* 4 */
0793     &sensor_dev_attr_beep_enable.dev_attr.attr,     /* 5 */
0794 
0795     NULL
0796 };
0797 
0798 static const struct attribute_group nct6775_group_other = {
0799     .attrs = nct6775_attributes_other,
0800     .is_visible = nct6775_other_is_visible,
0801 };
0802 
0803 static int nct6775_platform_probe_init(struct nct6775_data *data)
0804 {
0805     int err;
0806     u8 cr2a;
0807     struct nct6775_sio_data *sio_data = data->driver_data;
0808 
0809     err = sio_data->sio_enter(sio_data);
0810     if (err)
0811         return err;
0812 
0813     cr2a = sio_data->sio_inb(sio_data, 0x2a);
0814     switch (data->kind) {
0815     case nct6775:
0816         data->have_vid = (cr2a & 0x40);
0817         break;
0818     case nct6776:
0819         data->have_vid = (cr2a & 0x60) == 0x40;
0820         break;
0821     case nct6106:
0822     case nct6116:
0823     case nct6779:
0824     case nct6791:
0825     case nct6792:
0826     case nct6793:
0827     case nct6795:
0828     case nct6796:
0829     case nct6797:
0830     case nct6798:
0831         break;
0832     }
0833 
0834     /*
0835      * Read VID value
0836      * We can get the VID input values directly at logical device D 0xe3.
0837      */
0838     if (data->have_vid) {
0839         sio_data->sio_select(sio_data, NCT6775_LD_VID);
0840         data->vid = sio_data->sio_inb(sio_data, 0xe3);
0841         data->vrm = vid_which_vrm();
0842     }
0843 
0844     if (fan_debounce) {
0845         u8 tmp;
0846 
0847         sio_data->sio_select(sio_data, NCT6775_LD_HWM);
0848         tmp = sio_data->sio_inb(sio_data,
0849                     NCT6775_REG_CR_FAN_DEBOUNCE);
0850         switch (data->kind) {
0851         case nct6106:
0852         case nct6116:
0853             tmp |= 0xe0;
0854             break;
0855         case nct6775:
0856             tmp |= 0x1e;
0857             break;
0858         case nct6776:
0859         case nct6779:
0860             tmp |= 0x3e;
0861             break;
0862         case nct6791:
0863         case nct6792:
0864         case nct6793:
0865         case nct6795:
0866         case nct6796:
0867         case nct6797:
0868         case nct6798:
0869             tmp |= 0x7e;
0870             break;
0871         }
0872         sio_data->sio_outb(sio_data, NCT6775_REG_CR_FAN_DEBOUNCE,
0873                  tmp);
0874         pr_info("Enabled fan debounce for chip %s\n", data->name);
0875     }
0876 
0877     nct6775_check_fan_inputs(data, sio_data);
0878 
0879     sio_data->sio_exit(sio_data);
0880 
0881     return nct6775_add_attr_group(data, &nct6775_group_other);
0882 }
0883 
0884 static const struct regmap_config nct6775_regmap_config = {
0885     .reg_bits = 16,
0886     .val_bits = 16,
0887     .reg_read = nct6775_reg_read,
0888     .reg_write = nct6775_reg_write,
0889 };
0890 
0891 static const struct regmap_config nct6775_wmi_regmap_config = {
0892     .reg_bits = 16,
0893     .val_bits = 16,
0894     .reg_read = nct6775_wmi_reg_read,
0895     .reg_write = nct6775_wmi_reg_write,
0896 };
0897 
0898 static int nct6775_platform_probe(struct platform_device *pdev)
0899 {
0900     struct device *dev = &pdev->dev;
0901     struct nct6775_sio_data *sio_data = dev_get_platdata(dev);
0902     struct nct6775_data *data;
0903     struct resource *res;
0904     const struct regmap_config *regmapcfg;
0905 
0906     if (sio_data->access == access_direct) {
0907         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
0908         if (!devm_request_region(&pdev->dev, res->start, IOREGION_LENGTH, DRVNAME))
0909             return -EBUSY;
0910     }
0911 
0912     data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
0913     if (!data)
0914         return -ENOMEM;
0915 
0916     data->kind = sio_data->kind;
0917     data->sioreg = sio_data->sioreg;
0918 
0919     if (sio_data->access == access_direct) {
0920         data->addr = res->start;
0921         regmapcfg = &nct6775_regmap_config;
0922     } else {
0923         regmapcfg = &nct6775_wmi_regmap_config;
0924     }
0925 
0926     platform_set_drvdata(pdev, data);
0927 
0928     data->driver_data = sio_data;
0929     data->driver_init = nct6775_platform_probe_init;
0930 
0931     return nct6775_probe(&pdev->dev, data, regmapcfg);
0932 }
0933 
0934 static struct platform_driver nct6775_driver = {
0935     .driver = {
0936         .name   = DRVNAME,
0937         .pm = &nct6775_dev_pm_ops,
0938     },
0939     .probe      = nct6775_platform_probe,
0940 };
0941 
0942 /* nct6775_find() looks for a '627 in the Super-I/O config space */
0943 static int __init nct6775_find(int sioaddr, struct nct6775_sio_data *sio_data)
0944 {
0945     u16 val;
0946     int err;
0947     int addr;
0948 
0949     sio_data->access = access_direct;
0950     sio_data->sioreg = sioaddr;
0951 
0952     err = sio_data->sio_enter(sio_data);
0953     if (err)
0954         return err;
0955 
0956     val = (sio_data->sio_inb(sio_data, SIO_REG_DEVID) << 8) |
0957         sio_data->sio_inb(sio_data, SIO_REG_DEVID + 1);
0958     if (force_id && val != 0xffff)
0959         val = force_id;
0960 
0961     switch (val & SIO_ID_MASK) {
0962     case SIO_NCT6106_ID:
0963         sio_data->kind = nct6106;
0964         break;
0965     case SIO_NCT6116_ID:
0966         sio_data->kind = nct6116;
0967         break;
0968     case SIO_NCT6775_ID:
0969         sio_data->kind = nct6775;
0970         break;
0971     case SIO_NCT6776_ID:
0972         sio_data->kind = nct6776;
0973         break;
0974     case SIO_NCT6779_ID:
0975         sio_data->kind = nct6779;
0976         break;
0977     case SIO_NCT6791_ID:
0978         sio_data->kind = nct6791;
0979         break;
0980     case SIO_NCT6792_ID:
0981         sio_data->kind = nct6792;
0982         break;
0983     case SIO_NCT6793_ID:
0984         sio_data->kind = nct6793;
0985         break;
0986     case SIO_NCT6795_ID:
0987         sio_data->kind = nct6795;
0988         break;
0989     case SIO_NCT6796_ID:
0990         sio_data->kind = nct6796;
0991         break;
0992     case SIO_NCT6797_ID:
0993         sio_data->kind = nct6797;
0994         break;
0995     case SIO_NCT6798_ID:
0996         sio_data->kind = nct6798;
0997         break;
0998     default:
0999         if (val != 0xffff)
1000             pr_debug("unsupported chip ID: 0x%04x\n", val);
1001         sio_data->sio_exit(sio_data);
1002         return -ENODEV;
1003     }
1004 
1005     /* We have a known chip, find the HWM I/O address */
1006     sio_data->sio_select(sio_data, NCT6775_LD_HWM);
1007     val = (sio_data->sio_inb(sio_data, SIO_REG_ADDR) << 8)
1008         | sio_data->sio_inb(sio_data, SIO_REG_ADDR + 1);
1009     addr = val & IOREGION_ALIGNMENT;
1010     if (addr == 0) {
1011         pr_err("Refusing to enable a Super-I/O device with a base I/O port 0\n");
1012         sio_data->sio_exit(sio_data);
1013         return -ENODEV;
1014     }
1015 
1016     /* Activate logical device if needed */
1017     val = sio_data->sio_inb(sio_data, SIO_REG_ENABLE);
1018     if (!(val & 0x01)) {
1019         pr_warn("Forcibly enabling Super-I/O. Sensor is probably unusable.\n");
1020         sio_data->sio_outb(sio_data, SIO_REG_ENABLE, val | 0x01);
1021     }
1022 
1023     if (sio_data->kind == nct6791 || sio_data->kind == nct6792 ||
1024         sio_data->kind == nct6793 || sio_data->kind == nct6795 ||
1025         sio_data->kind == nct6796 || sio_data->kind == nct6797 ||
1026         sio_data->kind == nct6798)
1027         nct6791_enable_io_mapping(sio_data);
1028 
1029     sio_data->sio_exit(sio_data);
1030     pr_info("Found %s or compatible chip at %#x:%#x\n",
1031         nct6775_sio_names[sio_data->kind], sioaddr, addr);
1032 
1033     return addr;
1034 }
1035 
1036 /*
1037  * when Super-I/O functions move to a separate file, the Super-I/O
1038  * bus will manage the lifetime of the device and this module will only keep
1039  * track of the nct6775 driver. But since we use platform_device_alloc(), we
1040  * must keep track of the device
1041  */
1042 static struct platform_device *pdev[2];
1043 
1044 static const char * const asus_wmi_boards[] = {
1045     "PRO H410T",
1046     "ProArt X570-CREATOR WIFI",
1047     "Pro B550M-C",
1048     "Pro WS X570-ACE",
1049     "PRIME B360-PLUS",
1050     "PRIME B460-PLUS",
1051     "PRIME B550-PLUS",
1052     "PRIME B550M-A",
1053     "PRIME B550M-A (WI-FI)",
1054     "PRIME H410M-R",
1055     "PRIME X570-P",
1056     "PRIME X570-PRO",
1057     "ROG CROSSHAIR VIII DARK HERO",
1058     "ROG CROSSHAIR VIII FORMULA",
1059     "ROG CROSSHAIR VIII HERO",
1060     "ROG CROSSHAIR VIII IMPACT",
1061     "ROG STRIX B550-A GAMING",
1062     "ROG STRIX B550-E GAMING",
1063     "ROG STRIX B550-F GAMING",
1064     "ROG STRIX B550-F GAMING (WI-FI)",
1065     "ROG STRIX B550-F GAMING WIFI II",
1066     "ROG STRIX B550-I GAMING",
1067     "ROG STRIX B550-XE GAMING (WI-FI)",
1068     "ROG STRIX X570-E GAMING",
1069     "ROG STRIX X570-E GAMING WIFI II",
1070     "ROG STRIX X570-F GAMING",
1071     "ROG STRIX X570-I GAMING",
1072     "ROG STRIX Z390-E GAMING",
1073     "ROG STRIX Z390-F GAMING",
1074     "ROG STRIX Z390-H GAMING",
1075     "ROG STRIX Z390-I GAMING",
1076     "ROG STRIX Z490-A GAMING",
1077     "ROG STRIX Z490-E GAMING",
1078     "ROG STRIX Z490-F GAMING",
1079     "ROG STRIX Z490-G GAMING",
1080     "ROG STRIX Z490-G GAMING (WI-FI)",
1081     "ROG STRIX Z490-H GAMING",
1082     "ROG STRIX Z490-I GAMING",
1083     "TUF GAMING B550M-PLUS",
1084     "TUF GAMING B550M-PLUS (WI-FI)",
1085     "TUF GAMING B550-PLUS",
1086     "TUF GAMING B550-PLUS WIFI II",
1087     "TUF GAMING B550-PRO",
1088     "TUF GAMING X570-PLUS",
1089     "TUF GAMING X570-PLUS (WI-FI)",
1090     "TUF GAMING X570-PRO (WI-FI)",
1091     "TUF GAMING Z490-PLUS",
1092     "TUF GAMING Z490-PLUS (WI-FI)",
1093 };
1094 
1095 static int __init sensors_nct6775_platform_init(void)
1096 {
1097     int i, err;
1098     bool found = false;
1099     int address;
1100     struct resource res;
1101     struct nct6775_sio_data sio_data;
1102     int sioaddr[2] = { 0x2e, 0x4e };
1103     enum sensor_access access = access_direct;
1104     const char *board_vendor, *board_name;
1105     u8 tmp;
1106 
1107     err = platform_driver_register(&nct6775_driver);
1108     if (err)
1109         return err;
1110 
1111     board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1112     board_name = dmi_get_system_info(DMI_BOARD_NAME);
1113 
1114     if (board_name && board_vendor &&
1115         !strcmp(board_vendor, "ASUSTeK COMPUTER INC.")) {
1116         err = match_string(asus_wmi_boards, ARRAY_SIZE(asus_wmi_boards),
1117                    board_name);
1118         if (err >= 0) {
1119             /* if reading chip id via WMI succeeds, use WMI */
1120             if (!nct6775_asuswmi_read(0, NCT6775_PORT_CHIPID, &tmp) && tmp) {
1121                 pr_info("Using Asus WMI to access %#x chip.\n", tmp);
1122                 access = access_asuswmi;
1123             } else {
1124                 pr_err("Can't read ChipID by Asus WMI.\n");
1125             }
1126         }
1127     }
1128 
1129     /*
1130      * initialize sio_data->kind and sio_data->sioreg.
1131      *
1132      * when Super-I/O functions move to a separate file, the Super-I/O
1133      * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1134      * nct6775 hardware monitor, and call probe()
1135      */
1136     for (i = 0; i < ARRAY_SIZE(pdev); i++) {
1137         sio_data.sio_outb = superio_outb;
1138         sio_data.sio_inb = superio_inb;
1139         sio_data.sio_select = superio_select;
1140         sio_data.sio_enter = superio_enter;
1141         sio_data.sio_exit = superio_exit;
1142 
1143         address = nct6775_find(sioaddr[i], &sio_data);
1144         if (address <= 0)
1145             continue;
1146 
1147         found = true;
1148 
1149         sio_data.access = access;
1150 
1151         if (access == access_asuswmi) {
1152             sio_data.sio_outb = superio_wmi_outb;
1153             sio_data.sio_inb = superio_wmi_inb;
1154             sio_data.sio_select = superio_wmi_select;
1155             sio_data.sio_enter = superio_wmi_enter;
1156             sio_data.sio_exit = superio_wmi_exit;
1157         }
1158 
1159         pdev[i] = platform_device_alloc(DRVNAME, address);
1160         if (!pdev[i]) {
1161             err = -ENOMEM;
1162             goto exit_device_unregister;
1163         }
1164 
1165         err = platform_device_add_data(pdev[i], &sio_data,
1166                            sizeof(struct nct6775_sio_data));
1167         if (err)
1168             goto exit_device_put;
1169 
1170         if (sio_data.access == access_direct) {
1171             memset(&res, 0, sizeof(res));
1172             res.name = DRVNAME;
1173             res.start = address + IOREGION_OFFSET;
1174             res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1175             res.flags = IORESOURCE_IO;
1176 
1177             err = acpi_check_resource_conflict(&res);
1178             if (err) {
1179                 platform_device_put(pdev[i]);
1180                 pdev[i] = NULL;
1181                 continue;
1182             }
1183 
1184             err = platform_device_add_resources(pdev[i], &res, 1);
1185             if (err)
1186                 goto exit_device_put;
1187         }
1188 
1189         /* platform_device_add calls probe() */
1190         err = platform_device_add(pdev[i]);
1191         if (err)
1192             goto exit_device_put;
1193     }
1194     if (!found) {
1195         err = -ENODEV;
1196         goto exit_unregister;
1197     }
1198 
1199     return 0;
1200 
1201 exit_device_put:
1202     platform_device_put(pdev[i]);
1203 exit_device_unregister:
1204     while (i--)
1205         platform_device_unregister(pdev[i]);
1206 exit_unregister:
1207     platform_driver_unregister(&nct6775_driver);
1208     return err;
1209 }
1210 
1211 static void __exit sensors_nct6775_platform_exit(void)
1212 {
1213     int i;
1214 
1215     for (i = 0; i < ARRAY_SIZE(pdev); i++)
1216         platform_device_unregister(pdev[i]);
1217     platform_driver_unregister(&nct6775_driver);
1218 }
1219 
1220 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
1221 MODULE_DESCRIPTION("Platform driver for NCT6775F and compatible chips");
1222 MODULE_LICENSE("GPL");
1223 MODULE_IMPORT_NS(HWMON_NCT6775);
1224 
1225 module_init(sensors_nct6775_platform_init);
1226 module_exit(sensors_nct6775_platform_exit);
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