0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
0014
0015
0016
0017
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030
0031
0032
0033
0034
0035
0036
0037
0038
0039
0040
0041 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0042
0043 #include <linux/module.h>
0044 #include <linux/init.h>
0045 #include <linux/slab.h>
0046 #include <linux/jiffies.h>
0047 #include <linux/hwmon.h>
0048 #include <linux/hwmon-sysfs.h>
0049 #include <linux/err.h>
0050 #include <linux/mutex.h>
0051 #include <linux/bitops.h>
0052 #include <linux/nospec.h>
0053 #include <linux/regmap.h>
0054 #include "lm75.h"
0055 #include "nct6775.h"
0056
0057 #undef DEFAULT_SYMBOL_NAMESPACE
0058 #define DEFAULT_SYMBOL_NAMESPACE HWMON_NCT6775
0059
0060 #define USE_ALTERNATE
0061
0062
0063 static const char * const nct6775_device_names[] = {
0064 "nct6106",
0065 "nct6116",
0066 "nct6775",
0067 "nct6776",
0068 "nct6779",
0069 "nct6791",
0070 "nct6792",
0071 "nct6793",
0072 "nct6795",
0073 "nct6796",
0074 "nct6797",
0075 "nct6798",
0076 };
0077
0078
0079
0080
0081
0082 static const u16 NCT6775_REG_IN_MAX[] = {
0083 0x2b, 0x2d, 0x2f, 0x31, 0x33, 0x35, 0x37, 0x554, 0x556, 0x558, 0x55a,
0084 0x55c, 0x55e, 0x560, 0x562 };
0085 static const u16 NCT6775_REG_IN_MIN[] = {
0086 0x2c, 0x2e, 0x30, 0x32, 0x34, 0x36, 0x38, 0x555, 0x557, 0x559, 0x55b,
0087 0x55d, 0x55f, 0x561, 0x563 };
0088 static const u16 NCT6775_REG_IN[] = {
0089 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x550, 0x551, 0x552
0090 };
0091
0092 #define NCT6775_REG_VBAT 0x5D
0093 #define NCT6775_REG_DIODE 0x5E
0094 #define NCT6775_DIODE_MASK 0x02
0095
0096 static const u16 NCT6775_REG_ALARM[NUM_REG_ALARM] = { 0x459, 0x45A, 0x45B };
0097
0098
0099
0100 static const s8 NCT6775_ALARM_BITS[] = {
0101 0, 1, 2, 3, 8, 21, 20, 16,
0102 17, -1, -1, -1, -1, -1, -1,
0103 -1,
0104 6, 7, 11, -1, -1,
0105 -1, -1, -1,
0106 4, 5, 13, -1, -1, -1,
0107 12, -1 };
0108
0109 static const u16 NCT6775_REG_BEEP[NUM_REG_BEEP] = { 0x56, 0x57, 0x453, 0x4e };
0110
0111
0112
0113
0114
0115 static const s8 NCT6775_BEEP_BITS[] = {
0116 0, 1, 2, 3, 8, 9, 10, 16,
0117 17, -1, -1, -1, -1, -1, -1,
0118 21,
0119 6, 7, 11, 28, -1,
0120 -1, -1, -1,
0121 4, 5, 13, -1, -1, -1,
0122 12, -1 };
0123
0124
0125 static const u8 NCT6775_REG_PWM_MODE[] = { 0x04, 0x04, 0x12 };
0126 static const u8 NCT6775_PWM_MODE_MASK[] = { 0x01, 0x02, 0x01 };
0127
0128
0129
0130 static const u16 NCT6775_REG_TARGET[] = {
0131 0x101, 0x201, 0x301, 0x801, 0x901, 0xa01, 0xb01 };
0132 static const u16 NCT6775_REG_FAN_MODE[] = {
0133 0x102, 0x202, 0x302, 0x802, 0x902, 0xa02, 0xb02 };
0134 static const u16 NCT6775_REG_FAN_STEP_DOWN_TIME[] = {
0135 0x103, 0x203, 0x303, 0x803, 0x903, 0xa03, 0xb03 };
0136 static const u16 NCT6775_REG_FAN_STEP_UP_TIME[] = {
0137 0x104, 0x204, 0x304, 0x804, 0x904, 0xa04, 0xb04 };
0138 static const u16 NCT6775_REG_FAN_STOP_OUTPUT[] = {
0139 0x105, 0x205, 0x305, 0x805, 0x905, 0xa05, 0xb05 };
0140 static const u16 NCT6775_REG_FAN_START_OUTPUT[] = {
0141 0x106, 0x206, 0x306, 0x806, 0x906, 0xa06, 0xb06 };
0142 static const u16 NCT6775_REG_FAN_MAX_OUTPUT[] = { 0x10a, 0x20a, 0x30a };
0143 static const u16 NCT6775_REG_FAN_STEP_OUTPUT[] = { 0x10b, 0x20b, 0x30b };
0144
0145 static const u16 NCT6775_REG_FAN_STOP_TIME[] = {
0146 0x107, 0x207, 0x307, 0x807, 0x907, 0xa07, 0xb07 };
0147 static const u16 NCT6775_REG_PWM[] = {
0148 0x109, 0x209, 0x309, 0x809, 0x909, 0xa09, 0xb09 };
0149 static const u16 NCT6775_REG_PWM_READ[] = {
0150 0x01, 0x03, 0x11, 0x13, 0x15, 0xa09, 0xb09 };
0151
0152 static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
0153 static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
0154 static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
0155 0x641, 0x642, 0x643, 0x644 };
0156 static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
0157
0158 static const u16 NCT6775_REG_TEMP[] = {
0159 0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
0160
0161 static const u16 NCT6775_REG_TEMP_MON[] = { 0x73, 0x75, 0x77 };
0162
0163 static const u16 NCT6775_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0164 0, 0x152, 0x252, 0x628, 0x629, 0x62A };
0165 static const u16 NCT6775_REG_TEMP_HYST[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0166 0x3a, 0x153, 0x253, 0x673, 0x678, 0x67D };
0167 static const u16 NCT6775_REG_TEMP_OVER[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0168 0x39, 0x155, 0x255, 0x672, 0x677, 0x67C };
0169
0170 static const u16 NCT6775_REG_TEMP_SOURCE[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0171 0x621, 0x622, 0x623, 0x624, 0x625, 0x626 };
0172
0173 static const u16 NCT6775_REG_TEMP_SEL[] = {
0174 0x100, 0x200, 0x300, 0x800, 0x900, 0xa00, 0xb00 };
0175
0176 static const u16 NCT6775_REG_WEIGHT_TEMP_SEL[] = {
0177 0x139, 0x239, 0x339, 0x839, 0x939, 0xa39 };
0178 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP[] = {
0179 0x13a, 0x23a, 0x33a, 0x83a, 0x93a, 0xa3a };
0180 static const u16 NCT6775_REG_WEIGHT_TEMP_STEP_TOL[] = {
0181 0x13b, 0x23b, 0x33b, 0x83b, 0x93b, 0xa3b };
0182 static const u16 NCT6775_REG_WEIGHT_DUTY_STEP[] = {
0183 0x13c, 0x23c, 0x33c, 0x83c, 0x93c, 0xa3c };
0184 static const u16 NCT6775_REG_WEIGHT_TEMP_BASE[] = {
0185 0x13d, 0x23d, 0x33d, 0x83d, 0x93d, 0xa3d };
0186
0187 static const u16 NCT6775_REG_TEMP_OFFSET[] = { 0x454, 0x455, 0x456 };
0188
0189 static const u16 NCT6775_REG_AUTO_TEMP[] = {
0190 0x121, 0x221, 0x321, 0x821, 0x921, 0xa21, 0xb21 };
0191 static const u16 NCT6775_REG_AUTO_PWM[] = {
0192 0x127, 0x227, 0x327, 0x827, 0x927, 0xa27, 0xb27 };
0193
0194 #define NCT6775_AUTO_TEMP(data, nr, p) ((data)->REG_AUTO_TEMP[nr] + (p))
0195 #define NCT6775_AUTO_PWM(data, nr, p) ((data)->REG_AUTO_PWM[nr] + (p))
0196
0197 static const u16 NCT6775_REG_CRITICAL_ENAB[] = { 0x134, 0x234, 0x334 };
0198
0199 static const u16 NCT6775_REG_CRITICAL_TEMP[] = {
0200 0x135, 0x235, 0x335, 0x835, 0x935, 0xa35, 0xb35 };
0201 static const u16 NCT6775_REG_CRITICAL_TEMP_TOLERANCE[] = {
0202 0x138, 0x238, 0x338, 0x838, 0x938, 0xa38, 0xb38 };
0203
0204 static const char *const nct6775_temp_label[] = {
0205 "",
0206 "SYSTIN",
0207 "CPUTIN",
0208 "AUXTIN",
0209 "AMD SB-TSI",
0210 "PECI Agent 0",
0211 "PECI Agent 1",
0212 "PECI Agent 2",
0213 "PECI Agent 3",
0214 "PECI Agent 4",
0215 "PECI Agent 5",
0216 "PECI Agent 6",
0217 "PECI Agent 7",
0218 "PCH_CHIP_CPU_MAX_TEMP",
0219 "PCH_CHIP_TEMP",
0220 "PCH_CPU_TEMP",
0221 "PCH_MCH_TEMP",
0222 "PCH_DIM0_TEMP",
0223 "PCH_DIM1_TEMP",
0224 "PCH_DIM2_TEMP",
0225 "PCH_DIM3_TEMP"
0226 };
0227
0228 #define NCT6775_TEMP_MASK 0x001ffffe
0229 #define NCT6775_VIRT_TEMP_MASK 0x00000000
0230
0231 static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
0232 [13] = 0x661,
0233 [14] = 0x662,
0234 [15] = 0x664,
0235 };
0236
0237 static const u16 NCT6775_REG_TEMP_CRIT[32] = {
0238 [4] = 0xa00,
0239 [5] = 0xa01,
0240 [6] = 0xa02,
0241 [7] = 0xa03,
0242 [8] = 0xa04,
0243 [9] = 0xa05,
0244 [10] = 0xa06,
0245 [11] = 0xa07
0246 };
0247
0248 static const u16 NCT6775_REG_TSI_TEMP[] = { 0x669 };
0249
0250
0251
0252
0253 #define NCT6776_REG_FAN_STEP_UP_TIME NCT6775_REG_FAN_STEP_DOWN_TIME
0254 #define NCT6776_REG_FAN_STEP_DOWN_TIME NCT6775_REG_FAN_STEP_UP_TIME
0255
0256 static const s8 NCT6776_ALARM_BITS[] = {
0257 0, 1, 2, 3, 8, 21, 20, 16,
0258 17, -1, -1, -1, -1, -1, -1,
0259 -1,
0260 6, 7, 11, 10, 23,
0261 -1, -1, -1,
0262 4, 5, 13, -1, -1, -1,
0263 12, 9 };
0264
0265 static const u16 NCT6776_REG_BEEP[NUM_REG_BEEP] = { 0xb2, 0xb3, 0xb4, 0xb5 };
0266
0267 static const s8 NCT6776_BEEP_BITS[] = {
0268 0, 1, 2, 3, 4, 5, 6, 7,
0269 8, -1, -1, -1, -1, -1, -1,
0270 24,
0271 25, 26, 27, 28, 29,
0272 -1, -1, -1,
0273 16, 17, 18, 19, 20, 21,
0274 30, 31 };
0275
0276 static const u16 NCT6776_REG_TOLERANCE_H[] = {
0277 0x10c, 0x20c, 0x30c, 0x80c, 0x90c, 0xa0c, 0xb0c };
0278
0279 static const u8 NCT6776_REG_PWM_MODE[] = { 0x04, 0, 0, 0, 0, 0 };
0280 static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 };
0281
0282 static const u16 NCT6776_REG_FAN_MIN[] = {
0283 0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
0284 static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
0285 0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
0286
0287 static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
0288 0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
0289
0290 static const u16 NCT6776_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6775_REG_TEMP)] = {
0291 0x18, 0x152, 0x252, 0x628, 0x629, 0x62A };
0292
0293 static const char *const nct6776_temp_label[] = {
0294 "",
0295 "SYSTIN",
0296 "CPUTIN",
0297 "AUXTIN",
0298 "SMBUSMASTER 0",
0299 "SMBUSMASTER 1",
0300 "SMBUSMASTER 2",
0301 "SMBUSMASTER 3",
0302 "SMBUSMASTER 4",
0303 "SMBUSMASTER 5",
0304 "SMBUSMASTER 6",
0305 "SMBUSMASTER 7",
0306 "PECI Agent 0",
0307 "PECI Agent 1",
0308 "PCH_CHIP_CPU_MAX_TEMP",
0309 "PCH_CHIP_TEMP",
0310 "PCH_CPU_TEMP",
0311 "PCH_MCH_TEMP",
0312 "PCH_DIM0_TEMP",
0313 "PCH_DIM1_TEMP",
0314 "PCH_DIM2_TEMP",
0315 "PCH_DIM3_TEMP",
0316 "BYTE_TEMP"
0317 };
0318
0319 #define NCT6776_TEMP_MASK 0x007ffffe
0320 #define NCT6776_VIRT_TEMP_MASK 0x00000000
0321
0322 static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
0323 [14] = 0x401,
0324 [15] = 0x402,
0325 [16] = 0x404,
0326 };
0327
0328 static const u16 NCT6776_REG_TEMP_CRIT[32] = {
0329 [11] = 0x709,
0330 [12] = 0x70a,
0331 };
0332
0333 static const u16 NCT6776_REG_TSI_TEMP[] = {
0334 0x409, 0x40b, 0x40d, 0x40f, 0x411, 0x413, 0x415, 0x417 };
0335
0336
0337
0338 static const u16 NCT6779_REG_IN[] = {
0339 0x480, 0x481, 0x482, 0x483, 0x484, 0x485, 0x486, 0x487,
0340 0x488, 0x489, 0x48a, 0x48b, 0x48c, 0x48d, 0x48e };
0341
0342 static const u16 NCT6779_REG_ALARM[NUM_REG_ALARM] = {
0343 0x459, 0x45A, 0x45B, 0x568 };
0344
0345 static const s8 NCT6779_ALARM_BITS[] = {
0346 0, 1, 2, 3, 8, 21, 20, 16,
0347 17, 24, 25, 26, 27, 28, 29,
0348 -1,
0349 6, 7, 11, 10, 23,
0350 -1, -1, -1,
0351 4, 5, 13, -1, -1, -1,
0352 12, 9 };
0353
0354 static const s8 NCT6779_BEEP_BITS[] = {
0355 0, 1, 2, 3, 4, 5, 6, 7,
0356 8, 9, 10, 11, 12, 13, 14,
0357 24,
0358 25, 26, 27, 28, 29,
0359 -1, -1, -1,
0360 16, 17, -1, -1, -1, -1,
0361 30, 31 };
0362
0363 static const u16 NCT6779_REG_FAN[] = {
0364 0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
0365 static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
0366 0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0x64f };
0367
0368 static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
0369 0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
0370 #define NCT6779_CRITICAL_PWM_ENABLE_MASK 0x01
0371 static const u16 NCT6779_REG_CRITICAL_PWM[] = {
0372 0x137, 0x237, 0x337, 0x837, 0x937, 0xa37, 0xb37 };
0373
0374 static const u16 NCT6779_REG_TEMP[] = { 0x27, 0x150 };
0375 static const u16 NCT6779_REG_TEMP_MON[] = { 0x73, 0x75, 0x77, 0x79, 0x7b };
0376 static const u16 NCT6779_REG_TEMP_CONFIG[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0377 0x18, 0x152 };
0378 static const u16 NCT6779_REG_TEMP_HYST[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0379 0x3a, 0x153 };
0380 static const u16 NCT6779_REG_TEMP_OVER[ARRAY_SIZE(NCT6779_REG_TEMP)] = {
0381 0x39, 0x155 };
0382
0383 static const u16 NCT6779_REG_TEMP_OFFSET[] = {
0384 0x454, 0x455, 0x456, 0x44a, 0x44b, 0x44c };
0385
0386 static const char *const nct6779_temp_label[] = {
0387 "",
0388 "SYSTIN",
0389 "CPUTIN",
0390 "AUXTIN0",
0391 "AUXTIN1",
0392 "AUXTIN2",
0393 "AUXTIN3",
0394 "",
0395 "SMBUSMASTER 0",
0396 "SMBUSMASTER 1",
0397 "SMBUSMASTER 2",
0398 "SMBUSMASTER 3",
0399 "SMBUSMASTER 4",
0400 "SMBUSMASTER 5",
0401 "SMBUSMASTER 6",
0402 "SMBUSMASTER 7",
0403 "PECI Agent 0",
0404 "PECI Agent 1",
0405 "PCH_CHIP_CPU_MAX_TEMP",
0406 "PCH_CHIP_TEMP",
0407 "PCH_CPU_TEMP",
0408 "PCH_MCH_TEMP",
0409 "PCH_DIM0_TEMP",
0410 "PCH_DIM1_TEMP",
0411 "PCH_DIM2_TEMP",
0412 "PCH_DIM3_TEMP",
0413 "BYTE_TEMP",
0414 "",
0415 "",
0416 "",
0417 "",
0418 "Virtual_TEMP"
0419 };
0420
0421 #define NCT6779_TEMP_MASK 0x07ffff7e
0422 #define NCT6779_VIRT_TEMP_MASK 0x00000000
0423 #define NCT6791_TEMP_MASK 0x87ffff7e
0424 #define NCT6791_VIRT_TEMP_MASK 0x80000000
0425
0426 static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
0427 = { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
0428 0, 0, 0, 0, 0, 0, 0, 0,
0429 0, 0x400, 0x401, 0x402, 0x404, 0x405, 0x406, 0x407,
0430 0x408, 0 };
0431
0432 static const u16 NCT6779_REG_TEMP_CRIT[32] = {
0433 [15] = 0x709,
0434 [16] = 0x70a,
0435 };
0436
0437
0438
0439 static const u16 NCT6791_REG_WEIGHT_TEMP_SEL[NUM_FAN] = { 0, 0x239 };
0440 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP[NUM_FAN] = { 0, 0x23a };
0441 static const u16 NCT6791_REG_WEIGHT_TEMP_STEP_TOL[NUM_FAN] = { 0, 0x23b };
0442 static const u16 NCT6791_REG_WEIGHT_DUTY_STEP[NUM_FAN] = { 0, 0x23c };
0443 static const u16 NCT6791_REG_WEIGHT_TEMP_BASE[NUM_FAN] = { 0, 0x23d };
0444 static const u16 NCT6791_REG_WEIGHT_DUTY_BASE[NUM_FAN] = { 0, 0x23e };
0445
0446 static const u16 NCT6791_REG_ALARM[NUM_REG_ALARM] = {
0447 0x459, 0x45A, 0x45B, 0x568, 0x45D };
0448
0449 static const s8 NCT6791_ALARM_BITS[] = {
0450 0, 1, 2, 3, 8, 21, 20, 16,
0451 17, 24, 25, 26, 27, 28, 29,
0452 -1,
0453 6, 7, 11, 10, 23, 33,
0454 -1, -1,
0455 4, 5, 13, -1, -1, -1,
0456 12, 9 };
0457
0458
0459
0460 static const u16 NCT6792_REG_TEMP_MON[] = {
0461 0x73, 0x75, 0x77, 0x79, 0x7b, 0x7d };
0462 static const u16 NCT6792_REG_BEEP[NUM_REG_BEEP] = {
0463 0xb2, 0xb3, 0xb4, 0xb5, 0xbf };
0464
0465 static const char *const nct6792_temp_label[] = {
0466 "",
0467 "SYSTIN",
0468 "CPUTIN",
0469 "AUXTIN0",
0470 "AUXTIN1",
0471 "AUXTIN2",
0472 "AUXTIN3",
0473 "",
0474 "SMBUSMASTER 0",
0475 "SMBUSMASTER 1",
0476 "SMBUSMASTER 2",
0477 "SMBUSMASTER 3",
0478 "SMBUSMASTER 4",
0479 "SMBUSMASTER 5",
0480 "SMBUSMASTER 6",
0481 "SMBUSMASTER 7",
0482 "PECI Agent 0",
0483 "PECI Agent 1",
0484 "PCH_CHIP_CPU_MAX_TEMP",
0485 "PCH_CHIP_TEMP",
0486 "PCH_CPU_TEMP",
0487 "PCH_MCH_TEMP",
0488 "PCH_DIM0_TEMP",
0489 "PCH_DIM1_TEMP",
0490 "PCH_DIM2_TEMP",
0491 "PCH_DIM3_TEMP",
0492 "BYTE_TEMP",
0493 "PECI Agent 0 Calibration",
0494 "PECI Agent 1 Calibration",
0495 "",
0496 "",
0497 "Virtual_TEMP"
0498 };
0499
0500 #define NCT6792_TEMP_MASK 0x9fffff7e
0501 #define NCT6792_VIRT_TEMP_MASK 0x80000000
0502
0503 static const char *const nct6793_temp_label[] = {
0504 "",
0505 "SYSTIN",
0506 "CPUTIN",
0507 "AUXTIN0",
0508 "AUXTIN1",
0509 "AUXTIN2",
0510 "AUXTIN3",
0511 "",
0512 "SMBUSMASTER 0",
0513 "SMBUSMASTER 1",
0514 "",
0515 "",
0516 "",
0517 "",
0518 "",
0519 "",
0520 "PECI Agent 0",
0521 "PECI Agent 1",
0522 "PCH_CHIP_CPU_MAX_TEMP",
0523 "PCH_CHIP_TEMP",
0524 "PCH_CPU_TEMP",
0525 "PCH_MCH_TEMP",
0526 "Agent0 Dimm0 ",
0527 "Agent0 Dimm1",
0528 "Agent1 Dimm0",
0529 "Agent1 Dimm1",
0530 "BYTE_TEMP0",
0531 "BYTE_TEMP1",
0532 "PECI Agent 0 Calibration",
0533 "PECI Agent 1 Calibration",
0534 "",
0535 "Virtual_TEMP"
0536 };
0537
0538 #define NCT6793_TEMP_MASK 0xbfff037e
0539 #define NCT6793_VIRT_TEMP_MASK 0x80000000
0540
0541 static const char *const nct6795_temp_label[] = {
0542 "",
0543 "SYSTIN",
0544 "CPUTIN",
0545 "AUXTIN0",
0546 "AUXTIN1",
0547 "AUXTIN2",
0548 "AUXTIN3",
0549 "",
0550 "SMBUSMASTER 0",
0551 "SMBUSMASTER 1",
0552 "SMBUSMASTER 2",
0553 "SMBUSMASTER 3",
0554 "SMBUSMASTER 4",
0555 "SMBUSMASTER 5",
0556 "SMBUSMASTER 6",
0557 "SMBUSMASTER 7",
0558 "PECI Agent 0",
0559 "PECI Agent 1",
0560 "PCH_CHIP_CPU_MAX_TEMP",
0561 "PCH_CHIP_TEMP",
0562 "PCH_CPU_TEMP",
0563 "PCH_MCH_TEMP",
0564 "Agent0 Dimm0",
0565 "Agent0 Dimm1",
0566 "Agent1 Dimm0",
0567 "Agent1 Dimm1",
0568 "BYTE_TEMP0",
0569 "BYTE_TEMP1",
0570 "PECI Agent 0 Calibration",
0571 "PECI Agent 1 Calibration",
0572 "",
0573 "Virtual_TEMP"
0574 };
0575
0576 #define NCT6795_TEMP_MASK 0xbfffff7e
0577 #define NCT6795_VIRT_TEMP_MASK 0x80000000
0578
0579 static const char *const nct6796_temp_label[] = {
0580 "",
0581 "SYSTIN",
0582 "CPUTIN",
0583 "AUXTIN0",
0584 "AUXTIN1",
0585 "AUXTIN2",
0586 "AUXTIN3",
0587 "AUXTIN4",
0588 "SMBUSMASTER 0",
0589 "SMBUSMASTER 1",
0590 "Virtual_TEMP",
0591 "Virtual_TEMP",
0592 "",
0593 "",
0594 "",
0595 "",
0596 "PECI Agent 0",
0597 "PECI Agent 1",
0598 "PCH_CHIP_CPU_MAX_TEMP",
0599 "PCH_CHIP_TEMP",
0600 "PCH_CPU_TEMP",
0601 "PCH_MCH_TEMP",
0602 "Agent0 Dimm0",
0603 "Agent0 Dimm1",
0604 "Agent1 Dimm0",
0605 "Agent1 Dimm1",
0606 "BYTE_TEMP0",
0607 "BYTE_TEMP1",
0608 "PECI Agent 0 Calibration",
0609 "PECI Agent 1 Calibration",
0610 "",
0611 "Virtual_TEMP"
0612 };
0613
0614 #define NCT6796_TEMP_MASK 0xbfff0ffe
0615 #define NCT6796_VIRT_TEMP_MASK 0x80000c00
0616
0617 static const u16 NCT6796_REG_TSI_TEMP[] = { 0x409, 0x40b };
0618
0619 static const char *const nct6798_temp_label[] = {
0620 "",
0621 "SYSTIN",
0622 "CPUTIN",
0623 "AUXTIN0",
0624 "AUXTIN1",
0625 "AUXTIN2",
0626 "AUXTIN3",
0627 "AUXTIN4",
0628 "SMBUSMASTER 0",
0629 "SMBUSMASTER 1",
0630 "Virtual_TEMP",
0631 "Virtual_TEMP",
0632 "",
0633 "",
0634 "",
0635 "",
0636 "PECI Agent 0",
0637 "PECI Agent 1",
0638 "PCH_CHIP_CPU_MAX_TEMP",
0639 "PCH_CHIP_TEMP",
0640 "PCH_CPU_TEMP",
0641 "PCH_MCH_TEMP",
0642 "Agent0 Dimm0",
0643 "Agent0 Dimm1",
0644 "Agent1 Dimm0",
0645 "Agent1 Dimm1",
0646 "BYTE_TEMP0",
0647 "BYTE_TEMP1",
0648 "PECI Agent 0 Calibration",
0649 "PECI Agent 1 Calibration",
0650 "",
0651 "Virtual_TEMP"
0652 };
0653
0654 #define NCT6798_TEMP_MASK 0xbfff0ffe
0655 #define NCT6798_VIRT_TEMP_MASK 0x80000c00
0656
0657
0658
0659 #define NCT6106_REG_VBAT 0x318
0660 #define NCT6106_REG_DIODE 0x319
0661 #define NCT6106_DIODE_MASK 0x01
0662
0663 static const u16 NCT6106_REG_IN_MAX[] = {
0664 0x90, 0x92, 0x94, 0x96, 0x98, 0x9a, 0x9e, 0xa0, 0xa2 };
0665 static const u16 NCT6106_REG_IN_MIN[] = {
0666 0x91, 0x93, 0x95, 0x97, 0x99, 0x9b, 0x9f, 0xa1, 0xa3 };
0667 static const u16 NCT6106_REG_IN[] = {
0668 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x07, 0x08, 0x09 };
0669
0670 static const u16 NCT6106_REG_TEMP[] = { 0x10, 0x11, 0x12, 0x13, 0x14, 0x15 };
0671 static const u16 NCT6106_REG_TEMP_MON[] = { 0x18, 0x19, 0x1a };
0672 static const u16 NCT6106_REG_TEMP_HYST[] = {
0673 0xc3, 0xc7, 0xcb, 0xcf, 0xd3, 0xd7 };
0674 static const u16 NCT6106_REG_TEMP_OVER[] = {
0675 0xc2, 0xc6, 0xca, 0xce, 0xd2, 0xd6 };
0676 static const u16 NCT6106_REG_TEMP_CRIT_L[] = {
0677 0xc0, 0xc4, 0xc8, 0xcc, 0xd0, 0xd4 };
0678 static const u16 NCT6106_REG_TEMP_CRIT_H[] = {
0679 0xc1, 0xc5, 0xc9, 0xcf, 0xd1, 0xd5 };
0680 static const u16 NCT6106_REG_TEMP_OFFSET[] = { 0x311, 0x312, 0x313 };
0681 static const u16 NCT6106_REG_TEMP_CONFIG[] = {
0682 0xb7, 0xb8, 0xb9, 0xba, 0xbb, 0xbc };
0683
0684 static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
0685 static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
0686 static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
0687 static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
0688
0689 static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
0690 static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
0691 static const u16 NCT6106_REG_PWM_READ[] = { 0x4a, 0x4b, 0x4c };
0692 static const u16 NCT6106_REG_FAN_MODE[] = { 0x113, 0x123, 0x133 };
0693 static const u16 NCT6106_REG_TEMP_SOURCE[] = {
0694 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5 };
0695
0696 static const u16 NCT6106_REG_CRITICAL_TEMP[] = { 0x11a, 0x12a, 0x13a };
0697 static const u16 NCT6106_REG_CRITICAL_TEMP_TOLERANCE[] = {
0698 0x11b, 0x12b, 0x13b };
0699
0700 static const u16 NCT6106_REG_CRITICAL_PWM_ENABLE[] = { 0x11c, 0x12c, 0x13c };
0701 #define NCT6106_CRITICAL_PWM_ENABLE_MASK 0x10
0702 static const u16 NCT6106_REG_CRITICAL_PWM[] = { 0x11d, 0x12d, 0x13d };
0703
0704 static const u16 NCT6106_REG_FAN_STEP_UP_TIME[] = { 0x114, 0x124, 0x134 };
0705 static const u16 NCT6106_REG_FAN_STEP_DOWN_TIME[] = { 0x115, 0x125, 0x135 };
0706 static const u16 NCT6106_REG_FAN_STOP_OUTPUT[] = { 0x116, 0x126, 0x136 };
0707 static const u16 NCT6106_REG_FAN_START_OUTPUT[] = { 0x117, 0x127, 0x137 };
0708 static const u16 NCT6106_REG_FAN_STOP_TIME[] = { 0x118, 0x128, 0x138 };
0709 static const u16 NCT6106_REG_TOLERANCE_H[] = { 0x112, 0x122, 0x132 };
0710
0711 static const u16 NCT6106_REG_TARGET[] = { 0x111, 0x121, 0x131 };
0712
0713 static const u16 NCT6106_REG_WEIGHT_TEMP_SEL[] = { 0x168, 0x178, 0x188 };
0714 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP[] = { 0x169, 0x179, 0x189 };
0715 static const u16 NCT6106_REG_WEIGHT_TEMP_STEP_TOL[] = { 0x16a, 0x17a, 0x18a };
0716 static const u16 NCT6106_REG_WEIGHT_DUTY_STEP[] = { 0x16b, 0x17b, 0x18b };
0717 static const u16 NCT6106_REG_WEIGHT_TEMP_BASE[] = { 0x16c, 0x17c, 0x18c };
0718 static const u16 NCT6106_REG_WEIGHT_DUTY_BASE[] = { 0x16d, 0x17d, 0x18d };
0719
0720 static const u16 NCT6106_REG_AUTO_TEMP[] = { 0x160, 0x170, 0x180 };
0721 static const u16 NCT6106_REG_AUTO_PWM[] = { 0x164, 0x174, 0x184 };
0722
0723 static const u16 NCT6106_REG_ALARM[NUM_REG_ALARM] = {
0724 0x77, 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d };
0725
0726 static const s8 NCT6106_ALARM_BITS[] = {
0727 0, 1, 2, 3, 4, 5, 7, 8,
0728 9, -1, -1, -1, -1, -1, -1,
0729 -1,
0730 32, 33, 34, -1, -1,
0731 -1, -1, -1,
0732 16, 17, 18, 19, 20, 21,
0733 48, -1
0734 };
0735
0736 static const u16 NCT6106_REG_BEEP[NUM_REG_BEEP] = {
0737 0x3c0, 0x3c1, 0x3c2, 0x3c3, 0x3c4 };
0738
0739 static const s8 NCT6106_BEEP_BITS[] = {
0740 0, 1, 2, 3, 4, 5, 7, 8,
0741 9, 10, 11, 12, -1, -1, -1,
0742 32,
0743 24, 25, 26, 27, 28,
0744 -1, -1, -1,
0745 16, 17, 18, 19, 20, 21,
0746 34, -1
0747 };
0748
0749 static const u16 NCT6106_REG_TEMP_ALTERNATE[32] = {
0750 [14] = 0x51,
0751 [15] = 0x52,
0752 [16] = 0x54,
0753 };
0754
0755 static const u16 NCT6106_REG_TEMP_CRIT[32] = {
0756 [11] = 0x204,
0757 [12] = 0x205,
0758 };
0759
0760 static const u16 NCT6106_REG_TSI_TEMP[] = { 0x59, 0x5b, 0x5d, 0x5f, 0x61, 0x63, 0x65, 0x67 };
0761
0762
0763
0764 static const u16 NCT6116_REG_FAN[] = { 0x20, 0x22, 0x24, 0x26, 0x28 };
0765 static const u16 NCT6116_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4, 0xe6, 0xe8 };
0766 static const u16 NCT6116_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0xf6, 0xf5 };
0767 static const u16 NCT6116_FAN_PULSE_SHIFT[] = { 0, 2, 4, 6, 6 };
0768
0769 static const u16 NCT6116_REG_PWM[] = { 0x119, 0x129, 0x139, 0x199, 0x1a9 };
0770 static const u16 NCT6116_REG_FAN_MODE[] = { 0x113, 0x123, 0x133, 0x193, 0x1a3 };
0771 static const u16 NCT6116_REG_TEMP_SEL[] = { 0x110, 0x120, 0x130, 0x190, 0x1a0 };
0772 static const u16 NCT6116_REG_TEMP_SOURCE[] = {
0773 0xb0, 0xb1, 0xb2 };
0774
0775 static const u16 NCT6116_REG_CRITICAL_TEMP[] = {
0776 0x11a, 0x12a, 0x13a, 0x19a, 0x1aa };
0777 static const u16 NCT6116_REG_CRITICAL_TEMP_TOLERANCE[] = {
0778 0x11b, 0x12b, 0x13b, 0x19b, 0x1ab };
0779
0780 static const u16 NCT6116_REG_CRITICAL_PWM_ENABLE[] = {
0781 0x11c, 0x12c, 0x13c, 0x19c, 0x1ac };
0782 static const u16 NCT6116_REG_CRITICAL_PWM[] = {
0783 0x11d, 0x12d, 0x13d, 0x19d, 0x1ad };
0784
0785 static const u16 NCT6116_REG_FAN_STEP_UP_TIME[] = {
0786 0x114, 0x124, 0x134, 0x194, 0x1a4 };
0787 static const u16 NCT6116_REG_FAN_STEP_DOWN_TIME[] = {
0788 0x115, 0x125, 0x135, 0x195, 0x1a5 };
0789 static const u16 NCT6116_REG_FAN_STOP_OUTPUT[] = {
0790 0x116, 0x126, 0x136, 0x196, 0x1a6 };
0791 static const u16 NCT6116_REG_FAN_START_OUTPUT[] = {
0792 0x117, 0x127, 0x137, 0x197, 0x1a7 };
0793 static const u16 NCT6116_REG_FAN_STOP_TIME[] = {
0794 0x118, 0x128, 0x138, 0x198, 0x1a8 };
0795 static const u16 NCT6116_REG_TOLERANCE_H[] = {
0796 0x112, 0x122, 0x132, 0x192, 0x1a2 };
0797
0798 static const u16 NCT6116_REG_TARGET[] = {
0799 0x111, 0x121, 0x131, 0x191, 0x1a1 };
0800
0801 static const u16 NCT6116_REG_AUTO_TEMP[] = {
0802 0x160, 0x170, 0x180, 0x1d0, 0x1e0 };
0803 static const u16 NCT6116_REG_AUTO_PWM[] = {
0804 0x164, 0x174, 0x184, 0x1d4, 0x1e4 };
0805
0806 static const s8 NCT6116_ALARM_BITS[] = {
0807 0, 1, 2, 3, 4, 5, 7, 8,
0808 9, -1, -1, -1, -1, -1, -1,
0809 -1,
0810 32, 33, 34, 35, 36,
0811 -1, -1, -1,
0812 16, 17, 18, -1, -1, -1,
0813 48, -1
0814 };
0815
0816 static const s8 NCT6116_BEEP_BITS[] = {
0817 0, 1, 2, 3, 4, 5, 7, 8,
0818 9, 10, 11, 12, -1, -1, -1,
0819 32,
0820 24, 25, 26, 27, 28,
0821 -1, -1, -1,
0822 16, 17, 18, -1, -1, -1,
0823 34, -1
0824 };
0825
0826 static const u16 NCT6116_REG_TSI_TEMP[] = { 0x59, 0x5b };
0827
0828 static enum pwm_enable reg_to_pwm_enable(int pwm, int mode)
0829 {
0830 if (mode == 0 && pwm == 255)
0831 return off;
0832 return mode + 1;
0833 }
0834
0835 static int pwm_enable_to_reg(enum pwm_enable mode)
0836 {
0837 if (mode == off)
0838 return 0;
0839 return mode - 1;
0840 }
0841
0842
0843
0844
0845
0846
0847 static unsigned int step_time_from_reg(u8 reg, u8 mode)
0848 {
0849 return mode ? 400 * reg : 100 * reg;
0850 }
0851
0852 static u8 step_time_to_reg(unsigned int msec, u8 mode)
0853 {
0854 return clamp_val((mode ? (msec + 200) / 400 :
0855 (msec + 50) / 100), 1, 255);
0856 }
0857
0858 static unsigned int fan_from_reg8(u16 reg, unsigned int divreg)
0859 {
0860 if (reg == 0 || reg == 255)
0861 return 0;
0862 return 1350000U / (reg << divreg);
0863 }
0864
0865 static unsigned int fan_from_reg13(u16 reg, unsigned int divreg)
0866 {
0867 if ((reg & 0xff1f) == 0xff1f)
0868 return 0;
0869
0870 reg = (reg & 0x1f) | ((reg & 0xff00) >> 3);
0871
0872 if (reg == 0)
0873 return 0;
0874
0875 return 1350000U / reg;
0876 }
0877
0878 static unsigned int fan_from_reg16(u16 reg, unsigned int divreg)
0879 {
0880 if (reg == 0 || reg == 0xffff)
0881 return 0;
0882
0883
0884
0885
0886
0887 return 1350000U / (reg << divreg);
0888 }
0889
0890 static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
0891 {
0892 return reg;
0893 }
0894
0895 static u16 fan_to_reg(u32 fan, unsigned int divreg)
0896 {
0897 if (!fan)
0898 return 0;
0899
0900 return (1350000U / fan) >> divreg;
0901 }
0902
0903 static inline unsigned int
0904 div_from_reg(u8 reg)
0905 {
0906 return BIT(reg);
0907 }
0908
0909
0910
0911
0912
0913 static const u16 scale_in[15] = {
0914 800, 800, 1600, 1600, 800, 800, 800, 1600, 1600, 800, 800, 800, 800,
0915 800, 800
0916 };
0917
0918 static inline long in_from_reg(u8 reg, u8 nr)
0919 {
0920 return DIV_ROUND_CLOSEST(reg * scale_in[nr], 100);
0921 }
0922
0923 static inline u8 in_to_reg(u32 val, u8 nr)
0924 {
0925 return clamp_val(DIV_ROUND_CLOSEST(val * 100, scale_in[nr]), 0, 255);
0926 }
0927
0928
0929 static inline unsigned int tsi_temp_from_reg(unsigned int reg)
0930 {
0931 return (reg >> 5) * 125;
0932 }
0933
0934
0935
0936
0937
0938 struct sensor_device_template {
0939 struct device_attribute dev_attr;
0940 union {
0941 struct {
0942 u8 nr;
0943 u8 index;
0944 } s;
0945 int index;
0946 } u;
0947 bool s2;
0948 };
0949
0950 struct sensor_device_attr_u {
0951 union {
0952 struct sensor_device_attribute a1;
0953 struct sensor_device_attribute_2 a2;
0954 } u;
0955 char name[32];
0956 };
0957
0958 #define __TEMPLATE_ATTR(_template, _mode, _show, _store) { \
0959 .attr = {.name = _template, .mode = _mode }, \
0960 .show = _show, \
0961 .store = _store, \
0962 }
0963
0964 #define SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, _index) \
0965 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
0966 .u.index = _index, \
0967 .s2 = false }
0968
0969 #define SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
0970 _nr, _index) \
0971 { .dev_attr = __TEMPLATE_ATTR(_template, _mode, _show, _store), \
0972 .u.s.index = _index, \
0973 .u.s.nr = _nr, \
0974 .s2 = true }
0975
0976 #define SENSOR_TEMPLATE(_name, _template, _mode, _show, _store, _index) \
0977 static struct sensor_device_template sensor_dev_template_##_name \
0978 = SENSOR_DEVICE_TEMPLATE(_template, _mode, _show, _store, \
0979 _index)
0980
0981 #define SENSOR_TEMPLATE_2(_name, _template, _mode, _show, _store, \
0982 _nr, _index) \
0983 static struct sensor_device_template sensor_dev_template_##_name \
0984 = SENSOR_DEVICE_TEMPLATE_2(_template, _mode, _show, _store, \
0985 _nr, _index)
0986
0987 struct sensor_template_group {
0988 struct sensor_device_template **templates;
0989 umode_t (*is_visible)(struct kobject *, struct attribute *, int);
0990 int base;
0991 };
0992
0993 static int nct6775_add_template_attr_group(struct device *dev, struct nct6775_data *data,
0994 const struct sensor_template_group *tg, int repeat)
0995 {
0996 struct attribute_group *group;
0997 struct sensor_device_attr_u *su;
0998 struct sensor_device_attribute *a;
0999 struct sensor_device_attribute_2 *a2;
1000 struct attribute **attrs;
1001 struct sensor_device_template **t;
1002 int i, count;
1003
1004 if (repeat <= 0)
1005 return -EINVAL;
1006
1007 t = tg->templates;
1008 for (count = 0; *t; t++, count++)
1009 ;
1010
1011 if (count == 0)
1012 return -EINVAL;
1013
1014 group = devm_kzalloc(dev, sizeof(*group), GFP_KERNEL);
1015 if (group == NULL)
1016 return -ENOMEM;
1017
1018 attrs = devm_kcalloc(dev, repeat * count + 1, sizeof(*attrs),
1019 GFP_KERNEL);
1020 if (attrs == NULL)
1021 return -ENOMEM;
1022
1023 su = devm_kzalloc(dev, array3_size(repeat, count, sizeof(*su)),
1024 GFP_KERNEL);
1025 if (su == NULL)
1026 return -ENOMEM;
1027
1028 group->attrs = attrs;
1029 group->is_visible = tg->is_visible;
1030
1031 for (i = 0; i < repeat; i++) {
1032 t = tg->templates;
1033 while (*t != NULL) {
1034 snprintf(su->name, sizeof(su->name),
1035 (*t)->dev_attr.attr.name, tg->base + i);
1036 if ((*t)->s2) {
1037 a2 = &su->u.a2;
1038 sysfs_attr_init(&a2->dev_attr.attr);
1039 a2->dev_attr.attr.name = su->name;
1040 a2->nr = (*t)->u.s.nr + i;
1041 a2->index = (*t)->u.s.index;
1042 a2->dev_attr.attr.mode =
1043 (*t)->dev_attr.attr.mode;
1044 a2->dev_attr.show = (*t)->dev_attr.show;
1045 a2->dev_attr.store = (*t)->dev_attr.store;
1046 *attrs = &a2->dev_attr.attr;
1047 } else {
1048 a = &su->u.a1;
1049 sysfs_attr_init(&a->dev_attr.attr);
1050 a->dev_attr.attr.name = su->name;
1051 a->index = (*t)->u.index + i;
1052 a->dev_attr.attr.mode =
1053 (*t)->dev_attr.attr.mode;
1054 a->dev_attr.show = (*t)->dev_attr.show;
1055 a->dev_attr.store = (*t)->dev_attr.store;
1056 *attrs = &a->dev_attr.attr;
1057 }
1058 attrs++;
1059 su++;
1060 t++;
1061 }
1062 }
1063
1064 return nct6775_add_attr_group(data, group);
1065 }
1066
1067 bool nct6775_reg_is_word_sized(struct nct6775_data *data, u16 reg)
1068 {
1069 switch (data->kind) {
1070 case nct6106:
1071 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1072 (reg >= 0x59 && reg < 0x69 && (reg & 1)) ||
1073 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 ||
1074 reg == 0x111 || reg == 0x121 || reg == 0x131;
1075 case nct6116:
1076 return reg == 0x20 || reg == 0x22 || reg == 0x24 ||
1077 reg == 0x26 || reg == 0x28 || reg == 0x59 || reg == 0x5b ||
1078 reg == 0xe0 || reg == 0xe2 || reg == 0xe4 || reg == 0xe6 ||
1079 reg == 0xe8 || reg == 0x111 || reg == 0x121 || reg == 0x131 ||
1080 reg == 0x191 || reg == 0x1a1;
1081 case nct6775:
1082 return (((reg & 0xff00) == 0x100 ||
1083 (reg & 0xff00) == 0x200) &&
1084 ((reg & 0x00ff) == 0x50 ||
1085 (reg & 0x00ff) == 0x53 ||
1086 (reg & 0x00ff) == 0x55)) ||
1087 (reg & 0xfff0) == 0x630 ||
1088 reg == 0x640 || reg == 0x642 ||
1089 reg == 0x662 || reg == 0x669 ||
1090 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1091 reg == 0x73 || reg == 0x75 || reg == 0x77;
1092 case nct6776:
1093 return (((reg & 0xff00) == 0x100 ||
1094 (reg & 0xff00) == 0x200) &&
1095 ((reg & 0x00ff) == 0x50 ||
1096 (reg & 0x00ff) == 0x53 ||
1097 (reg & 0x00ff) == 0x55)) ||
1098 (reg & 0xfff0) == 0x630 ||
1099 reg == 0x402 ||
1100 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1101 reg == 0x640 || reg == 0x642 ||
1102 ((reg & 0xfff0) == 0x650 && (reg & 0x000f) >= 0x06) ||
1103 reg == 0x73 || reg == 0x75 || reg == 0x77;
1104 case nct6779:
1105 case nct6791:
1106 case nct6792:
1107 case nct6793:
1108 case nct6795:
1109 case nct6796:
1110 case nct6797:
1111 case nct6798:
1112 return reg == 0x150 || reg == 0x153 || reg == 0x155 ||
1113 (reg & 0xfff0) == 0x4c0 ||
1114 reg == 0x402 ||
1115 (reg >= 0x409 && reg < 0x419 && (reg & 1)) ||
1116 reg == 0x63a || reg == 0x63c || reg == 0x63e ||
1117 reg == 0x640 || reg == 0x642 || reg == 0x64a ||
1118 reg == 0x64c ||
1119 reg == 0x73 || reg == 0x75 || reg == 0x77 || reg == 0x79 ||
1120 reg == 0x7b || reg == 0x7d;
1121 }
1122 return false;
1123 }
1124 EXPORT_SYMBOL_GPL(nct6775_reg_is_word_sized);
1125
1126
1127 static int nct6775_read_temp(struct nct6775_data *data, u16 reg, u16 *val)
1128 {
1129 int err;
1130
1131 err = nct6775_read_value(data, reg, val);
1132 if (err)
1133 return err;
1134
1135 if (!nct6775_reg_is_word_sized(data, reg))
1136 *val <<= 8;
1137
1138 return 0;
1139 }
1140
1141
1142 static int nct6775_write_fan_div(struct nct6775_data *data, int nr)
1143 {
1144 u16 reg;
1145 int err;
1146 u16 fandiv_reg = nr < 2 ? NCT6775_REG_FANDIV1 : NCT6775_REG_FANDIV2;
1147 unsigned int oddshift = (nr & 1) * 4;
1148
1149 err = nct6775_read_value(data, fandiv_reg, ®);
1150 if (err)
1151 return err;
1152 reg &= 0x70 >> oddshift;
1153 reg |= data->fan_div[nr] & (0x7 << oddshift);
1154 return nct6775_write_value(data, fandiv_reg, reg);
1155 }
1156
1157 static int nct6775_write_fan_div_common(struct nct6775_data *data, int nr)
1158 {
1159 if (data->kind == nct6775)
1160 return nct6775_write_fan_div(data, nr);
1161 return 0;
1162 }
1163
1164 static int nct6775_update_fan_div(struct nct6775_data *data)
1165 {
1166 int err;
1167 u16 i;
1168
1169 err = nct6775_read_value(data, NCT6775_REG_FANDIV1, &i);
1170 if (err)
1171 return err;
1172 data->fan_div[0] = i & 0x7;
1173 data->fan_div[1] = (i & 0x70) >> 4;
1174 err = nct6775_read_value(data, NCT6775_REG_FANDIV2, &i);
1175 if (err)
1176 return err;
1177 data->fan_div[2] = i & 0x7;
1178 if (data->has_fan & BIT(3))
1179 data->fan_div[3] = (i & 0x70) >> 4;
1180
1181 return 0;
1182 }
1183
1184 static int nct6775_update_fan_div_common(struct nct6775_data *data)
1185 {
1186 if (data->kind == nct6775)
1187 return nct6775_update_fan_div(data);
1188 return 0;
1189 }
1190
1191 static int nct6775_init_fan_div(struct nct6775_data *data)
1192 {
1193 int i, err;
1194
1195 err = nct6775_update_fan_div_common(data);
1196 if (err)
1197 return err;
1198
1199
1200
1201
1202
1203
1204
1205 for (i = 0; i < ARRAY_SIZE(data->fan_div); i++) {
1206 if (!(data->has_fan & BIT(i)))
1207 continue;
1208 if (data->fan_div[i] == 0) {
1209 data->fan_div[i] = 7;
1210 err = nct6775_write_fan_div_common(data, i);
1211 if (err)
1212 return err;
1213 }
1214 }
1215
1216 return 0;
1217 }
1218
1219 static int nct6775_init_fan_common(struct device *dev,
1220 struct nct6775_data *data)
1221 {
1222 int i, err;
1223 u16 reg;
1224
1225 if (data->has_fan_div) {
1226 err = nct6775_init_fan_div(data);
1227 if (err)
1228 return err;
1229 }
1230
1231
1232
1233
1234
1235 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1236 if (data->has_fan_min & BIT(i)) {
1237 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1238 if (err)
1239 return err;
1240 if (!reg) {
1241 err = nct6775_write_value(data, data->REG_FAN_MIN[i],
1242 data->has_fan_div ? 0xff : 0xff1f);
1243 if (err)
1244 return err;
1245 }
1246 }
1247 }
1248
1249 return 0;
1250 }
1251
1252 static int nct6775_select_fan_div(struct device *dev,
1253 struct nct6775_data *data, int nr, u16 reg)
1254 {
1255 int err;
1256 u8 fan_div = data->fan_div[nr];
1257 u16 fan_min;
1258
1259 if (!data->has_fan_div)
1260 return 0;
1261
1262
1263
1264
1265
1266
1267 if (reg == 0x00 && fan_div < 0x07)
1268 fan_div++;
1269 else if (reg != 0x00 && reg < 0x30 && fan_div > 0)
1270 fan_div--;
1271
1272 if (fan_div != data->fan_div[nr]) {
1273 dev_dbg(dev, "Modifying fan%d clock divider from %u to %u\n",
1274 nr + 1, div_from_reg(data->fan_div[nr]),
1275 div_from_reg(fan_div));
1276
1277
1278 if (data->has_fan_min & BIT(nr)) {
1279 fan_min = data->fan_min[nr];
1280 if (fan_div > data->fan_div[nr]) {
1281 if (fan_min != 255 && fan_min > 1)
1282 fan_min >>= 1;
1283 } else {
1284 if (fan_min != 255) {
1285 fan_min <<= 1;
1286 if (fan_min > 254)
1287 fan_min = 254;
1288 }
1289 }
1290 if (fan_min != data->fan_min[nr]) {
1291 data->fan_min[nr] = fan_min;
1292 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], fan_min);
1293 if (err)
1294 return err;
1295 }
1296 }
1297 data->fan_div[nr] = fan_div;
1298 err = nct6775_write_fan_div_common(data, nr);
1299 if (err)
1300 return err;
1301 }
1302
1303 return 0;
1304 }
1305
1306 static int nct6775_update_pwm(struct device *dev)
1307 {
1308 struct nct6775_data *data = dev_get_drvdata(dev);
1309 int i, j, err;
1310 u16 fanmodecfg, reg;
1311 bool duty_is_dc;
1312
1313 for (i = 0; i < data->pwm_num; i++) {
1314 if (!(data->has_pwm & BIT(i)))
1315 continue;
1316
1317 err = nct6775_read_value(data, data->REG_PWM_MODE[i], ®);
1318 if (err)
1319 return err;
1320 duty_is_dc = data->REG_PWM_MODE[i] && (reg & data->PWM_MODE_MASK[i]);
1321 data->pwm_mode[i] = !duty_is_dc;
1322
1323 err = nct6775_read_value(data, data->REG_FAN_MODE[i], &fanmodecfg);
1324 if (err)
1325 return err;
1326 for (j = 0; j < ARRAY_SIZE(data->REG_PWM); j++) {
1327 if (data->REG_PWM[j] && data->REG_PWM[j][i]) {
1328 err = nct6775_read_value(data, data->REG_PWM[j][i], ®);
1329 if (err)
1330 return err;
1331 data->pwm[j][i] = reg;
1332 }
1333 }
1334
1335 data->pwm_enable[i] = reg_to_pwm_enable(data->pwm[0][i],
1336 (fanmodecfg >> 4) & 7);
1337
1338 if (!data->temp_tolerance[0][i] ||
1339 data->pwm_enable[i] != speed_cruise)
1340 data->temp_tolerance[0][i] = fanmodecfg & 0x0f;
1341 if (!data->target_speed_tolerance[i] ||
1342 data->pwm_enable[i] == speed_cruise) {
1343 u8 t = fanmodecfg & 0x0f;
1344
1345 if (data->REG_TOLERANCE_H) {
1346 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1347 if (err)
1348 return err;
1349 t |= (reg & 0x70) >> 1;
1350 }
1351 data->target_speed_tolerance[i] = t;
1352 }
1353
1354 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[i], ®);
1355 if (err)
1356 return err;
1357 data->temp_tolerance[1][i] = reg;
1358
1359 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], ®);
1360 if (err)
1361 return err;
1362 data->pwm_temp_sel[i] = reg & 0x1f;
1363
1364 if (reg & 0x80)
1365 data->pwm[2][i] = 0;
1366
1367 if (!data->REG_WEIGHT_TEMP_SEL[i])
1368 continue;
1369
1370 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i], ®);
1371 if (err)
1372 return err;
1373 data->pwm_weight_temp_sel[i] = reg & 0x1f;
1374
1375 if (!(reg & 0x80))
1376 data->pwm_weight_temp_sel[i] = 0;
1377
1378
1379 for (j = 0; j < ARRAY_SIZE(data->weight_temp); j++) {
1380 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP[j][i], ®);
1381 if (err)
1382 return err;
1383 data->weight_temp[j][i] = reg;
1384 }
1385 }
1386
1387 return 0;
1388 }
1389
1390 static int nct6775_update_pwm_limits(struct device *dev)
1391 {
1392 struct nct6775_data *data = dev_get_drvdata(dev);
1393 int i, j, err;
1394 u16 reg, reg_t;
1395
1396 for (i = 0; i < data->pwm_num; i++) {
1397 if (!(data->has_pwm & BIT(i)))
1398 continue;
1399
1400 for (j = 0; j < ARRAY_SIZE(data->fan_time); j++) {
1401 err = nct6775_read_value(data, data->REG_FAN_TIME[j][i], ®);
1402 if (err)
1403 return err;
1404 data->fan_time[j][i] = reg;
1405 }
1406
1407 err = nct6775_read_value(data, data->REG_TARGET[i], ®_t);
1408 if (err)
1409 return err;
1410
1411
1412 if (!data->target_temp[i] ||
1413 data->pwm_enable[i] == thermal_cruise)
1414 data->target_temp[i] = reg_t & data->target_temp_mask;
1415 if (!data->target_speed[i] ||
1416 data->pwm_enable[i] == speed_cruise) {
1417 if (data->REG_TOLERANCE_H) {
1418 err = nct6775_read_value(data, data->REG_TOLERANCE_H[i], ®);
1419 if (err)
1420 return err;
1421 reg_t |= (reg & 0x0f) << 8;
1422 }
1423 data->target_speed[i] = reg_t;
1424 }
1425
1426 for (j = 0; j < data->auto_pwm_num; j++) {
1427 err = nct6775_read_value(data, NCT6775_AUTO_PWM(data, i, j), ®);
1428 if (err)
1429 return err;
1430 data->auto_pwm[i][j] = reg;
1431
1432 err = nct6775_read_value(data, NCT6775_AUTO_TEMP(data, i, j), ®);
1433 if (err)
1434 return err;
1435 data->auto_temp[i][j] = reg;
1436 }
1437
1438
1439 err = nct6775_read_value(data, data->REG_CRITICAL_TEMP[i], ®);
1440 if (err)
1441 return err;
1442 data->auto_temp[i][data->auto_pwm_num] = reg;
1443
1444 switch (data->kind) {
1445 case nct6775:
1446 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[i], ®);
1447 if (err)
1448 return err;
1449 data->auto_pwm[i][data->auto_pwm_num] =
1450 (reg & 0x02) ? 0xff : 0x00;
1451 break;
1452 case nct6776:
1453 data->auto_pwm[i][data->auto_pwm_num] = 0xff;
1454 break;
1455 case nct6106:
1456 case nct6116:
1457 case nct6779:
1458 case nct6791:
1459 case nct6792:
1460 case nct6793:
1461 case nct6795:
1462 case nct6796:
1463 case nct6797:
1464 case nct6798:
1465 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[i], ®);
1466 if (err)
1467 return err;
1468 if (reg & data->CRITICAL_PWM_ENABLE_MASK) {
1469 err = nct6775_read_value(data, data->REG_CRITICAL_PWM[i], ®);
1470 if (err)
1471 return err;
1472 } else {
1473 reg = 0xff;
1474 }
1475 data->auto_pwm[i][data->auto_pwm_num] = reg;
1476 break;
1477 }
1478 }
1479
1480 return 0;
1481 }
1482
1483 struct nct6775_data *nct6775_update_device(struct device *dev)
1484 {
1485 struct nct6775_data *data = dev_get_drvdata(dev);
1486 int i, j, err = 0;
1487 u16 reg;
1488
1489 mutex_lock(&data->update_lock);
1490
1491 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1492 || !data->valid) {
1493
1494 err = nct6775_update_fan_div_common(data);
1495 if (err)
1496 goto out;
1497
1498
1499 for (i = 0; i < data->in_num; i++) {
1500 if (!(data->have_in & BIT(i)))
1501 continue;
1502
1503 err = nct6775_read_value(data, data->REG_VIN[i], ®);
1504 if (err)
1505 goto out;
1506 data->in[i][0] = reg;
1507
1508 err = nct6775_read_value(data, data->REG_IN_MINMAX[0][i], ®);
1509 if (err)
1510 goto out;
1511 data->in[i][1] = reg;
1512
1513 err = nct6775_read_value(data, data->REG_IN_MINMAX[1][i], ®);
1514 if (err)
1515 goto out;
1516 data->in[i][2] = reg;
1517 }
1518
1519
1520 for (i = 0; i < ARRAY_SIZE(data->rpm); i++) {
1521 if (!(data->has_fan & BIT(i)))
1522 continue;
1523
1524 err = nct6775_read_value(data, data->REG_FAN[i], ®);
1525 if (err)
1526 goto out;
1527 data->rpm[i] = data->fan_from_reg(reg,
1528 data->fan_div[i]);
1529
1530 if (data->has_fan_min & BIT(i)) {
1531 err = nct6775_read_value(data, data->REG_FAN_MIN[i], ®);
1532 if (err)
1533 goto out;
1534 data->fan_min[i] = reg;
1535 }
1536
1537 if (data->REG_FAN_PULSES[i]) {
1538 err = nct6775_read_value(data, data->REG_FAN_PULSES[i], ®);
1539 if (err)
1540 goto out;
1541 data->fan_pulses[i] = (reg >> data->FAN_PULSE_SHIFT[i]) & 0x03;
1542 }
1543
1544 err = nct6775_select_fan_div(dev, data, i, reg);
1545 if (err)
1546 goto out;
1547 }
1548
1549 err = nct6775_update_pwm(dev);
1550 if (err)
1551 goto out;
1552
1553 err = nct6775_update_pwm_limits(dev);
1554 if (err)
1555 goto out;
1556
1557
1558 for (i = 0; i < NUM_TEMP; i++) {
1559 if (!(data->have_temp & BIT(i)))
1560 continue;
1561 for (j = 0; j < ARRAY_SIZE(data->reg_temp); j++) {
1562 if (data->reg_temp[j][i]) {
1563 err = nct6775_read_temp(data, data->reg_temp[j][i], ®);
1564 if (err)
1565 goto out;
1566 data->temp[j][i] = reg;
1567 }
1568 }
1569 if (i >= NUM_TEMP_FIXED ||
1570 !(data->have_temp_fixed & BIT(i)))
1571 continue;
1572 err = nct6775_read_value(data, data->REG_TEMP_OFFSET[i], ®);
1573 if (err)
1574 goto out;
1575 data->temp_offset[i] = reg;
1576 }
1577
1578 for (i = 0; i < NUM_TSI_TEMP; i++) {
1579 if (!(data->have_tsi_temp & BIT(i)))
1580 continue;
1581 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], ®);
1582 if (err)
1583 goto out;
1584 data->tsi_temp[i] = reg;
1585 }
1586
1587 data->alarms = 0;
1588 for (i = 0; i < NUM_REG_ALARM; i++) {
1589 u16 alarm;
1590
1591 if (!data->REG_ALARM[i])
1592 continue;
1593 err = nct6775_read_value(data, data->REG_ALARM[i], &alarm);
1594 if (err)
1595 goto out;
1596 data->alarms |= ((u64)alarm) << (i << 3);
1597 }
1598
1599 data->beeps = 0;
1600 for (i = 0; i < NUM_REG_BEEP; i++) {
1601 u16 beep;
1602
1603 if (!data->REG_BEEP[i])
1604 continue;
1605 err = nct6775_read_value(data, data->REG_BEEP[i], &beep);
1606 if (err)
1607 goto out;
1608 data->beeps |= ((u64)beep) << (i << 3);
1609 }
1610
1611 data->last_updated = jiffies;
1612 data->valid = true;
1613 }
1614 out:
1615 mutex_unlock(&data->update_lock);
1616 return err ? ERR_PTR(err) : data;
1617 }
1618 EXPORT_SYMBOL_GPL(nct6775_update_device);
1619
1620
1621
1622
1623 static ssize_t
1624 show_in_reg(struct device *dev, struct device_attribute *attr, char *buf)
1625 {
1626 struct nct6775_data *data = nct6775_update_device(dev);
1627 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1628 int index = sattr->index;
1629 int nr = sattr->nr;
1630
1631 if (IS_ERR(data))
1632 return PTR_ERR(data);
1633
1634 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr][index], nr));
1635 }
1636
1637 static ssize_t
1638 store_in_reg(struct device *dev, struct device_attribute *attr, const char *buf,
1639 size_t count)
1640 {
1641 struct nct6775_data *data = dev_get_drvdata(dev);
1642 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1643 int index = sattr->index;
1644 int nr = sattr->nr;
1645 unsigned long val;
1646 int err;
1647
1648 err = kstrtoul(buf, 10, &val);
1649 if (err < 0)
1650 return err;
1651 mutex_lock(&data->update_lock);
1652 data->in[nr][index] = in_to_reg(val, nr);
1653 err = nct6775_write_value(data, data->REG_IN_MINMAX[index - 1][nr], data->in[nr][index]);
1654 mutex_unlock(&data->update_lock);
1655 return err ? : count;
1656 }
1657
1658 ssize_t
1659 nct6775_show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1660 {
1661 struct nct6775_data *data = nct6775_update_device(dev);
1662 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1663 int nr;
1664
1665 if (IS_ERR(data))
1666 return PTR_ERR(data);
1667
1668 nr = data->ALARM_BITS[sattr->index];
1669 return sprintf(buf, "%u\n",
1670 (unsigned int)((data->alarms >> nr) & 0x01));
1671 }
1672 EXPORT_SYMBOL_GPL(nct6775_show_alarm);
1673
1674 static int find_temp_source(struct nct6775_data *data, int index, int count)
1675 {
1676 int source = data->temp_src[index];
1677 int nr, err;
1678
1679 for (nr = 0; nr < count; nr++) {
1680 u16 src;
1681
1682 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[nr], &src);
1683 if (err)
1684 return err;
1685 if ((src & 0x1f) == source)
1686 return nr;
1687 }
1688 return -ENODEV;
1689 }
1690
1691 static ssize_t
1692 show_temp_alarm(struct device *dev, struct device_attribute *attr, char *buf)
1693 {
1694 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1695 struct nct6775_data *data = nct6775_update_device(dev);
1696 unsigned int alarm = 0;
1697 int nr;
1698
1699 if (IS_ERR(data))
1700 return PTR_ERR(data);
1701
1702
1703
1704
1705
1706 nr = find_temp_source(data, sattr->index, data->num_temp_alarms);
1707 if (nr >= 0) {
1708 int bit = data->ALARM_BITS[nr + TEMP_ALARM_BASE];
1709
1710 alarm = (data->alarms >> bit) & 0x01;
1711 }
1712 return sprintf(buf, "%u\n", alarm);
1713 }
1714
1715 ssize_t
1716 nct6775_show_beep(struct device *dev, struct device_attribute *attr, char *buf)
1717 {
1718 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1719 struct nct6775_data *data = nct6775_update_device(dev);
1720 int nr;
1721
1722 if (IS_ERR(data))
1723 return PTR_ERR(data);
1724
1725 nr = data->BEEP_BITS[sattr->index];
1726
1727 return sprintf(buf, "%u\n",
1728 (unsigned int)((data->beeps >> nr) & 0x01));
1729 }
1730 EXPORT_SYMBOL_GPL(nct6775_show_beep);
1731
1732 ssize_t
1733 nct6775_store_beep(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1734 {
1735 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1736 struct nct6775_data *data = dev_get_drvdata(dev);
1737 int nr = data->BEEP_BITS[sattr->index];
1738 int regindex = nr >> 3;
1739 unsigned long val;
1740 int err;
1741
1742 err = kstrtoul(buf, 10, &val);
1743 if (err < 0)
1744 return err;
1745 if (val > 1)
1746 return -EINVAL;
1747
1748 mutex_lock(&data->update_lock);
1749 if (val)
1750 data->beeps |= (1ULL << nr);
1751 else
1752 data->beeps &= ~(1ULL << nr);
1753 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1754 (data->beeps >> (regindex << 3)) & 0xff);
1755 mutex_unlock(&data->update_lock);
1756 return err ? : count;
1757 }
1758 EXPORT_SYMBOL_GPL(nct6775_store_beep);
1759
1760 static ssize_t
1761 show_temp_beep(struct device *dev, struct device_attribute *attr, char *buf)
1762 {
1763 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1764 struct nct6775_data *data = nct6775_update_device(dev);
1765 unsigned int beep = 0;
1766 int nr;
1767
1768 if (IS_ERR(data))
1769 return PTR_ERR(data);
1770
1771
1772
1773
1774
1775
1776 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1777 if (nr >= 0) {
1778 int bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1779
1780 beep = (data->beeps >> bit) & 0x01;
1781 }
1782 return sprintf(buf, "%u\n", beep);
1783 }
1784
1785 static ssize_t
1786 store_temp_beep(struct device *dev, struct device_attribute *attr,
1787 const char *buf, size_t count)
1788 {
1789 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1790 struct nct6775_data *data = dev_get_drvdata(dev);
1791 int nr, bit, regindex;
1792 unsigned long val;
1793 int err;
1794
1795 err = kstrtoul(buf, 10, &val);
1796 if (err < 0)
1797 return err;
1798 if (val > 1)
1799 return -EINVAL;
1800
1801 nr = find_temp_source(data, sattr->index, data->num_temp_beeps);
1802 if (nr < 0)
1803 return nr;
1804
1805 bit = data->BEEP_BITS[nr + TEMP_ALARM_BASE];
1806 regindex = bit >> 3;
1807
1808 mutex_lock(&data->update_lock);
1809 if (val)
1810 data->beeps |= (1ULL << bit);
1811 else
1812 data->beeps &= ~(1ULL << bit);
1813 err = nct6775_write_value(data, data->REG_BEEP[regindex],
1814 (data->beeps >> (regindex << 3)) & 0xff);
1815 mutex_unlock(&data->update_lock);
1816
1817 return err ? : count;
1818 }
1819
1820 static umode_t nct6775_in_is_visible(struct kobject *kobj,
1821 struct attribute *attr, int index)
1822 {
1823 struct device *dev = kobj_to_dev(kobj);
1824 struct nct6775_data *data = dev_get_drvdata(dev);
1825 int in = index / 5;
1826
1827 if (!(data->have_in & BIT(in)))
1828 return 0;
1829
1830 return nct6775_attr_mode(data, attr);
1831 }
1832
1833 SENSOR_TEMPLATE_2(in_input, "in%d_input", 0444, show_in_reg, NULL, 0, 0);
1834 SENSOR_TEMPLATE(in_alarm, "in%d_alarm", 0444, nct6775_show_alarm, NULL, 0);
1835 SENSOR_TEMPLATE(in_beep, "in%d_beep", 0644, nct6775_show_beep, nct6775_store_beep, 0);
1836 SENSOR_TEMPLATE_2(in_min, "in%d_min", 0644, show_in_reg, store_in_reg, 0, 1);
1837 SENSOR_TEMPLATE_2(in_max, "in%d_max", 0644, show_in_reg, store_in_reg, 0, 2);
1838
1839
1840
1841
1842
1843
1844 static struct sensor_device_template *nct6775_attributes_in_template[] = {
1845 &sensor_dev_template_in_input,
1846 &sensor_dev_template_in_alarm,
1847 &sensor_dev_template_in_beep,
1848 &sensor_dev_template_in_min,
1849 &sensor_dev_template_in_max,
1850 NULL
1851 };
1852
1853 static const struct sensor_template_group nct6775_in_template_group = {
1854 .templates = nct6775_attributes_in_template,
1855 .is_visible = nct6775_in_is_visible,
1856 };
1857
1858 static ssize_t
1859 show_fan(struct device *dev, struct device_attribute *attr, char *buf)
1860 {
1861 struct nct6775_data *data = nct6775_update_device(dev);
1862 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1863 int nr = sattr->index;
1864
1865 if (IS_ERR(data))
1866 return PTR_ERR(data);
1867
1868 return sprintf(buf, "%d\n", data->rpm[nr]);
1869 }
1870
1871 static ssize_t
1872 show_fan_min(struct device *dev, struct device_attribute *attr, char *buf)
1873 {
1874 struct nct6775_data *data = nct6775_update_device(dev);
1875 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1876 int nr = sattr->index;
1877
1878 if (IS_ERR(data))
1879 return PTR_ERR(data);
1880
1881 return sprintf(buf, "%d\n",
1882 data->fan_from_reg_min(data->fan_min[nr],
1883 data->fan_div[nr]));
1884 }
1885
1886 static ssize_t
1887 show_fan_div(struct device *dev, struct device_attribute *attr, char *buf)
1888 {
1889 struct nct6775_data *data = nct6775_update_device(dev);
1890 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1891 int nr = sattr->index;
1892
1893 if (IS_ERR(data))
1894 return PTR_ERR(data);
1895
1896 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
1897 }
1898
1899 static ssize_t
1900 store_fan_min(struct device *dev, struct device_attribute *attr,
1901 const char *buf, size_t count)
1902 {
1903 struct nct6775_data *data = dev_get_drvdata(dev);
1904 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
1905 int nr = sattr->index;
1906 unsigned long val;
1907 unsigned int reg;
1908 u8 new_div;
1909 int err;
1910
1911 err = kstrtoul(buf, 10, &val);
1912 if (err < 0)
1913 return err;
1914
1915 mutex_lock(&data->update_lock);
1916 if (!data->has_fan_div) {
1917
1918 if (!val) {
1919 val = 0xff1f;
1920 } else {
1921 if (val > 1350000U)
1922 val = 135000U;
1923 val = 1350000U / val;
1924 val = (val & 0x1f) | ((val << 3) & 0xff00);
1925 }
1926 data->fan_min[nr] = val;
1927 goto write_min;
1928 }
1929 if (!val) {
1930
1931 data->fan_min[nr] = 255;
1932 new_div = data->fan_div[nr];
1933 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
1934 goto write_div;
1935 }
1936 reg = 1350000U / val;
1937 if (reg >= 128 * 255) {
1938
1939
1940
1941
1942 data->fan_min[nr] = 254;
1943 new_div = 7;
1944 dev_warn(dev,
1945 "fan%u low limit %lu below minimum %u, set to minimum\n",
1946 nr + 1, val, data->fan_from_reg_min(254, 7));
1947 } else if (!reg) {
1948
1949
1950
1951
1952 data->fan_min[nr] = 1;
1953 new_div = 0;
1954 dev_warn(dev,
1955 "fan%u low limit %lu above maximum %u, set to maximum\n",
1956 nr + 1, val, data->fan_from_reg_min(1, 0));
1957 } else {
1958
1959
1960
1961
1962
1963 new_div = 0;
1964 while (reg > 192 && new_div < 7) {
1965 reg >>= 1;
1966 new_div++;
1967 }
1968 data->fan_min[nr] = reg;
1969 }
1970
1971 write_div:
1972
1973
1974
1975
1976 if (new_div != data->fan_div[nr]) {
1977 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
1978 nr + 1, div_from_reg(data->fan_div[nr]),
1979 div_from_reg(new_div));
1980 data->fan_div[nr] = new_div;
1981 err = nct6775_write_fan_div_common(data, nr);
1982 if (err)
1983 goto write_min;
1984
1985 data->last_updated = jiffies;
1986 }
1987
1988 write_min:
1989 err = nct6775_write_value(data, data->REG_FAN_MIN[nr], data->fan_min[nr]);
1990 mutex_unlock(&data->update_lock);
1991
1992 return err ? : count;
1993 }
1994
1995 static ssize_t
1996 show_fan_pulses(struct device *dev, struct device_attribute *attr, char *buf)
1997 {
1998 struct nct6775_data *data = nct6775_update_device(dev);
1999 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2000 int p;
2001
2002 if (IS_ERR(data))
2003 return PTR_ERR(data);
2004
2005 p = data->fan_pulses[sattr->index];
2006 return sprintf(buf, "%d\n", p ? : 4);
2007 }
2008
2009 static ssize_t
2010 store_fan_pulses(struct device *dev, struct device_attribute *attr,
2011 const char *buf, size_t count)
2012 {
2013 struct nct6775_data *data = dev_get_drvdata(dev);
2014 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2015 int nr = sattr->index;
2016 unsigned long val;
2017 int err;
2018 u16 reg;
2019
2020 err = kstrtoul(buf, 10, &val);
2021 if (err < 0)
2022 return err;
2023
2024 if (val > 4)
2025 return -EINVAL;
2026
2027 mutex_lock(&data->update_lock);
2028 data->fan_pulses[nr] = val & 3;
2029 err = nct6775_read_value(data, data->REG_FAN_PULSES[nr], ®);
2030 if (err)
2031 goto out;
2032 reg &= ~(0x03 << data->FAN_PULSE_SHIFT[nr]);
2033 reg |= (val & 3) << data->FAN_PULSE_SHIFT[nr];
2034 err = nct6775_write_value(data, data->REG_FAN_PULSES[nr], reg);
2035 out:
2036 mutex_unlock(&data->update_lock);
2037
2038 return err ? : count;
2039 }
2040
2041 static umode_t nct6775_fan_is_visible(struct kobject *kobj,
2042 struct attribute *attr, int index)
2043 {
2044 struct device *dev = kobj_to_dev(kobj);
2045 struct nct6775_data *data = dev_get_drvdata(dev);
2046 int fan = index / 6;
2047 int nr = index % 6;
2048
2049 if (!(data->has_fan & BIT(fan)))
2050 return 0;
2051
2052 if (nr == 1 && data->ALARM_BITS[FAN_ALARM_BASE + fan] == -1)
2053 return 0;
2054 if (nr == 2 && data->BEEP_BITS[FAN_ALARM_BASE + fan] == -1)
2055 return 0;
2056 if (nr == 3 && !data->REG_FAN_PULSES[fan])
2057 return 0;
2058 if (nr == 4 && !(data->has_fan_min & BIT(fan)))
2059 return 0;
2060 if (nr == 5 && data->kind != nct6775)
2061 return 0;
2062
2063 return nct6775_attr_mode(data, attr);
2064 }
2065
2066 SENSOR_TEMPLATE(fan_input, "fan%d_input", 0444, show_fan, NULL, 0);
2067 SENSOR_TEMPLATE(fan_alarm, "fan%d_alarm", 0444, nct6775_show_alarm, NULL, FAN_ALARM_BASE);
2068 SENSOR_TEMPLATE(fan_beep, "fan%d_beep", 0644, nct6775_show_beep,
2069 nct6775_store_beep, FAN_ALARM_BASE);
2070 SENSOR_TEMPLATE(fan_pulses, "fan%d_pulses", 0644, show_fan_pulses, store_fan_pulses, 0);
2071 SENSOR_TEMPLATE(fan_min, "fan%d_min", 0644, show_fan_min, store_fan_min, 0);
2072 SENSOR_TEMPLATE(fan_div, "fan%d_div", 0444, show_fan_div, NULL, 0);
2073
2074
2075
2076
2077
2078
2079 static struct sensor_device_template *nct6775_attributes_fan_template[] = {
2080 &sensor_dev_template_fan_input,
2081 &sensor_dev_template_fan_alarm,
2082 &sensor_dev_template_fan_beep,
2083 &sensor_dev_template_fan_pulses,
2084 &sensor_dev_template_fan_min,
2085 &sensor_dev_template_fan_div,
2086 NULL
2087 };
2088
2089 static const struct sensor_template_group nct6775_fan_template_group = {
2090 .templates = nct6775_attributes_fan_template,
2091 .is_visible = nct6775_fan_is_visible,
2092 .base = 1,
2093 };
2094
2095 static ssize_t
2096 show_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2097 {
2098 struct nct6775_data *data = nct6775_update_device(dev);
2099 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2100 int nr = sattr->index;
2101
2102 if (IS_ERR(data))
2103 return PTR_ERR(data);
2104
2105 return sprintf(buf, "%s\n", data->temp_label[data->temp_src[nr]]);
2106 }
2107
2108 static ssize_t
2109 show_temp(struct device *dev, struct device_attribute *attr, char *buf)
2110 {
2111 struct nct6775_data *data = nct6775_update_device(dev);
2112 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2113 int nr = sattr->nr;
2114 int index = sattr->index;
2115
2116 if (IS_ERR(data))
2117 return PTR_ERR(data);
2118
2119 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->temp[index][nr]));
2120 }
2121
2122 static ssize_t
2123 store_temp(struct device *dev, struct device_attribute *attr, const char *buf,
2124 size_t count)
2125 {
2126 struct nct6775_data *data = dev_get_drvdata(dev);
2127 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2128 int nr = sattr->nr;
2129 int index = sattr->index;
2130 int err;
2131 long val;
2132
2133 err = kstrtol(buf, 10, &val);
2134 if (err < 0)
2135 return err;
2136
2137 mutex_lock(&data->update_lock);
2138 data->temp[index][nr] = LM75_TEMP_TO_REG(val);
2139 err = nct6775_write_temp(data, data->reg_temp[index][nr], data->temp[index][nr]);
2140 mutex_unlock(&data->update_lock);
2141 return err ? : count;
2142 }
2143
2144 static ssize_t
2145 show_temp_offset(struct device *dev, struct device_attribute *attr, char *buf)
2146 {
2147 struct nct6775_data *data = nct6775_update_device(dev);
2148 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2149
2150 if (IS_ERR(data))
2151 return PTR_ERR(data);
2152
2153 return sprintf(buf, "%d\n", data->temp_offset[sattr->index] * 1000);
2154 }
2155
2156 static ssize_t
2157 store_temp_offset(struct device *dev, struct device_attribute *attr,
2158 const char *buf, size_t count)
2159 {
2160 struct nct6775_data *data = dev_get_drvdata(dev);
2161 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2162 int nr = sattr->index;
2163 long val;
2164 int err;
2165
2166 err = kstrtol(buf, 10, &val);
2167 if (err < 0)
2168 return err;
2169
2170 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127);
2171
2172 mutex_lock(&data->update_lock);
2173 data->temp_offset[nr] = val;
2174 err = nct6775_write_value(data, data->REG_TEMP_OFFSET[nr], val);
2175 mutex_unlock(&data->update_lock);
2176
2177 return err ? : count;
2178 }
2179
2180 static ssize_t
2181 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
2182 {
2183 struct nct6775_data *data = nct6775_update_device(dev);
2184 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2185 int nr = sattr->index;
2186
2187 if (IS_ERR(data))
2188 return PTR_ERR(data);
2189
2190 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
2191 }
2192
2193 static ssize_t
2194 store_temp_type(struct device *dev, struct device_attribute *attr,
2195 const char *buf, size_t count)
2196 {
2197 struct nct6775_data *data = nct6775_update_device(dev);
2198 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2199 int nr = sattr->index;
2200 unsigned long val;
2201 int err;
2202 u8 vbit, dbit;
2203 u16 vbat, diode;
2204
2205 if (IS_ERR(data))
2206 return PTR_ERR(data);
2207
2208 err = kstrtoul(buf, 10, &val);
2209 if (err < 0)
2210 return err;
2211
2212 if (val != 1 && val != 3 && val != 4)
2213 return -EINVAL;
2214
2215 mutex_lock(&data->update_lock);
2216
2217 data->temp_type[nr] = val;
2218 vbit = 0x02 << nr;
2219 dbit = data->DIODE_MASK << nr;
2220
2221 err = nct6775_read_value(data, data->REG_VBAT, &vbat);
2222 if (err)
2223 goto out;
2224 vbat &= ~vbit;
2225
2226 err = nct6775_read_value(data, data->REG_DIODE, &diode);
2227 if (err)
2228 goto out;
2229 diode &= ~dbit;
2230
2231 switch (val) {
2232 case 1:
2233 vbat |= vbit;
2234 diode |= dbit;
2235 break;
2236 case 3:
2237 vbat |= dbit;
2238 break;
2239 case 4:
2240 break;
2241 }
2242 err = nct6775_write_value(data, data->REG_VBAT, vbat);
2243 if (err)
2244 goto out;
2245 err = nct6775_write_value(data, data->REG_DIODE, diode);
2246 out:
2247 mutex_unlock(&data->update_lock);
2248 return err ? : count;
2249 }
2250
2251 static umode_t nct6775_temp_is_visible(struct kobject *kobj,
2252 struct attribute *attr, int index)
2253 {
2254 struct device *dev = kobj_to_dev(kobj);
2255 struct nct6775_data *data = dev_get_drvdata(dev);
2256 int temp = index / 10;
2257 int nr = index % 10;
2258
2259 if (!(data->have_temp & BIT(temp)))
2260 return 0;
2261
2262 if (nr == 1 && !data->temp_label)
2263 return 0;
2264
2265 if (nr == 2 && find_temp_source(data, temp, data->num_temp_alarms) < 0)
2266 return 0;
2267
2268 if (nr == 3 && find_temp_source(data, temp, data->num_temp_beeps) < 0)
2269 return 0;
2270
2271 if (nr == 4 && !data->reg_temp[1][temp])
2272 return 0;
2273
2274 if (nr == 5 && !data->reg_temp[2][temp])
2275 return 0;
2276
2277 if (nr == 6 && !data->reg_temp[3][temp])
2278 return 0;
2279
2280 if (nr == 7 && !data->reg_temp[4][temp])
2281 return 0;
2282
2283
2284 if (nr > 7 && !(data->have_temp_fixed & BIT(temp)))
2285 return 0;
2286
2287 return nct6775_attr_mode(data, attr);
2288 }
2289
2290 SENSOR_TEMPLATE_2(temp_input, "temp%d_input", 0444, show_temp, NULL, 0, 0);
2291 SENSOR_TEMPLATE(temp_label, "temp%d_label", 0444, show_temp_label, NULL, 0);
2292 SENSOR_TEMPLATE_2(temp_max, "temp%d_max", 0644, show_temp, store_temp, 0, 1);
2293 SENSOR_TEMPLATE_2(temp_max_hyst, "temp%d_max_hyst", 0644, show_temp, store_temp, 0, 2);
2294 SENSOR_TEMPLATE_2(temp_crit, "temp%d_crit", 0644, show_temp, store_temp, 0, 3);
2295 SENSOR_TEMPLATE_2(temp_lcrit, "temp%d_lcrit", 0644, show_temp, store_temp, 0, 4);
2296 SENSOR_TEMPLATE(temp_offset, "temp%d_offset", 0644, show_temp_offset, store_temp_offset, 0);
2297 SENSOR_TEMPLATE(temp_type, "temp%d_type", 0644, show_temp_type, store_temp_type, 0);
2298 SENSOR_TEMPLATE(temp_alarm, "temp%d_alarm", 0444, show_temp_alarm, NULL, 0);
2299 SENSOR_TEMPLATE(temp_beep, "temp%d_beep", 0644, show_temp_beep, store_temp_beep, 0);
2300
2301
2302
2303
2304
2305
2306 static struct sensor_device_template *nct6775_attributes_temp_template[] = {
2307 &sensor_dev_template_temp_input,
2308 &sensor_dev_template_temp_label,
2309 &sensor_dev_template_temp_alarm,
2310 &sensor_dev_template_temp_beep,
2311 &sensor_dev_template_temp_max,
2312 &sensor_dev_template_temp_max_hyst,
2313 &sensor_dev_template_temp_crit,
2314 &sensor_dev_template_temp_lcrit,
2315 &sensor_dev_template_temp_offset,
2316 &sensor_dev_template_temp_type,
2317 NULL
2318 };
2319
2320 static const struct sensor_template_group nct6775_temp_template_group = {
2321 .templates = nct6775_attributes_temp_template,
2322 .is_visible = nct6775_temp_is_visible,
2323 .base = 1,
2324 };
2325
2326 static ssize_t show_tsi_temp(struct device *dev, struct device_attribute *attr, char *buf)
2327 {
2328 struct nct6775_data *data = nct6775_update_device(dev);
2329 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2330
2331 if (IS_ERR(data))
2332 return PTR_ERR(data);
2333
2334 return sysfs_emit(buf, "%u\n", tsi_temp_from_reg(data->tsi_temp[sattr->index]));
2335 }
2336
2337 static ssize_t show_tsi_temp_label(struct device *dev, struct device_attribute *attr, char *buf)
2338 {
2339 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2340
2341 return sysfs_emit(buf, "TSI%d_TEMP\n", sattr->index);
2342 }
2343
2344 SENSOR_TEMPLATE(tsi_temp_input, "temp%d_input", 0444, show_tsi_temp, NULL, 0);
2345 SENSOR_TEMPLATE(tsi_temp_label, "temp%d_label", 0444, show_tsi_temp_label, NULL, 0);
2346
2347 static umode_t nct6775_tsi_temp_is_visible(struct kobject *kobj, struct attribute *attr,
2348 int index)
2349 {
2350 struct device *dev = kobj_to_dev(kobj);
2351 struct nct6775_data *data = dev_get_drvdata(dev);
2352 int temp = index / 2;
2353
2354 return (data->have_tsi_temp & BIT(temp)) ? nct6775_attr_mode(data, attr) : 0;
2355 }
2356
2357
2358
2359
2360
2361 static struct sensor_device_template *nct6775_tsi_temp_template[] = {
2362 &sensor_dev_template_tsi_temp_input,
2363 &sensor_dev_template_tsi_temp_label,
2364 NULL
2365 };
2366
2367 static ssize_t
2368 show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
2369 {
2370 struct nct6775_data *data = nct6775_update_device(dev);
2371 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2372
2373 if (IS_ERR(data))
2374 return PTR_ERR(data);
2375
2376 return sprintf(buf, "%d\n", data->pwm_mode[sattr->index]);
2377 }
2378
2379 static ssize_t
2380 store_pwm_mode(struct device *dev, struct device_attribute *attr,
2381 const char *buf, size_t count)
2382 {
2383 struct nct6775_data *data = dev_get_drvdata(dev);
2384 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2385 int nr = sattr->index;
2386 unsigned long val;
2387 int err;
2388 u16 reg;
2389
2390 err = kstrtoul(buf, 10, &val);
2391 if (err < 0)
2392 return err;
2393
2394 if (val > 1)
2395 return -EINVAL;
2396
2397
2398 if (data->REG_PWM_MODE[nr] == 0) {
2399 if (!val)
2400 return -EINVAL;
2401 return count;
2402 }
2403
2404 mutex_lock(&data->update_lock);
2405 data->pwm_mode[nr] = val;
2406 err = nct6775_read_value(data, data->REG_PWM_MODE[nr], ®);
2407 if (err)
2408 goto out;
2409 reg &= ~data->PWM_MODE_MASK[nr];
2410 if (!val)
2411 reg |= data->PWM_MODE_MASK[nr];
2412 err = nct6775_write_value(data, data->REG_PWM_MODE[nr], reg);
2413 out:
2414 mutex_unlock(&data->update_lock);
2415 return err ? : count;
2416 }
2417
2418 static ssize_t
2419 show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
2420 {
2421 struct nct6775_data *data = nct6775_update_device(dev);
2422 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2423 int nr = sattr->nr;
2424 int index = sattr->index;
2425 int err;
2426 u16 pwm;
2427
2428 if (IS_ERR(data))
2429 return PTR_ERR(data);
2430
2431
2432
2433
2434
2435 if (index == 0 && data->pwm_enable[nr] > manual) {
2436 err = nct6775_read_value(data, data->REG_PWM_READ[nr], &pwm);
2437 if (err)
2438 return err;
2439 } else {
2440 pwm = data->pwm[index][nr];
2441 }
2442
2443 return sprintf(buf, "%d\n", pwm);
2444 }
2445
2446 static ssize_t
2447 store_pwm(struct device *dev, struct device_attribute *attr, const char *buf,
2448 size_t count)
2449 {
2450 struct nct6775_data *data = dev_get_drvdata(dev);
2451 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2452 int nr = sattr->nr;
2453 int index = sattr->index;
2454 unsigned long val;
2455 int minval[7] = { 0, 1, 1, data->pwm[2][nr], 0, 0, 0 };
2456 int maxval[7]
2457 = { 255, 255, data->pwm[3][nr] ? : 255, 255, 255, 255, 255 };
2458 int err;
2459 u16 reg;
2460
2461 err = kstrtoul(buf, 10, &val);
2462 if (err < 0)
2463 return err;
2464 val = clamp_val(val, minval[index], maxval[index]);
2465
2466 mutex_lock(&data->update_lock);
2467 data->pwm[index][nr] = val;
2468 err = nct6775_write_value(data, data->REG_PWM[index][nr], val);
2469 if (err)
2470 goto out;
2471 if (index == 2) {
2472 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2473 if (err)
2474 goto out;
2475 reg &= 0x7f;
2476 if (val)
2477 reg |= 0x80;
2478 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2479 }
2480 out:
2481 mutex_unlock(&data->update_lock);
2482 return err ? : count;
2483 }
2484
2485
2486 static int check_trip_points(struct nct6775_data *data, int nr)
2487 {
2488 int i;
2489
2490 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2491 if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
2492 return -EINVAL;
2493 }
2494 for (i = 0; i < data->auto_pwm_num - 1; i++) {
2495 if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
2496 return -EINVAL;
2497 }
2498
2499 if (data->auto_pwm[nr][data->auto_pwm_num]) {
2500 if (data->auto_temp[nr][data->auto_pwm_num - 1] >
2501 data->auto_temp[nr][data->auto_pwm_num] ||
2502 data->auto_pwm[nr][data->auto_pwm_num - 1] >
2503 data->auto_pwm[nr][data->auto_pwm_num])
2504 return -EINVAL;
2505 }
2506 return 0;
2507 }
2508
2509 static int pwm_update_registers(struct nct6775_data *data, int nr)
2510 {
2511 u16 reg;
2512 int err;
2513
2514 switch (data->pwm_enable[nr]) {
2515 case off:
2516 case manual:
2517 break;
2518 case speed_cruise:
2519 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2520 if (err)
2521 return err;
2522 reg = (reg & ~data->tolerance_mask) |
2523 (data->target_speed_tolerance[nr] & data->tolerance_mask);
2524 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2525 if (err)
2526 return err;
2527 err = nct6775_write_value(data, data->REG_TARGET[nr],
2528 data->target_speed[nr] & 0xff);
2529 if (err)
2530 return err;
2531 if (data->REG_TOLERANCE_H) {
2532 reg = (data->target_speed[nr] >> 8) & 0x0f;
2533 reg |= (data->target_speed_tolerance[nr] & 0x38) << 1;
2534 err = nct6775_write_value(data, data->REG_TOLERANCE_H[nr], reg);
2535 if (err)
2536 return err;
2537 }
2538 break;
2539 case thermal_cruise:
2540 err = nct6775_write_value(data, data->REG_TARGET[nr], data->target_temp[nr]);
2541 if (err)
2542 return err;
2543 fallthrough;
2544 default:
2545 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2546 if (err)
2547 return err;
2548 reg = (reg & ~data->tolerance_mask) |
2549 data->temp_tolerance[0][nr];
2550 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2551 if (err)
2552 return err;
2553 break;
2554 }
2555
2556 return 0;
2557 }
2558
2559 static ssize_t
2560 show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
2561 {
2562 struct nct6775_data *data = nct6775_update_device(dev);
2563 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2564
2565 if (IS_ERR(data))
2566 return PTR_ERR(data);
2567
2568 return sprintf(buf, "%d\n", data->pwm_enable[sattr->index]);
2569 }
2570
2571 static ssize_t
2572 store_pwm_enable(struct device *dev, struct device_attribute *attr,
2573 const char *buf, size_t count)
2574 {
2575 struct nct6775_data *data = dev_get_drvdata(dev);
2576 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2577 int nr = sattr->index;
2578 unsigned long val;
2579 int err;
2580 u16 reg;
2581
2582 err = kstrtoul(buf, 10, &val);
2583 if (err < 0)
2584 return err;
2585
2586 if (val > sf4)
2587 return -EINVAL;
2588
2589 if (val == sf3 && data->kind != nct6775)
2590 return -EINVAL;
2591
2592 if (val == sf4 && check_trip_points(data, nr)) {
2593 dev_err(dev, "Inconsistent trip points, not switching to SmartFan IV mode\n");
2594 dev_err(dev, "Adjust trip points and try again\n");
2595 return -EINVAL;
2596 }
2597
2598 mutex_lock(&data->update_lock);
2599 data->pwm_enable[nr] = val;
2600 if (val == off) {
2601
2602
2603
2604 data->pwm[0][nr] = 255;
2605 err = nct6775_write_value(data, data->REG_PWM[0][nr], 255);
2606 if (err)
2607 goto out;
2608 }
2609 err = pwm_update_registers(data, nr);
2610 if (err)
2611 goto out;
2612 err = nct6775_read_value(data, data->REG_FAN_MODE[nr], ®);
2613 if (err)
2614 goto out;
2615 reg &= 0x0f;
2616 reg |= pwm_enable_to_reg(val) << 4;
2617 err = nct6775_write_value(data, data->REG_FAN_MODE[nr], reg);
2618 out:
2619 mutex_unlock(&data->update_lock);
2620 return err ? : count;
2621 }
2622
2623 static ssize_t
2624 show_pwm_temp_sel_common(struct nct6775_data *data, char *buf, int src)
2625 {
2626 int i, sel = 0;
2627
2628 for (i = 0; i < NUM_TEMP; i++) {
2629 if (!(data->have_temp & BIT(i)))
2630 continue;
2631 if (src == data->temp_src[i]) {
2632 sel = i + 1;
2633 break;
2634 }
2635 }
2636
2637 return sprintf(buf, "%d\n", sel);
2638 }
2639
2640 static ssize_t
2641 show_pwm_temp_sel(struct device *dev, struct device_attribute *attr, char *buf)
2642 {
2643 struct nct6775_data *data = nct6775_update_device(dev);
2644 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2645 int index = sattr->index;
2646
2647 if (IS_ERR(data))
2648 return PTR_ERR(data);
2649
2650 return show_pwm_temp_sel_common(data, buf, data->pwm_temp_sel[index]);
2651 }
2652
2653 static ssize_t
2654 store_pwm_temp_sel(struct device *dev, struct device_attribute *attr,
2655 const char *buf, size_t count)
2656 {
2657 struct nct6775_data *data = nct6775_update_device(dev);
2658 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2659 int nr = sattr->index;
2660 unsigned long val;
2661 int err, src;
2662 u16 reg;
2663
2664 if (IS_ERR(data))
2665 return PTR_ERR(data);
2666
2667 err = kstrtoul(buf, 10, &val);
2668 if (err < 0)
2669 return err;
2670 if (val == 0 || val > NUM_TEMP)
2671 return -EINVAL;
2672 if (!(data->have_temp & BIT(val - 1)) || !data->temp_src[val - 1])
2673 return -EINVAL;
2674
2675 mutex_lock(&data->update_lock);
2676 src = data->temp_src[val - 1];
2677 data->pwm_temp_sel[nr] = src;
2678 err = nct6775_read_value(data, data->REG_TEMP_SEL[nr], ®);
2679 if (err)
2680 goto out;
2681 reg &= 0xe0;
2682 reg |= src;
2683 err = nct6775_write_value(data, data->REG_TEMP_SEL[nr], reg);
2684 out:
2685 mutex_unlock(&data->update_lock);
2686
2687 return err ? : count;
2688 }
2689
2690 static ssize_t
2691 show_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2692 char *buf)
2693 {
2694 struct nct6775_data *data = nct6775_update_device(dev);
2695 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2696 int index = sattr->index;
2697
2698 if (IS_ERR(data))
2699 return PTR_ERR(data);
2700
2701 return show_pwm_temp_sel_common(data, buf,
2702 data->pwm_weight_temp_sel[index]);
2703 }
2704
2705 static ssize_t
2706 store_pwm_weight_temp_sel(struct device *dev, struct device_attribute *attr,
2707 const char *buf, size_t count)
2708 {
2709 struct nct6775_data *data = nct6775_update_device(dev);
2710 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2711 int nr = sattr->index;
2712 unsigned long val;
2713 int err, src;
2714 u16 reg;
2715
2716 if (IS_ERR(data))
2717 return PTR_ERR(data);
2718
2719 err = kstrtoul(buf, 10, &val);
2720 if (err < 0)
2721 return err;
2722 if (val > NUM_TEMP)
2723 return -EINVAL;
2724 val = array_index_nospec(val, NUM_TEMP + 1);
2725 if (val && (!(data->have_temp & BIT(val - 1)) ||
2726 !data->temp_src[val - 1]))
2727 return -EINVAL;
2728
2729 mutex_lock(&data->update_lock);
2730 if (val) {
2731 src = data->temp_src[val - 1];
2732 data->pwm_weight_temp_sel[nr] = src;
2733 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2734 if (err)
2735 goto out;
2736 reg &= 0xe0;
2737 reg |= (src | 0x80);
2738 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2739 } else {
2740 data->pwm_weight_temp_sel[nr] = 0;
2741 err = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[nr], ®);
2742 if (err)
2743 goto out;
2744 reg &= 0x7f;
2745 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP_SEL[nr], reg);
2746 }
2747 out:
2748 mutex_unlock(&data->update_lock);
2749
2750 return err ? : count;
2751 }
2752
2753 static ssize_t
2754 show_target_temp(struct device *dev, struct device_attribute *attr, char *buf)
2755 {
2756 struct nct6775_data *data = nct6775_update_device(dev);
2757 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2758
2759 if (IS_ERR(data))
2760 return PTR_ERR(data);
2761
2762 return sprintf(buf, "%d\n", data->target_temp[sattr->index] * 1000);
2763 }
2764
2765 static ssize_t
2766 store_target_temp(struct device *dev, struct device_attribute *attr,
2767 const char *buf, size_t count)
2768 {
2769 struct nct6775_data *data = dev_get_drvdata(dev);
2770 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2771 int nr = sattr->index;
2772 unsigned long val;
2773 int err;
2774
2775 err = kstrtoul(buf, 10, &val);
2776 if (err < 0)
2777 return err;
2778
2779 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0,
2780 data->target_temp_mask);
2781
2782 mutex_lock(&data->update_lock);
2783 data->target_temp[nr] = val;
2784 err = pwm_update_registers(data, nr);
2785 mutex_unlock(&data->update_lock);
2786 return err ? : count;
2787 }
2788
2789 static ssize_t
2790 show_target_speed(struct device *dev, struct device_attribute *attr, char *buf)
2791 {
2792 struct nct6775_data *data = nct6775_update_device(dev);
2793 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2794 int nr = sattr->index;
2795
2796 if (IS_ERR(data))
2797 return PTR_ERR(data);
2798
2799 return sprintf(buf, "%d\n",
2800 fan_from_reg16(data->target_speed[nr],
2801 data->fan_div[nr]));
2802 }
2803
2804 static ssize_t
2805 store_target_speed(struct device *dev, struct device_attribute *attr,
2806 const char *buf, size_t count)
2807 {
2808 struct nct6775_data *data = dev_get_drvdata(dev);
2809 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2810 int nr = sattr->index;
2811 unsigned long val;
2812 int err;
2813 u16 speed;
2814
2815 err = kstrtoul(buf, 10, &val);
2816 if (err < 0)
2817 return err;
2818
2819 val = clamp_val(val, 0, 1350000U);
2820 speed = fan_to_reg(val, data->fan_div[nr]);
2821
2822 mutex_lock(&data->update_lock);
2823 data->target_speed[nr] = speed;
2824 err = pwm_update_registers(data, nr);
2825 mutex_unlock(&data->update_lock);
2826 return err ? : count;
2827 }
2828
2829 static ssize_t
2830 show_temp_tolerance(struct device *dev, struct device_attribute *attr,
2831 char *buf)
2832 {
2833 struct nct6775_data *data = nct6775_update_device(dev);
2834 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2835 int nr = sattr->nr;
2836 int index = sattr->index;
2837
2838 if (IS_ERR(data))
2839 return PTR_ERR(data);
2840
2841 return sprintf(buf, "%d\n", data->temp_tolerance[index][nr] * 1000);
2842 }
2843
2844 static ssize_t
2845 store_temp_tolerance(struct device *dev, struct device_attribute *attr,
2846 const char *buf, size_t count)
2847 {
2848 struct nct6775_data *data = dev_get_drvdata(dev);
2849 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2850 int nr = sattr->nr;
2851 int index = sattr->index;
2852 unsigned long val;
2853 int err;
2854
2855 err = kstrtoul(buf, 10, &val);
2856 if (err < 0)
2857 return err;
2858
2859
2860 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, data->tolerance_mask);
2861
2862 mutex_lock(&data->update_lock);
2863 data->temp_tolerance[index][nr] = val;
2864 if (index)
2865 err = pwm_update_registers(data, nr);
2866 else
2867 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP_TOLERANCE[nr], val);
2868 mutex_unlock(&data->update_lock);
2869 return err ? : count;
2870 }
2871
2872
2873
2874
2875
2876
2877
2878
2879 static ssize_t
2880 show_speed_tolerance(struct device *dev, struct device_attribute *attr,
2881 char *buf)
2882 {
2883 struct nct6775_data *data = nct6775_update_device(dev);
2884 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2885 int nr = sattr->index;
2886 int target, tolerance = 0;
2887
2888 if (IS_ERR(data))
2889 return PTR_ERR(data);
2890
2891 target = data->target_speed[nr];
2892
2893 if (target) {
2894 int low = target - data->target_speed_tolerance[nr];
2895 int high = target + data->target_speed_tolerance[nr];
2896
2897 if (low <= 0)
2898 low = 1;
2899 if (high > 0xffff)
2900 high = 0xffff;
2901 if (high < low)
2902 high = low;
2903
2904 tolerance = (fan_from_reg16(low, data->fan_div[nr])
2905 - fan_from_reg16(high, data->fan_div[nr])) / 2;
2906 }
2907
2908 return sprintf(buf, "%d\n", tolerance);
2909 }
2910
2911 static ssize_t
2912 store_speed_tolerance(struct device *dev, struct device_attribute *attr,
2913 const char *buf, size_t count)
2914 {
2915 struct nct6775_data *data = dev_get_drvdata(dev);
2916 struct sensor_device_attribute *sattr = to_sensor_dev_attr(attr);
2917 int nr = sattr->index;
2918 unsigned long val;
2919 int err;
2920 int low, high;
2921
2922 err = kstrtoul(buf, 10, &val);
2923 if (err < 0)
2924 return err;
2925
2926 high = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) + val;
2927 low = fan_from_reg16(data->target_speed[nr], data->fan_div[nr]) - val;
2928 if (low <= 0)
2929 low = 1;
2930 if (high < low)
2931 high = low;
2932
2933 val = (fan_to_reg(low, data->fan_div[nr]) -
2934 fan_to_reg(high, data->fan_div[nr])) / 2;
2935
2936
2937 val = clamp_val(val, 0, data->speed_tolerance_limit);
2938
2939 mutex_lock(&data->update_lock);
2940 data->target_speed_tolerance[nr] = val;
2941 err = pwm_update_registers(data, nr);
2942 mutex_unlock(&data->update_lock);
2943 return err ? : count;
2944 }
2945
2946 SENSOR_TEMPLATE_2(pwm, "pwm%d", 0644, show_pwm, store_pwm, 0, 0);
2947 SENSOR_TEMPLATE(pwm_mode, "pwm%d_mode", 0644, show_pwm_mode, store_pwm_mode, 0);
2948 SENSOR_TEMPLATE(pwm_enable, "pwm%d_enable", 0644, show_pwm_enable, store_pwm_enable, 0);
2949 SENSOR_TEMPLATE(pwm_temp_sel, "pwm%d_temp_sel", 0644, show_pwm_temp_sel, store_pwm_temp_sel, 0);
2950 SENSOR_TEMPLATE(pwm_target_temp, "pwm%d_target_temp", 0644, show_target_temp, store_target_temp, 0);
2951 SENSOR_TEMPLATE(fan_target, "fan%d_target", 0644, show_target_speed, store_target_speed, 0);
2952 SENSOR_TEMPLATE(fan_tolerance, "fan%d_tolerance", 0644, show_speed_tolerance,
2953 store_speed_tolerance, 0);
2954
2955
2956
2957 static ssize_t
2958 show_weight_temp(struct device *dev, struct device_attribute *attr, char *buf)
2959 {
2960 struct nct6775_data *data = nct6775_update_device(dev);
2961 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2962 int nr = sattr->nr;
2963 int index = sattr->index;
2964
2965 if (IS_ERR(data))
2966 return PTR_ERR(data);
2967
2968 return sprintf(buf, "%d\n", data->weight_temp[index][nr] * 1000);
2969 }
2970
2971 static ssize_t
2972 store_weight_temp(struct device *dev, struct device_attribute *attr,
2973 const char *buf, size_t count)
2974 {
2975 struct nct6775_data *data = dev_get_drvdata(dev);
2976 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
2977 int nr = sattr->nr;
2978 int index = sattr->index;
2979 unsigned long val;
2980 int err;
2981
2982 err = kstrtoul(buf, 10, &val);
2983 if (err < 0)
2984 return err;
2985
2986 val = clamp_val(DIV_ROUND_CLOSEST(val, 1000), 0, 255);
2987
2988 mutex_lock(&data->update_lock);
2989 data->weight_temp[index][nr] = val;
2990 err = nct6775_write_value(data, data->REG_WEIGHT_TEMP[index][nr], val);
2991 mutex_unlock(&data->update_lock);
2992 return err ? : count;
2993 }
2994
2995 SENSOR_TEMPLATE(pwm_weight_temp_sel, "pwm%d_weight_temp_sel", 0644,
2996 show_pwm_weight_temp_sel, store_pwm_weight_temp_sel, 0);
2997 SENSOR_TEMPLATE_2(pwm_weight_temp_step, "pwm%d_weight_temp_step",
2998 0644, show_weight_temp, store_weight_temp, 0, 0);
2999 SENSOR_TEMPLATE_2(pwm_weight_temp_step_tol, "pwm%d_weight_temp_step_tol",
3000 0644, show_weight_temp, store_weight_temp, 0, 1);
3001 SENSOR_TEMPLATE_2(pwm_weight_temp_step_base, "pwm%d_weight_temp_step_base",
3002 0644, show_weight_temp, store_weight_temp, 0, 2);
3003 SENSOR_TEMPLATE_2(pwm_weight_duty_step, "pwm%d_weight_duty_step", 0644, show_pwm, store_pwm, 0, 5);
3004 SENSOR_TEMPLATE_2(pwm_weight_duty_base, "pwm%d_weight_duty_base", 0644, show_pwm, store_pwm, 0, 6);
3005
3006 static ssize_t
3007 show_fan_time(struct device *dev, struct device_attribute *attr, char *buf)
3008 {
3009 struct nct6775_data *data = nct6775_update_device(dev);
3010 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3011 int nr = sattr->nr;
3012 int index = sattr->index;
3013
3014 if (IS_ERR(data))
3015 return PTR_ERR(data);
3016
3017 return sprintf(buf, "%d\n",
3018 step_time_from_reg(data->fan_time[index][nr],
3019 data->pwm_mode[nr]));
3020 }
3021
3022 static ssize_t
3023 store_fan_time(struct device *dev, struct device_attribute *attr,
3024 const char *buf, size_t count)
3025 {
3026 struct nct6775_data *data = dev_get_drvdata(dev);
3027 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3028 int nr = sattr->nr;
3029 int index = sattr->index;
3030 unsigned long val;
3031 int err;
3032
3033 err = kstrtoul(buf, 10, &val);
3034 if (err < 0)
3035 return err;
3036
3037 val = step_time_to_reg(val, data->pwm_mode[nr]);
3038 mutex_lock(&data->update_lock);
3039 data->fan_time[index][nr] = val;
3040 err = nct6775_write_value(data, data->REG_FAN_TIME[index][nr], val);
3041 mutex_unlock(&data->update_lock);
3042 return err ? : count;
3043 }
3044
3045 static ssize_t
3046 show_auto_pwm(struct device *dev, struct device_attribute *attr, char *buf)
3047 {
3048 struct nct6775_data *data = nct6775_update_device(dev);
3049 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3050
3051 if (IS_ERR(data))
3052 return PTR_ERR(data);
3053
3054 return sprintf(buf, "%d\n", data->auto_pwm[sattr->nr][sattr->index]);
3055 }
3056
3057 static ssize_t
3058 store_auto_pwm(struct device *dev, struct device_attribute *attr,
3059 const char *buf, size_t count)
3060 {
3061 struct nct6775_data *data = dev_get_drvdata(dev);
3062 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3063 int nr = sattr->nr;
3064 int point = sattr->index;
3065 unsigned long val;
3066 int err;
3067 u16 reg;
3068
3069 err = kstrtoul(buf, 10, &val);
3070 if (err < 0)
3071 return err;
3072 if (val > 255)
3073 return -EINVAL;
3074
3075 if (point == data->auto_pwm_num) {
3076 if (data->kind != nct6775 && !val)
3077 return -EINVAL;
3078 if (data->kind != nct6779 && val)
3079 val = 0xff;
3080 }
3081
3082 mutex_lock(&data->update_lock);
3083 data->auto_pwm[nr][point] = val;
3084 if (point < data->auto_pwm_num) {
3085 err = nct6775_write_value(data, NCT6775_AUTO_PWM(data, nr, point),
3086 data->auto_pwm[nr][point]);
3087 } else {
3088 switch (data->kind) {
3089 case nct6775:
3090
3091 err = nct6775_read_value(data, NCT6775_REG_CRITICAL_ENAB[nr], ®);
3092 if (err)
3093 break;
3094 if (val)
3095 reg |= 0x02;
3096 else
3097 reg &= ~0x02;
3098 err = nct6775_write_value(data, NCT6775_REG_CRITICAL_ENAB[nr], reg);
3099 break;
3100 case nct6776:
3101 break;
3102 case nct6106:
3103 case nct6116:
3104 case nct6779:
3105 case nct6791:
3106 case nct6792:
3107 case nct6793:
3108 case nct6795:
3109 case nct6796:
3110 case nct6797:
3111 case nct6798:
3112 err = nct6775_write_value(data, data->REG_CRITICAL_PWM[nr], val);
3113 if (err)
3114 break;
3115 err = nct6775_read_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], ®);
3116 if (err)
3117 break;
3118 if (val == 255)
3119 reg &= ~data->CRITICAL_PWM_ENABLE_MASK;
3120 else
3121 reg |= data->CRITICAL_PWM_ENABLE_MASK;
3122 err = nct6775_write_value(data, data->REG_CRITICAL_PWM_ENABLE[nr], reg);
3123 break;
3124 }
3125 }
3126 mutex_unlock(&data->update_lock);
3127 return err ? : count;
3128 }
3129
3130 static ssize_t
3131 show_auto_temp(struct device *dev, struct device_attribute *attr, char *buf)
3132 {
3133 struct nct6775_data *data = nct6775_update_device(dev);
3134 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3135 int nr = sattr->nr;
3136 int point = sattr->index;
3137
3138 if (IS_ERR(data))
3139 return PTR_ERR(data);
3140
3141
3142
3143
3144
3145 return sprintf(buf, "%d\n", data->auto_temp[nr][point] * 1000);
3146 }
3147
3148 static ssize_t
3149 store_auto_temp(struct device *dev, struct device_attribute *attr,
3150 const char *buf, size_t count)
3151 {
3152 struct nct6775_data *data = dev_get_drvdata(dev);
3153 struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
3154 int nr = sattr->nr;
3155 int point = sattr->index;
3156 unsigned long val;
3157 int err;
3158
3159 err = kstrtoul(buf, 10, &val);
3160 if (err)
3161 return err;
3162 if (val > 255000)
3163 return -EINVAL;
3164
3165 mutex_lock(&data->update_lock);
3166 data->auto_temp[nr][point] = DIV_ROUND_CLOSEST(val, 1000);
3167 if (point < data->auto_pwm_num) {
3168 err = nct6775_write_value(data, NCT6775_AUTO_TEMP(data, nr, point),
3169 data->auto_temp[nr][point]);
3170 } else {
3171 err = nct6775_write_value(data, data->REG_CRITICAL_TEMP[nr],
3172 data->auto_temp[nr][point]);
3173 }
3174 mutex_unlock(&data->update_lock);
3175 return err ? : count;
3176 }
3177
3178 static umode_t nct6775_pwm_is_visible(struct kobject *kobj,
3179 struct attribute *attr, int index)
3180 {
3181 struct device *dev = kobj_to_dev(kobj);
3182 struct nct6775_data *data = dev_get_drvdata(dev);
3183 int pwm = index / 36;
3184 int nr = index % 36;
3185
3186 if (!(data->has_pwm & BIT(pwm)))
3187 return 0;
3188
3189 if ((nr >= 14 && nr <= 18) || nr == 21)
3190 if (!data->REG_WEIGHT_TEMP_SEL[pwm])
3191 return 0;
3192 if (nr == 19 && data->REG_PWM[3] == NULL)
3193 return 0;
3194 if (nr == 20 && data->REG_PWM[4] == NULL)
3195 return 0;
3196 if (nr == 21 && data->REG_PWM[6] == NULL)
3197 return 0;
3198
3199 if (nr >= 22 && nr <= 35) {
3200 int api = (nr - 22) / 2;
3201
3202 if (api > data->auto_pwm_num)
3203 return 0;
3204 }
3205 return nct6775_attr_mode(data, attr);
3206 }
3207
3208 SENSOR_TEMPLATE_2(pwm_stop_time, "pwm%d_stop_time", 0644, show_fan_time, store_fan_time, 0, 0);
3209 SENSOR_TEMPLATE_2(pwm_step_up_time, "pwm%d_step_up_time", 0644,
3210 show_fan_time, store_fan_time, 0, 1);
3211 SENSOR_TEMPLATE_2(pwm_step_down_time, "pwm%d_step_down_time", 0644,
3212 show_fan_time, store_fan_time, 0, 2);
3213 SENSOR_TEMPLATE_2(pwm_start, "pwm%d_start", 0644, show_pwm, store_pwm, 0, 1);
3214 SENSOR_TEMPLATE_2(pwm_floor, "pwm%d_floor", 0644, show_pwm, store_pwm, 0, 2);
3215 SENSOR_TEMPLATE_2(pwm_temp_tolerance, "pwm%d_temp_tolerance", 0644,
3216 show_temp_tolerance, store_temp_tolerance, 0, 0);
3217 SENSOR_TEMPLATE_2(pwm_crit_temp_tolerance, "pwm%d_crit_temp_tolerance",
3218 0644, show_temp_tolerance, store_temp_tolerance, 0, 1);
3219
3220 SENSOR_TEMPLATE_2(pwm_max, "pwm%d_max", 0644, show_pwm, store_pwm, 0, 3);
3221
3222 SENSOR_TEMPLATE_2(pwm_step, "pwm%d_step", 0644, show_pwm, store_pwm, 0, 4);
3223
3224 SENSOR_TEMPLATE_2(pwm_auto_point1_pwm, "pwm%d_auto_point1_pwm",
3225 0644, show_auto_pwm, store_auto_pwm, 0, 0);
3226 SENSOR_TEMPLATE_2(pwm_auto_point1_temp, "pwm%d_auto_point1_temp",
3227 0644, show_auto_temp, store_auto_temp, 0, 0);
3228
3229 SENSOR_TEMPLATE_2(pwm_auto_point2_pwm, "pwm%d_auto_point2_pwm",
3230 0644, show_auto_pwm, store_auto_pwm, 0, 1);
3231 SENSOR_TEMPLATE_2(pwm_auto_point2_temp, "pwm%d_auto_point2_temp",
3232 0644, show_auto_temp, store_auto_temp, 0, 1);
3233
3234 SENSOR_TEMPLATE_2(pwm_auto_point3_pwm, "pwm%d_auto_point3_pwm",
3235 0644, show_auto_pwm, store_auto_pwm, 0, 2);
3236 SENSOR_TEMPLATE_2(pwm_auto_point3_temp, "pwm%d_auto_point3_temp",
3237 0644, show_auto_temp, store_auto_temp, 0, 2);
3238
3239 SENSOR_TEMPLATE_2(pwm_auto_point4_pwm, "pwm%d_auto_point4_pwm",
3240 0644, show_auto_pwm, store_auto_pwm, 0, 3);
3241 SENSOR_TEMPLATE_2(pwm_auto_point4_temp, "pwm%d_auto_point4_temp",
3242 0644, show_auto_temp, store_auto_temp, 0, 3);
3243
3244 SENSOR_TEMPLATE_2(pwm_auto_point5_pwm, "pwm%d_auto_point5_pwm",
3245 0644, show_auto_pwm, store_auto_pwm, 0, 4);
3246 SENSOR_TEMPLATE_2(pwm_auto_point5_temp, "pwm%d_auto_point5_temp",
3247 0644, show_auto_temp, store_auto_temp, 0, 4);
3248
3249 SENSOR_TEMPLATE_2(pwm_auto_point6_pwm, "pwm%d_auto_point6_pwm",
3250 0644, show_auto_pwm, store_auto_pwm, 0, 5);
3251 SENSOR_TEMPLATE_2(pwm_auto_point6_temp, "pwm%d_auto_point6_temp",
3252 0644, show_auto_temp, store_auto_temp, 0, 5);
3253
3254 SENSOR_TEMPLATE_2(pwm_auto_point7_pwm, "pwm%d_auto_point7_pwm",
3255 0644, show_auto_pwm, store_auto_pwm, 0, 6);
3256 SENSOR_TEMPLATE_2(pwm_auto_point7_temp, "pwm%d_auto_point7_temp",
3257 0644, show_auto_temp, store_auto_temp, 0, 6);
3258
3259
3260
3261
3262
3263
3264 static struct sensor_device_template *nct6775_attributes_pwm_template[] = {
3265 &sensor_dev_template_pwm,
3266 &sensor_dev_template_pwm_mode,
3267 &sensor_dev_template_pwm_enable,
3268 &sensor_dev_template_pwm_temp_sel,
3269 &sensor_dev_template_pwm_temp_tolerance,
3270 &sensor_dev_template_pwm_crit_temp_tolerance,
3271 &sensor_dev_template_pwm_target_temp,
3272 &sensor_dev_template_fan_target,
3273 &sensor_dev_template_fan_tolerance,
3274 &sensor_dev_template_pwm_stop_time,
3275 &sensor_dev_template_pwm_step_up_time,
3276 &sensor_dev_template_pwm_step_down_time,
3277 &sensor_dev_template_pwm_start,
3278 &sensor_dev_template_pwm_floor,
3279 &sensor_dev_template_pwm_weight_temp_sel,
3280 &sensor_dev_template_pwm_weight_temp_step,
3281 &sensor_dev_template_pwm_weight_temp_step_tol,
3282 &sensor_dev_template_pwm_weight_temp_step_base,
3283 &sensor_dev_template_pwm_weight_duty_step,
3284 &sensor_dev_template_pwm_max,
3285 &sensor_dev_template_pwm_step,
3286 &sensor_dev_template_pwm_weight_duty_base,
3287 &sensor_dev_template_pwm_auto_point1_pwm,
3288 &sensor_dev_template_pwm_auto_point1_temp,
3289 &sensor_dev_template_pwm_auto_point2_pwm,
3290 &sensor_dev_template_pwm_auto_point2_temp,
3291 &sensor_dev_template_pwm_auto_point3_pwm,
3292 &sensor_dev_template_pwm_auto_point3_temp,
3293 &sensor_dev_template_pwm_auto_point4_pwm,
3294 &sensor_dev_template_pwm_auto_point4_temp,
3295 &sensor_dev_template_pwm_auto_point5_pwm,
3296 &sensor_dev_template_pwm_auto_point5_temp,
3297 &sensor_dev_template_pwm_auto_point6_pwm,
3298 &sensor_dev_template_pwm_auto_point6_temp,
3299 &sensor_dev_template_pwm_auto_point7_pwm,
3300 &sensor_dev_template_pwm_auto_point7_temp,
3301
3302 NULL
3303 };
3304
3305 static const struct sensor_template_group nct6775_pwm_template_group = {
3306 .templates = nct6775_attributes_pwm_template,
3307 .is_visible = nct6775_pwm_is_visible,
3308 .base = 1,
3309 };
3310
3311 static inline int nct6775_init_device(struct nct6775_data *data)
3312 {
3313 int i, err;
3314 u16 tmp, diode;
3315
3316
3317 if (data->REG_CONFIG) {
3318 err = nct6775_read_value(data, data->REG_CONFIG, &tmp);
3319 if (err)
3320 return err;
3321 if (!(tmp & 0x01)) {
3322 err = nct6775_write_value(data, data->REG_CONFIG, tmp | 0x01);
3323 if (err)
3324 return err;
3325 }
3326 }
3327
3328
3329 for (i = 0; i < NUM_TEMP; i++) {
3330 if (!(data->have_temp & BIT(i)))
3331 continue;
3332 if (!data->reg_temp_config[i])
3333 continue;
3334 err = nct6775_read_value(data, data->reg_temp_config[i], &tmp);
3335 if (err)
3336 return err;
3337 if (tmp & 0x01) {
3338 err = nct6775_write_value(data, data->reg_temp_config[i], tmp & 0xfe);
3339 if (err)
3340 return err;
3341 }
3342 }
3343
3344
3345 err = nct6775_read_value(data, data->REG_VBAT, &tmp);
3346 if (err)
3347 return err;
3348 if (!(tmp & 0x01)) {
3349 err = nct6775_write_value(data, data->REG_VBAT, tmp | 0x01);
3350 if (err)
3351 return err;
3352 }
3353
3354 err = nct6775_read_value(data, data->REG_DIODE, &diode);
3355 if (err)
3356 return err;
3357
3358 for (i = 0; i < data->temp_fixed_num; i++) {
3359 if (!(data->have_temp_fixed & BIT(i)))
3360 continue;
3361 if ((tmp & (data->DIODE_MASK << i)))
3362 data->temp_type[i]
3363 = 3 - ((diode >> i) & data->DIODE_MASK);
3364 else
3365 data->temp_type[i] = 4;
3366 }
3367
3368 return 0;
3369 }
3370
3371 static int add_temp_sensors(struct nct6775_data *data, const u16 *regp,
3372 int *available, int *mask)
3373 {
3374 int i, err;
3375 u16 src;
3376
3377 for (i = 0; i < data->pwm_num && *available; i++) {
3378 int index;
3379
3380 if (!regp[i])
3381 continue;
3382 err = nct6775_read_value(data, regp[i], &src);
3383 if (err)
3384 return err;
3385 src &= 0x1f;
3386 if (!src || (*mask & BIT(src)))
3387 continue;
3388 if (!(data->temp_mask & BIT(src)))
3389 continue;
3390
3391 index = __ffs(*available);
3392 err = nct6775_write_value(data, data->REG_TEMP_SOURCE[index], src);
3393 if (err)
3394 return err;
3395 *available &= ~BIT(index);
3396 *mask |= BIT(src);
3397 }
3398
3399 return 0;
3400 }
3401
3402 int nct6775_probe(struct device *dev, struct nct6775_data *data,
3403 const struct regmap_config *regmapcfg)
3404 {
3405 int i, s, err = 0;
3406 int mask, available;
3407 u16 src;
3408 const u16 *reg_temp, *reg_temp_over, *reg_temp_hyst, *reg_temp_config;
3409 const u16 *reg_temp_mon, *reg_temp_alternate, *reg_temp_crit;
3410 const u16 *reg_temp_crit_l = NULL, *reg_temp_crit_h = NULL;
3411 int num_reg_temp, num_reg_temp_mon, num_reg_tsi_temp;
3412 struct device *hwmon_dev;
3413 struct sensor_template_group tsi_temp_tg;
3414
3415 data->regmap = devm_regmap_init(dev, NULL, data, regmapcfg);
3416 if (IS_ERR(data->regmap))
3417 return PTR_ERR(data->regmap);
3418
3419 mutex_init(&data->update_lock);
3420 data->name = nct6775_device_names[data->kind];
3421 data->bank = 0xff;
3422
3423 switch (data->kind) {
3424 case nct6106:
3425 data->in_num = 9;
3426 data->pwm_num = 3;
3427 data->auto_pwm_num = 4;
3428 data->temp_fixed_num = 3;
3429 data->num_temp_alarms = 6;
3430 data->num_temp_beeps = 6;
3431
3432 data->fan_from_reg = fan_from_reg13;
3433 data->fan_from_reg_min = fan_from_reg13;
3434
3435 data->temp_label = nct6776_temp_label;
3436 data->temp_mask = NCT6776_TEMP_MASK;
3437 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3438
3439 data->REG_VBAT = NCT6106_REG_VBAT;
3440 data->REG_DIODE = NCT6106_REG_DIODE;
3441 data->DIODE_MASK = NCT6106_DIODE_MASK;
3442 data->REG_VIN = NCT6106_REG_IN;
3443 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3444 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3445 data->REG_TARGET = NCT6106_REG_TARGET;
3446 data->REG_FAN = NCT6106_REG_FAN;
3447 data->REG_FAN_MODE = NCT6106_REG_FAN_MODE;
3448 data->REG_FAN_MIN = NCT6106_REG_FAN_MIN;
3449 data->REG_FAN_PULSES = NCT6106_REG_FAN_PULSES;
3450 data->FAN_PULSE_SHIFT = NCT6106_FAN_PULSE_SHIFT;
3451 data->REG_FAN_TIME[0] = NCT6106_REG_FAN_STOP_TIME;
3452 data->REG_FAN_TIME[1] = NCT6106_REG_FAN_STEP_UP_TIME;
3453 data->REG_FAN_TIME[2] = NCT6106_REG_FAN_STEP_DOWN_TIME;
3454 data->REG_TOLERANCE_H = NCT6106_REG_TOLERANCE_H;
3455 data->REG_PWM[0] = NCT6116_REG_PWM;
3456 data->REG_PWM[1] = NCT6106_REG_FAN_START_OUTPUT;
3457 data->REG_PWM[2] = NCT6106_REG_FAN_STOP_OUTPUT;
3458 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3459 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3460 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3461 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3462 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3463 data->REG_AUTO_TEMP = NCT6106_REG_AUTO_TEMP;
3464 data->REG_AUTO_PWM = NCT6106_REG_AUTO_PWM;
3465 data->REG_CRITICAL_TEMP = NCT6106_REG_CRITICAL_TEMP;
3466 data->REG_CRITICAL_TEMP_TOLERANCE
3467 = NCT6106_REG_CRITICAL_TEMP_TOLERANCE;
3468 data->REG_CRITICAL_PWM_ENABLE = NCT6106_REG_CRITICAL_PWM_ENABLE;
3469 data->CRITICAL_PWM_ENABLE_MASK
3470 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3471 data->REG_CRITICAL_PWM = NCT6106_REG_CRITICAL_PWM;
3472 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3473 data->REG_TEMP_SOURCE = NCT6106_REG_TEMP_SOURCE;
3474 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3475 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3476 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3477 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3478 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3479 data->REG_ALARM = NCT6106_REG_ALARM;
3480 data->ALARM_BITS = NCT6106_ALARM_BITS;
3481 data->REG_BEEP = NCT6106_REG_BEEP;
3482 data->BEEP_BITS = NCT6106_BEEP_BITS;
3483 data->REG_TSI_TEMP = NCT6106_REG_TSI_TEMP;
3484
3485 reg_temp = NCT6106_REG_TEMP;
3486 reg_temp_mon = NCT6106_REG_TEMP_MON;
3487 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3488 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3489 num_reg_tsi_temp = ARRAY_SIZE(NCT6106_REG_TSI_TEMP);
3490 reg_temp_over = NCT6106_REG_TEMP_OVER;
3491 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3492 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3493 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3494 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3495 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3496 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3497
3498 break;
3499 case nct6116:
3500 data->in_num = 9;
3501 data->pwm_num = 3;
3502 data->auto_pwm_num = 4;
3503 data->temp_fixed_num = 3;
3504 data->num_temp_alarms = 3;
3505 data->num_temp_beeps = 3;
3506
3507 data->fan_from_reg = fan_from_reg13;
3508 data->fan_from_reg_min = fan_from_reg13;
3509
3510 data->temp_label = nct6776_temp_label;
3511 data->temp_mask = NCT6776_TEMP_MASK;
3512 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3513
3514 data->REG_VBAT = NCT6106_REG_VBAT;
3515 data->REG_DIODE = NCT6106_REG_DIODE;
3516 data->DIODE_MASK = NCT6106_DIODE_MASK;
3517 data->REG_VIN = NCT6106_REG_IN;
3518 data->REG_IN_MINMAX[0] = NCT6106_REG_IN_MIN;
3519 data->REG_IN_MINMAX[1] = NCT6106_REG_IN_MAX;
3520 data->REG_TARGET = NCT6116_REG_TARGET;
3521 data->REG_FAN = NCT6116_REG_FAN;
3522 data->REG_FAN_MODE = NCT6116_REG_FAN_MODE;
3523 data->REG_FAN_MIN = NCT6116_REG_FAN_MIN;
3524 data->REG_FAN_PULSES = NCT6116_REG_FAN_PULSES;
3525 data->FAN_PULSE_SHIFT = NCT6116_FAN_PULSE_SHIFT;
3526 data->REG_FAN_TIME[0] = NCT6116_REG_FAN_STOP_TIME;
3527 data->REG_FAN_TIME[1] = NCT6116_REG_FAN_STEP_UP_TIME;
3528 data->REG_FAN_TIME[2] = NCT6116_REG_FAN_STEP_DOWN_TIME;
3529 data->REG_TOLERANCE_H = NCT6116_REG_TOLERANCE_H;
3530 data->REG_PWM[0] = NCT6116_REG_PWM;
3531 data->REG_PWM[1] = NCT6116_REG_FAN_START_OUTPUT;
3532 data->REG_PWM[2] = NCT6116_REG_FAN_STOP_OUTPUT;
3533 data->REG_PWM[5] = NCT6106_REG_WEIGHT_DUTY_STEP;
3534 data->REG_PWM[6] = NCT6106_REG_WEIGHT_DUTY_BASE;
3535 data->REG_PWM_READ = NCT6106_REG_PWM_READ;
3536 data->REG_PWM_MODE = NCT6106_REG_PWM_MODE;
3537 data->PWM_MODE_MASK = NCT6106_PWM_MODE_MASK;
3538 data->REG_AUTO_TEMP = NCT6116_REG_AUTO_TEMP;
3539 data->REG_AUTO_PWM = NCT6116_REG_AUTO_PWM;
3540 data->REG_CRITICAL_TEMP = NCT6116_REG_CRITICAL_TEMP;
3541 data->REG_CRITICAL_TEMP_TOLERANCE
3542 = NCT6116_REG_CRITICAL_TEMP_TOLERANCE;
3543 data->REG_CRITICAL_PWM_ENABLE = NCT6116_REG_CRITICAL_PWM_ENABLE;
3544 data->CRITICAL_PWM_ENABLE_MASK
3545 = NCT6106_CRITICAL_PWM_ENABLE_MASK;
3546 data->REG_CRITICAL_PWM = NCT6116_REG_CRITICAL_PWM;
3547 data->REG_TEMP_OFFSET = NCT6106_REG_TEMP_OFFSET;
3548 data->REG_TEMP_SOURCE = NCT6116_REG_TEMP_SOURCE;
3549 data->REG_TEMP_SEL = NCT6116_REG_TEMP_SEL;
3550 data->REG_WEIGHT_TEMP_SEL = NCT6106_REG_WEIGHT_TEMP_SEL;
3551 data->REG_WEIGHT_TEMP[0] = NCT6106_REG_WEIGHT_TEMP_STEP;
3552 data->REG_WEIGHT_TEMP[1] = NCT6106_REG_WEIGHT_TEMP_STEP_TOL;
3553 data->REG_WEIGHT_TEMP[2] = NCT6106_REG_WEIGHT_TEMP_BASE;
3554 data->REG_ALARM = NCT6106_REG_ALARM;
3555 data->ALARM_BITS = NCT6116_ALARM_BITS;
3556 data->REG_BEEP = NCT6106_REG_BEEP;
3557 data->BEEP_BITS = NCT6116_BEEP_BITS;
3558 data->REG_TSI_TEMP = NCT6116_REG_TSI_TEMP;
3559
3560 reg_temp = NCT6106_REG_TEMP;
3561 reg_temp_mon = NCT6106_REG_TEMP_MON;
3562 num_reg_temp = ARRAY_SIZE(NCT6106_REG_TEMP);
3563 num_reg_temp_mon = ARRAY_SIZE(NCT6106_REG_TEMP_MON);
3564 num_reg_tsi_temp = ARRAY_SIZE(NCT6116_REG_TSI_TEMP);
3565 reg_temp_over = NCT6106_REG_TEMP_OVER;
3566 reg_temp_hyst = NCT6106_REG_TEMP_HYST;
3567 reg_temp_config = NCT6106_REG_TEMP_CONFIG;
3568 reg_temp_alternate = NCT6106_REG_TEMP_ALTERNATE;
3569 reg_temp_crit = NCT6106_REG_TEMP_CRIT;
3570 reg_temp_crit_l = NCT6106_REG_TEMP_CRIT_L;
3571 reg_temp_crit_h = NCT6106_REG_TEMP_CRIT_H;
3572
3573 break;
3574 case nct6775:
3575 data->in_num = 9;
3576 data->pwm_num = 3;
3577 data->auto_pwm_num = 6;
3578 data->has_fan_div = true;
3579 data->temp_fixed_num = 3;
3580 data->num_temp_alarms = 3;
3581 data->num_temp_beeps = 3;
3582
3583 data->ALARM_BITS = NCT6775_ALARM_BITS;
3584 data->BEEP_BITS = NCT6775_BEEP_BITS;
3585
3586 data->fan_from_reg = fan_from_reg16;
3587 data->fan_from_reg_min = fan_from_reg8;
3588 data->target_temp_mask = 0x7f;
3589 data->tolerance_mask = 0x0f;
3590 data->speed_tolerance_limit = 15;
3591
3592 data->temp_label = nct6775_temp_label;
3593 data->temp_mask = NCT6775_TEMP_MASK;
3594 data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3595
3596 data->REG_CONFIG = NCT6775_REG_CONFIG;
3597 data->REG_VBAT = NCT6775_REG_VBAT;
3598 data->REG_DIODE = NCT6775_REG_DIODE;
3599 data->DIODE_MASK = NCT6775_DIODE_MASK;
3600 data->REG_VIN = NCT6775_REG_IN;
3601 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3602 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3603 data->REG_TARGET = NCT6775_REG_TARGET;
3604 data->REG_FAN = NCT6775_REG_FAN;
3605 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3606 data->REG_FAN_MIN = NCT6775_REG_FAN_MIN;
3607 data->REG_FAN_PULSES = NCT6775_REG_FAN_PULSES;
3608 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3609 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3610 data->REG_FAN_TIME[1] = NCT6775_REG_FAN_STEP_UP_TIME;
3611 data->REG_FAN_TIME[2] = NCT6775_REG_FAN_STEP_DOWN_TIME;
3612 data->REG_PWM[0] = NCT6775_REG_PWM;
3613 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3614 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3615 data->REG_PWM[3] = NCT6775_REG_FAN_MAX_OUTPUT;
3616 data->REG_PWM[4] = NCT6775_REG_FAN_STEP_OUTPUT;
3617 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3618 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3619 data->REG_PWM_MODE = NCT6775_REG_PWM_MODE;
3620 data->PWM_MODE_MASK = NCT6775_PWM_MODE_MASK;
3621 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3622 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3623 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3624 data->REG_CRITICAL_TEMP_TOLERANCE
3625 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3626 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3627 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3628 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3629 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3630 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3631 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3632 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3633 data->REG_ALARM = NCT6775_REG_ALARM;
3634 data->REG_BEEP = NCT6775_REG_BEEP;
3635 data->REG_TSI_TEMP = NCT6775_REG_TSI_TEMP;
3636
3637 reg_temp = NCT6775_REG_TEMP;
3638 reg_temp_mon = NCT6775_REG_TEMP_MON;
3639 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3640 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3641 num_reg_tsi_temp = ARRAY_SIZE(NCT6775_REG_TSI_TEMP);
3642 reg_temp_over = NCT6775_REG_TEMP_OVER;
3643 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3644 reg_temp_config = NCT6775_REG_TEMP_CONFIG;
3645 reg_temp_alternate = NCT6775_REG_TEMP_ALTERNATE;
3646 reg_temp_crit = NCT6775_REG_TEMP_CRIT;
3647
3648 break;
3649 case nct6776:
3650 data->in_num = 9;
3651 data->pwm_num = 3;
3652 data->auto_pwm_num = 4;
3653 data->has_fan_div = false;
3654 data->temp_fixed_num = 3;
3655 data->num_temp_alarms = 3;
3656 data->num_temp_beeps = 6;
3657
3658 data->ALARM_BITS = NCT6776_ALARM_BITS;
3659 data->BEEP_BITS = NCT6776_BEEP_BITS;
3660
3661 data->fan_from_reg = fan_from_reg13;
3662 data->fan_from_reg_min = fan_from_reg13;
3663 data->target_temp_mask = 0xff;
3664 data->tolerance_mask = 0x07;
3665 data->speed_tolerance_limit = 63;
3666
3667 data->temp_label = nct6776_temp_label;
3668 data->temp_mask = NCT6776_TEMP_MASK;
3669 data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3670
3671 data->REG_CONFIG = NCT6775_REG_CONFIG;
3672 data->REG_VBAT = NCT6775_REG_VBAT;
3673 data->REG_DIODE = NCT6775_REG_DIODE;
3674 data->DIODE_MASK = NCT6775_DIODE_MASK;
3675 data->REG_VIN = NCT6775_REG_IN;
3676 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3677 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3678 data->REG_TARGET = NCT6775_REG_TARGET;
3679 data->REG_FAN = NCT6775_REG_FAN;
3680 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3681 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3682 data->REG_FAN_PULSES = NCT6776_REG_FAN_PULSES;
3683 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3684 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3685 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3686 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3687 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3688 data->REG_PWM[0] = NCT6775_REG_PWM;
3689 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3690 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3691 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3692 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3693 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3694 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3695 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3696 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3697 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3698 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3699 data->REG_CRITICAL_TEMP_TOLERANCE
3700 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3701 data->REG_TEMP_OFFSET = NCT6775_REG_TEMP_OFFSET;
3702 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3703 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3704 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3705 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3706 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3707 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3708 data->REG_ALARM = NCT6775_REG_ALARM;
3709 data->REG_BEEP = NCT6776_REG_BEEP;
3710 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3711
3712 reg_temp = NCT6775_REG_TEMP;
3713 reg_temp_mon = NCT6775_REG_TEMP_MON;
3714 num_reg_temp = ARRAY_SIZE(NCT6775_REG_TEMP);
3715 num_reg_temp_mon = ARRAY_SIZE(NCT6775_REG_TEMP_MON);
3716 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3717 reg_temp_over = NCT6775_REG_TEMP_OVER;
3718 reg_temp_hyst = NCT6775_REG_TEMP_HYST;
3719 reg_temp_config = NCT6776_REG_TEMP_CONFIG;
3720 reg_temp_alternate = NCT6776_REG_TEMP_ALTERNATE;
3721 reg_temp_crit = NCT6776_REG_TEMP_CRIT;
3722
3723 break;
3724 case nct6779:
3725 data->in_num = 15;
3726 data->pwm_num = 5;
3727 data->auto_pwm_num = 4;
3728 data->has_fan_div = false;
3729 data->temp_fixed_num = 6;
3730 data->num_temp_alarms = 2;
3731 data->num_temp_beeps = 2;
3732
3733 data->ALARM_BITS = NCT6779_ALARM_BITS;
3734 data->BEEP_BITS = NCT6779_BEEP_BITS;
3735
3736 data->fan_from_reg = fan_from_reg_rpm;
3737 data->fan_from_reg_min = fan_from_reg13;
3738 data->target_temp_mask = 0xff;
3739 data->tolerance_mask = 0x07;
3740 data->speed_tolerance_limit = 63;
3741
3742 data->temp_label = nct6779_temp_label;
3743 data->temp_mask = NCT6779_TEMP_MASK;
3744 data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3745
3746 data->REG_CONFIG = NCT6775_REG_CONFIG;
3747 data->REG_VBAT = NCT6775_REG_VBAT;
3748 data->REG_DIODE = NCT6775_REG_DIODE;
3749 data->DIODE_MASK = NCT6775_DIODE_MASK;
3750 data->REG_VIN = NCT6779_REG_IN;
3751 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3752 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3753 data->REG_TARGET = NCT6775_REG_TARGET;
3754 data->REG_FAN = NCT6779_REG_FAN;
3755 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3756 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3757 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3758 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3759 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3760 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3761 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3762 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3763 data->REG_PWM[0] = NCT6775_REG_PWM;
3764 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3765 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3766 data->REG_PWM[5] = NCT6775_REG_WEIGHT_DUTY_STEP;
3767 data->REG_PWM[6] = NCT6776_REG_WEIGHT_DUTY_BASE;
3768 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3769 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3770 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3771 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3772 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3773 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3774 data->REG_CRITICAL_TEMP_TOLERANCE
3775 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3776 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3777 data->CRITICAL_PWM_ENABLE_MASK
3778 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3779 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3780 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3781 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3782 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3783 data->REG_WEIGHT_TEMP_SEL = NCT6775_REG_WEIGHT_TEMP_SEL;
3784 data->REG_WEIGHT_TEMP[0] = NCT6775_REG_WEIGHT_TEMP_STEP;
3785 data->REG_WEIGHT_TEMP[1] = NCT6775_REG_WEIGHT_TEMP_STEP_TOL;
3786 data->REG_WEIGHT_TEMP[2] = NCT6775_REG_WEIGHT_TEMP_BASE;
3787 data->REG_ALARM = NCT6779_REG_ALARM;
3788 data->REG_BEEP = NCT6776_REG_BEEP;
3789 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3790
3791 reg_temp = NCT6779_REG_TEMP;
3792 reg_temp_mon = NCT6779_REG_TEMP_MON;
3793 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3794 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3795 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3796 reg_temp_over = NCT6779_REG_TEMP_OVER;
3797 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3798 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3799 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3800 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3801
3802 break;
3803 case nct6791:
3804 case nct6792:
3805 case nct6793:
3806 case nct6795:
3807 case nct6796:
3808 case nct6797:
3809 case nct6798:
3810 data->in_num = 15;
3811 data->pwm_num = (data->kind == nct6796 ||
3812 data->kind == nct6797 ||
3813 data->kind == nct6798) ? 7 : 6;
3814 data->auto_pwm_num = 4;
3815 data->has_fan_div = false;
3816 data->temp_fixed_num = 6;
3817 data->num_temp_alarms = 2;
3818 data->num_temp_beeps = 2;
3819
3820 data->ALARM_BITS = NCT6791_ALARM_BITS;
3821 data->BEEP_BITS = NCT6779_BEEP_BITS;
3822
3823 data->fan_from_reg = fan_from_reg_rpm;
3824 data->fan_from_reg_min = fan_from_reg13;
3825 data->target_temp_mask = 0xff;
3826 data->tolerance_mask = 0x07;
3827 data->speed_tolerance_limit = 63;
3828
3829 switch (data->kind) {
3830 default:
3831 case nct6791:
3832 data->temp_label = nct6779_temp_label;
3833 data->temp_mask = NCT6791_TEMP_MASK;
3834 data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3835 break;
3836 case nct6792:
3837 data->temp_label = nct6792_temp_label;
3838 data->temp_mask = NCT6792_TEMP_MASK;
3839 data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3840 break;
3841 case nct6793:
3842 data->temp_label = nct6793_temp_label;
3843 data->temp_mask = NCT6793_TEMP_MASK;
3844 data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3845 break;
3846 case nct6795:
3847 case nct6797:
3848 data->temp_label = nct6795_temp_label;
3849 data->temp_mask = NCT6795_TEMP_MASK;
3850 data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3851 break;
3852 case nct6796:
3853 data->temp_label = nct6796_temp_label;
3854 data->temp_mask = NCT6796_TEMP_MASK;
3855 data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3856 break;
3857 case nct6798:
3858 data->temp_label = nct6798_temp_label;
3859 data->temp_mask = NCT6798_TEMP_MASK;
3860 data->virt_temp_mask = NCT6798_VIRT_TEMP_MASK;
3861 break;
3862 }
3863
3864 data->REG_CONFIG = NCT6775_REG_CONFIG;
3865 data->REG_VBAT = NCT6775_REG_VBAT;
3866 data->REG_DIODE = NCT6775_REG_DIODE;
3867 data->DIODE_MASK = NCT6775_DIODE_MASK;
3868 data->REG_VIN = NCT6779_REG_IN;
3869 data->REG_IN_MINMAX[0] = NCT6775_REG_IN_MIN;
3870 data->REG_IN_MINMAX[1] = NCT6775_REG_IN_MAX;
3871 data->REG_TARGET = NCT6775_REG_TARGET;
3872 data->REG_FAN = NCT6779_REG_FAN;
3873 data->REG_FAN_MODE = NCT6775_REG_FAN_MODE;
3874 data->REG_FAN_MIN = NCT6776_REG_FAN_MIN;
3875 data->REG_FAN_PULSES = NCT6779_REG_FAN_PULSES;
3876 data->FAN_PULSE_SHIFT = NCT6775_FAN_PULSE_SHIFT;
3877 data->REG_FAN_TIME[0] = NCT6775_REG_FAN_STOP_TIME;
3878 data->REG_FAN_TIME[1] = NCT6776_REG_FAN_STEP_UP_TIME;
3879 data->REG_FAN_TIME[2] = NCT6776_REG_FAN_STEP_DOWN_TIME;
3880 data->REG_TOLERANCE_H = NCT6776_REG_TOLERANCE_H;
3881 data->REG_PWM[0] = NCT6775_REG_PWM;
3882 data->REG_PWM[1] = NCT6775_REG_FAN_START_OUTPUT;
3883 data->REG_PWM[2] = NCT6775_REG_FAN_STOP_OUTPUT;
3884 data->REG_PWM[5] = NCT6791_REG_WEIGHT_DUTY_STEP;
3885 data->REG_PWM[6] = NCT6791_REG_WEIGHT_DUTY_BASE;
3886 data->REG_PWM_READ = NCT6775_REG_PWM_READ;
3887 data->REG_PWM_MODE = NCT6776_REG_PWM_MODE;
3888 data->PWM_MODE_MASK = NCT6776_PWM_MODE_MASK;
3889 data->REG_AUTO_TEMP = NCT6775_REG_AUTO_TEMP;
3890 data->REG_AUTO_PWM = NCT6775_REG_AUTO_PWM;
3891 data->REG_CRITICAL_TEMP = NCT6775_REG_CRITICAL_TEMP;
3892 data->REG_CRITICAL_TEMP_TOLERANCE
3893 = NCT6775_REG_CRITICAL_TEMP_TOLERANCE;
3894 data->REG_CRITICAL_PWM_ENABLE = NCT6779_REG_CRITICAL_PWM_ENABLE;
3895 data->CRITICAL_PWM_ENABLE_MASK
3896 = NCT6779_CRITICAL_PWM_ENABLE_MASK;
3897 data->REG_CRITICAL_PWM = NCT6779_REG_CRITICAL_PWM;
3898 data->REG_TEMP_OFFSET = NCT6779_REG_TEMP_OFFSET;
3899 data->REG_TEMP_SOURCE = NCT6775_REG_TEMP_SOURCE;
3900 data->REG_TEMP_SEL = NCT6775_REG_TEMP_SEL;
3901 data->REG_WEIGHT_TEMP_SEL = NCT6791_REG_WEIGHT_TEMP_SEL;
3902 data->REG_WEIGHT_TEMP[0] = NCT6791_REG_WEIGHT_TEMP_STEP;
3903 data->REG_WEIGHT_TEMP[1] = NCT6791_REG_WEIGHT_TEMP_STEP_TOL;
3904 data->REG_WEIGHT_TEMP[2] = NCT6791_REG_WEIGHT_TEMP_BASE;
3905 data->REG_ALARM = NCT6791_REG_ALARM;
3906 if (data->kind == nct6791)
3907 data->REG_BEEP = NCT6776_REG_BEEP;
3908 else
3909 data->REG_BEEP = NCT6792_REG_BEEP;
3910 switch (data->kind) {
3911 case nct6791:
3912 case nct6792:
3913 case nct6793:
3914 data->REG_TSI_TEMP = NCT6776_REG_TSI_TEMP;
3915 num_reg_tsi_temp = ARRAY_SIZE(NCT6776_REG_TSI_TEMP);
3916 break;
3917 case nct6795:
3918 case nct6796:
3919 case nct6797:
3920 case nct6798:
3921 data->REG_TSI_TEMP = NCT6796_REG_TSI_TEMP;
3922 num_reg_tsi_temp = ARRAY_SIZE(NCT6796_REG_TSI_TEMP);
3923 break;
3924 default:
3925 num_reg_tsi_temp = 0;
3926 break;
3927 }
3928
3929 reg_temp = NCT6779_REG_TEMP;
3930 num_reg_temp = ARRAY_SIZE(NCT6779_REG_TEMP);
3931 if (data->kind == nct6791) {
3932 reg_temp_mon = NCT6779_REG_TEMP_MON;
3933 num_reg_temp_mon = ARRAY_SIZE(NCT6779_REG_TEMP_MON);
3934 } else {
3935 reg_temp_mon = NCT6792_REG_TEMP_MON;
3936 num_reg_temp_mon = ARRAY_SIZE(NCT6792_REG_TEMP_MON);
3937 }
3938 reg_temp_over = NCT6779_REG_TEMP_OVER;
3939 reg_temp_hyst = NCT6779_REG_TEMP_HYST;
3940 reg_temp_config = NCT6779_REG_TEMP_CONFIG;
3941 reg_temp_alternate = NCT6779_REG_TEMP_ALTERNATE;
3942 reg_temp_crit = NCT6779_REG_TEMP_CRIT;
3943
3944 break;
3945 default:
3946 return -ENODEV;
3947 }
3948 data->have_in = BIT(data->in_num) - 1;
3949 data->have_temp = 0;
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959 mask = 0;
3960 available = 0;
3961 for (i = 0; i < num_reg_temp; i++) {
3962 if (reg_temp[i] == 0)
3963 continue;
3964
3965 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
3966 if (err)
3967 return err;
3968 src &= 0x1f;
3969 if (!src || (mask & BIT(src)))
3970 available |= BIT(i);
3971
3972 mask |= BIT(src);
3973 }
3974
3975
3976
3977
3978
3979 err = add_temp_sensors(data, data->REG_TEMP_SEL, &available, &mask);
3980 if (err)
3981 return err;
3982 err = add_temp_sensors(data, data->REG_WEIGHT_TEMP_SEL, &available, &mask);
3983 if (err)
3984 return err;
3985
3986 mask = 0;
3987 s = NUM_TEMP_FIXED;
3988 for (i = 0; i < num_reg_temp; i++) {
3989 if (reg_temp[i] == 0)
3990 continue;
3991
3992 err = nct6775_read_value(data, data->REG_TEMP_SOURCE[i], &src);
3993 if (err)
3994 return err;
3995 src &= 0x1f;
3996 if (!src || (mask & BIT(src)))
3997 continue;
3998
3999 if (!(data->temp_mask & BIT(src))) {
4000 dev_info(dev,
4001 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4002 src, i, data->REG_TEMP_SOURCE[i], reg_temp[i]);
4003 continue;
4004 }
4005
4006 mask |= BIT(src);
4007
4008
4009 if (src <= data->temp_fixed_num) {
4010 data->have_temp |= BIT(src - 1);
4011 data->have_temp_fixed |= BIT(src - 1);
4012 data->reg_temp[0][src - 1] = reg_temp[i];
4013 data->reg_temp[1][src - 1] = reg_temp_over[i];
4014 data->reg_temp[2][src - 1] = reg_temp_hyst[i];
4015 if (reg_temp_crit_h && reg_temp_crit_h[i])
4016 data->reg_temp[3][src - 1] = reg_temp_crit_h[i];
4017 else if (reg_temp_crit[src - 1])
4018 data->reg_temp[3][src - 1]
4019 = reg_temp_crit[src - 1];
4020 if (reg_temp_crit_l && reg_temp_crit_l[i])
4021 data->reg_temp[4][src - 1] = reg_temp_crit_l[i];
4022 data->reg_temp_config[src - 1] = reg_temp_config[i];
4023 data->temp_src[src - 1] = src;
4024 continue;
4025 }
4026
4027 if (s >= NUM_TEMP)
4028 continue;
4029
4030
4031 data->have_temp |= BIT(s);
4032 data->reg_temp[0][s] = reg_temp[i];
4033 data->reg_temp[1][s] = reg_temp_over[i];
4034 data->reg_temp[2][s] = reg_temp_hyst[i];
4035 data->reg_temp_config[s] = reg_temp_config[i];
4036 if (reg_temp_crit_h && reg_temp_crit_h[i])
4037 data->reg_temp[3][s] = reg_temp_crit_h[i];
4038 else if (reg_temp_crit[src - 1])
4039 data->reg_temp[3][s] = reg_temp_crit[src - 1];
4040 if (reg_temp_crit_l && reg_temp_crit_l[i])
4041 data->reg_temp[4][s] = reg_temp_crit_l[i];
4042
4043 data->temp_src[s] = src;
4044 s++;
4045 }
4046
4047
4048
4049
4050
4051 for (i = 0; i < num_reg_temp_mon; i++) {
4052 if (reg_temp_mon[i] == 0)
4053 continue;
4054
4055 err = nct6775_read_value(data, data->REG_TEMP_SEL[i], &src);
4056 if (err)
4057 return err;
4058 src &= 0x1f;
4059 if (!src)
4060 continue;
4061
4062 if (!(data->temp_mask & BIT(src))) {
4063 dev_info(dev,
4064 "Invalid temperature source %d at index %d, source register 0x%x, temp register 0x%x\n",
4065 src, i, data->REG_TEMP_SEL[i],
4066 reg_temp_mon[i]);
4067 continue;
4068 }
4069
4070
4071
4072
4073
4074
4075 if (!(data->virt_temp_mask & BIT(src))) {
4076 if (mask & BIT(src))
4077 continue;
4078 mask |= BIT(src);
4079 }
4080
4081
4082 if (src <= data->temp_fixed_num) {
4083 if (data->have_temp & BIT(src - 1))
4084 continue;
4085 data->have_temp |= BIT(src - 1);
4086 data->have_temp_fixed |= BIT(src - 1);
4087 data->reg_temp[0][src - 1] = reg_temp_mon[i];
4088 data->temp_src[src - 1] = src;
4089 continue;
4090 }
4091
4092 if (s >= NUM_TEMP)
4093 continue;
4094
4095
4096 data->have_temp |= BIT(s);
4097 data->reg_temp[0][s] = reg_temp_mon[i];
4098 data->temp_src[s] = src;
4099 s++;
4100 }
4101
4102 #ifdef USE_ALTERNATE
4103
4104
4105
4106
4107
4108
4109 for (i = 0; i < 31; i++) {
4110 if (!(data->temp_mask & BIT(i + 1)))
4111 continue;
4112 if (!reg_temp_alternate[i])
4113 continue;
4114 if (mask & BIT(i + 1))
4115 continue;
4116 if (i < data->temp_fixed_num) {
4117 if (data->have_temp & BIT(i))
4118 continue;
4119 data->have_temp |= BIT(i);
4120 data->have_temp_fixed |= BIT(i);
4121 data->reg_temp[0][i] = reg_temp_alternate[i];
4122 if (i < num_reg_temp) {
4123 data->reg_temp[1][i] = reg_temp_over[i];
4124 data->reg_temp[2][i] = reg_temp_hyst[i];
4125 }
4126 data->temp_src[i] = i + 1;
4127 continue;
4128 }
4129
4130 if (s >= NUM_TEMP)
4131 break;
4132
4133 data->have_temp |= BIT(s);
4134 data->reg_temp[0][s] = reg_temp_alternate[i];
4135 data->temp_src[s] = i + 1;
4136 s++;
4137 }
4138 #endif
4139
4140
4141 for (i = 0; i < num_reg_tsi_temp; i++) {
4142 u16 tmp;
4143
4144 err = nct6775_read_value(data, data->REG_TSI_TEMP[i], &tmp);
4145 if (err)
4146 return err;
4147 if (tmp)
4148 data->have_tsi_temp |= BIT(i);
4149 }
4150
4151
4152 err = nct6775_init_device(data);
4153 if (err)
4154 return err;
4155
4156 if (data->driver_init) {
4157 err = data->driver_init(data);
4158 if (err)
4159 return err;
4160 }
4161
4162
4163 err = nct6775_init_fan_common(dev, data);
4164 if (err)
4165 return err;
4166
4167
4168 err = nct6775_add_template_attr_group(dev, data, &nct6775_pwm_template_group,
4169 data->pwm_num);
4170 if (err)
4171 return err;
4172
4173 err = nct6775_add_template_attr_group(dev, data, &nct6775_in_template_group,
4174 fls(data->have_in));
4175 if (err)
4176 return err;
4177
4178 err = nct6775_add_template_attr_group(dev, data, &nct6775_fan_template_group,
4179 fls(data->has_fan));
4180 if (err)
4181 return err;
4182
4183 err = nct6775_add_template_attr_group(dev, data, &nct6775_temp_template_group,
4184 fls(data->have_temp));
4185 if (err)
4186 return err;
4187
4188 if (data->have_tsi_temp) {
4189 tsi_temp_tg.templates = nct6775_tsi_temp_template;
4190 tsi_temp_tg.is_visible = nct6775_tsi_temp_is_visible;
4191 tsi_temp_tg.base = fls(data->have_temp) + 1;
4192 err = nct6775_add_template_attr_group(dev, data, &tsi_temp_tg,
4193 fls(data->have_tsi_temp));
4194 if (err)
4195 return err;
4196 }
4197
4198 hwmon_dev = devm_hwmon_device_register_with_groups(dev, data->name,
4199 data, data->groups);
4200 return PTR_ERR_OR_ZERO(hwmon_dev);
4201 }
4202 EXPORT_SYMBOL_GPL(nct6775_probe);
4203
4204 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
4205 MODULE_DESCRIPTION("Core driver for NCT6775F and compatible chips");
4206 MODULE_LICENSE("GPL");