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0024 #include <linux/bits.h>
0025 #include <linux/err.h>
0026 #include <linux/hwmon.h>
0027 #include <linux/i2c.h>
0028 #include <linux/init.h>
0029 #include <linux/jiffies.h>
0030 #include <linux/module.h>
0031 #include <linux/slab.h>
0032
0033
0034
0035
0036
0037 #define MAX6620_REG_CONFIG 0x00
0038 #define MAX6620_REG_FAULT 0x01
0039 #define MAX6620_REG_CONF_FAN0 0x02
0040 #define MAX6620_REG_CONF_FAN1 0x03
0041 #define MAX6620_REG_CONF_FAN2 0x04
0042 #define MAX6620_REG_CONF_FAN3 0x05
0043 #define MAX6620_REG_DYN_FAN0 0x06
0044 #define MAX6620_REG_DYN_FAN1 0x07
0045 #define MAX6620_REG_DYN_FAN2 0x08
0046 #define MAX6620_REG_DYN_FAN3 0x09
0047 #define MAX6620_REG_TACH0 0x10
0048 #define MAX6620_REG_TACH1 0x12
0049 #define MAX6620_REG_TACH2 0x14
0050 #define MAX6620_REG_TACH3 0x16
0051 #define MAX6620_REG_VOLT0 0x18
0052 #define MAX6620_REG_VOLT1 0x1A
0053 #define MAX6620_REG_VOLT2 0x1C
0054 #define MAX6620_REG_VOLT3 0x1E
0055 #define MAX6620_REG_TAR0 0x20
0056 #define MAX6620_REG_TAR1 0x22
0057 #define MAX6620_REG_TAR2 0x24
0058 #define MAX6620_REG_TAR3 0x26
0059 #define MAX6620_REG_DAC0 0x28
0060 #define MAX6620_REG_DAC1 0x2A
0061 #define MAX6620_REG_DAC2 0x2C
0062 #define MAX6620_REG_DAC3 0x2E
0063
0064
0065
0066
0067
0068 #define MAX6620_CFG_RUN BIT(7)
0069 #define MAX6620_CFG_POR BIT(6)
0070 #define MAX6620_CFG_TIMEOUT BIT(5)
0071 #define MAX6620_CFG_FULLFAN BIT(4)
0072 #define MAX6620_CFG_OSC BIT(3)
0073 #define MAX6620_CFG_WD_MASK (BIT(2) | BIT(1))
0074 #define MAX6620_CFG_WD_2 BIT(1)
0075 #define MAX6620_CFG_WD_6 BIT(2)
0076 #define MAX6620_CFG_WD10 (BIT(2) | BIT(1))
0077 #define MAX6620_CFG_WD BIT(0)
0078
0079
0080
0081
0082
0083 #define MAX6620_FAIL_TACH0 BIT(4)
0084 #define MAX6620_FAIL_TACH1 BIT(5)
0085 #define MAX6620_FAIL_TACH2 BIT(6)
0086 #define MAX6620_FAIL_TACH3 BIT(7)
0087 #define MAX6620_FAIL_MASK0 BIT(0)
0088 #define MAX6620_FAIL_MASK1 BIT(1)
0089 #define MAX6620_FAIL_MASK2 BIT(2)
0090 #define MAX6620_FAIL_MASK3 BIT(3)
0091
0092 #define MAX6620_CLOCK_FREQ 8192
0093 #define MAX6620_PULSE_PER_REV 2
0094
0095
0096 #define FAN_RPM_MIN 240
0097 #define FAN_RPM_MAX 30000
0098
0099 static const u8 config_reg[] = {
0100 MAX6620_REG_CONF_FAN0,
0101 MAX6620_REG_CONF_FAN1,
0102 MAX6620_REG_CONF_FAN2,
0103 MAX6620_REG_CONF_FAN3,
0104 };
0105
0106 static const u8 dyn_reg[] = {
0107 MAX6620_REG_DYN_FAN0,
0108 MAX6620_REG_DYN_FAN1,
0109 MAX6620_REG_DYN_FAN2,
0110 MAX6620_REG_DYN_FAN3,
0111 };
0112
0113 static const u8 tach_reg[] = {
0114 MAX6620_REG_TACH0,
0115 MAX6620_REG_TACH1,
0116 MAX6620_REG_TACH2,
0117 MAX6620_REG_TACH3,
0118 };
0119
0120 static const u8 target_reg[] = {
0121 MAX6620_REG_TAR0,
0122 MAX6620_REG_TAR1,
0123 MAX6620_REG_TAR2,
0124 MAX6620_REG_TAR3,
0125 };
0126
0127
0128
0129
0130
0131 struct max6620_data {
0132 struct i2c_client *client;
0133 struct mutex update_lock;
0134 bool valid;
0135 unsigned long last_updated;
0136
0137
0138 u8 fancfg[4];
0139 u8 fandyn[4];
0140 u8 fault;
0141 u16 tach[4];
0142 u16 target[4];
0143 };
0144
0145 static u8 max6620_fan_div_from_reg(u8 val)
0146 {
0147 return BIT((val & 0xE0) >> 5);
0148 }
0149
0150 static u16 max6620_fan_rpm_to_tach(u8 div, int rpm)
0151 {
0152 return (60 * div * MAX6620_CLOCK_FREQ) / (rpm * MAX6620_PULSE_PER_REV);
0153 }
0154
0155 static int max6620_fan_tach_to_rpm(u8 div, u16 tach)
0156 {
0157 return (60 * div * MAX6620_CLOCK_FREQ) / (tach * MAX6620_PULSE_PER_REV);
0158 }
0159
0160 static int max6620_update_device(struct device *dev)
0161 {
0162 struct max6620_data *data = dev_get_drvdata(dev);
0163 struct i2c_client *client = data->client;
0164 int i;
0165 int ret = 0;
0166
0167 mutex_lock(&data->update_lock);
0168
0169 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
0170 for (i = 0; i < 4; i++) {
0171 ret = i2c_smbus_read_byte_data(client, config_reg[i]);
0172 if (ret < 0)
0173 goto error;
0174 data->fancfg[i] = ret;
0175
0176 ret = i2c_smbus_read_byte_data(client, dyn_reg[i]);
0177 if (ret < 0)
0178 goto error;
0179 data->fandyn[i] = ret;
0180
0181 ret = i2c_smbus_read_byte_data(client, tach_reg[i]);
0182 if (ret < 0)
0183 goto error;
0184 data->tach[i] = (ret << 3) & 0x7f8;
0185 ret = i2c_smbus_read_byte_data(client, tach_reg[i] + 1);
0186 if (ret < 0)
0187 goto error;
0188 data->tach[i] |= (ret >> 5) & 0x7;
0189
0190 ret = i2c_smbus_read_byte_data(client, target_reg[i]);
0191 if (ret < 0)
0192 goto error;
0193 data->target[i] = (ret << 3) & 0x7f8;
0194 ret = i2c_smbus_read_byte_data(client, target_reg[i] + 1);
0195 if (ret < 0)
0196 goto error;
0197 data->target[i] |= (ret >> 5) & 0x7;
0198 }
0199
0200
0201
0202
0203
0204
0205 ret = i2c_smbus_read_byte_data(client, MAX6620_REG_FAULT);
0206 if (ret < 0)
0207 goto error;
0208 data->fault |= (ret >> 4) & (ret & 0x0F);
0209
0210 data->last_updated = jiffies;
0211 data->valid = true;
0212 }
0213
0214 error:
0215 mutex_unlock(&data->update_lock);
0216 return ret;
0217 }
0218
0219 static umode_t
0220 max6620_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr,
0221 int channel)
0222 {
0223 switch (type) {
0224 case hwmon_fan:
0225 switch (attr) {
0226 case hwmon_fan_alarm:
0227 case hwmon_fan_input:
0228 return 0444;
0229 case hwmon_fan_div:
0230 case hwmon_fan_target:
0231 return 0644;
0232 default:
0233 break;
0234 }
0235 break;
0236 default:
0237 break;
0238 }
0239
0240 return 0;
0241 }
0242
0243 static int
0244 max6620_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
0245 int channel, long *val)
0246 {
0247 struct max6620_data *data;
0248 struct i2c_client *client;
0249 int ret;
0250 u8 div;
0251 u8 val1;
0252 u8 val2;
0253
0254 ret = max6620_update_device(dev);
0255 if (ret < 0)
0256 return ret;
0257 data = dev_get_drvdata(dev);
0258 client = data->client;
0259
0260 switch (type) {
0261 case hwmon_fan:
0262 switch (attr) {
0263 case hwmon_fan_alarm:
0264 mutex_lock(&data->update_lock);
0265 *val = !!(data->fault & BIT(channel));
0266
0267
0268 if (*val == 1) {
0269 val1 = (data->target[channel] >> 3) & 0xff;
0270 val2 = (data->target[channel] << 5) & 0xe0;
0271 ret = i2c_smbus_write_byte_data(client,
0272 target_reg[channel], val1);
0273 if (ret < 0) {
0274 mutex_unlock(&data->update_lock);
0275 return ret;
0276 }
0277 ret = i2c_smbus_write_byte_data(client,
0278 target_reg[channel] + 1, val2);
0279 if (ret < 0) {
0280 mutex_unlock(&data->update_lock);
0281 return ret;
0282 }
0283
0284 data->fault &= ~BIT(channel);
0285 }
0286 mutex_unlock(&data->update_lock);
0287
0288 break;
0289 case hwmon_fan_div:
0290 *val = max6620_fan_div_from_reg(data->fandyn[channel]);
0291 break;
0292 case hwmon_fan_input:
0293 if (data->tach[channel] == 0) {
0294 *val = 0;
0295 } else {
0296 div = max6620_fan_div_from_reg(data->fandyn[channel]);
0297 *val = max6620_fan_tach_to_rpm(div, data->tach[channel]);
0298 }
0299 break;
0300 case hwmon_fan_target:
0301 if (data->target[channel] == 0) {
0302 *val = 0;
0303 } else {
0304 div = max6620_fan_div_from_reg(data->fandyn[channel]);
0305 *val = max6620_fan_tach_to_rpm(div, data->target[channel]);
0306 }
0307 break;
0308 default:
0309 return -EOPNOTSUPP;
0310 }
0311 break;
0312
0313 default:
0314 return -EOPNOTSUPP;
0315 }
0316
0317 return 0;
0318 }
0319
0320 static int
0321 max6620_write(struct device *dev, enum hwmon_sensor_types type, u32 attr,
0322 int channel, long val)
0323 {
0324 struct max6620_data *data;
0325 struct i2c_client *client;
0326 int ret;
0327 u8 div;
0328 u16 tach;
0329 u8 val1;
0330 u8 val2;
0331
0332 ret = max6620_update_device(dev);
0333 if (ret < 0)
0334 return ret;
0335 data = dev_get_drvdata(dev);
0336 client = data->client;
0337 mutex_lock(&data->update_lock);
0338
0339 switch (type) {
0340 case hwmon_fan:
0341 switch (attr) {
0342 case hwmon_fan_div:
0343 switch (val) {
0344 case 1:
0345 div = 0;
0346 break;
0347 case 2:
0348 div = 1;
0349 break;
0350 case 4:
0351 div = 2;
0352 break;
0353 case 8:
0354 div = 3;
0355 break;
0356 case 16:
0357 div = 4;
0358 break;
0359 case 32:
0360 div = 5;
0361 break;
0362 default:
0363 ret = -EINVAL;
0364 goto error;
0365 }
0366 data->fandyn[channel] &= 0x1F;
0367 data->fandyn[channel] |= div << 5;
0368 ret = i2c_smbus_write_byte_data(client, dyn_reg[channel],
0369 data->fandyn[channel]);
0370 break;
0371 case hwmon_fan_target:
0372 val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
0373 div = max6620_fan_div_from_reg(data->fandyn[channel]);
0374 tach = max6620_fan_rpm_to_tach(div, val);
0375 val1 = (tach >> 3) & 0xff;
0376 val2 = (tach << 5) & 0xe0;
0377 ret = i2c_smbus_write_byte_data(client, target_reg[channel], val1);
0378 if (ret < 0)
0379 break;
0380 ret = i2c_smbus_write_byte_data(client, target_reg[channel] + 1, val2);
0381 if (ret < 0)
0382 break;
0383
0384
0385 data->fault &= ~BIT(channel);
0386
0387 break;
0388 default:
0389 ret = -EOPNOTSUPP;
0390 break;
0391 }
0392 break;
0393
0394 default:
0395 ret = -EOPNOTSUPP;
0396 break;
0397 }
0398
0399 error:
0400 mutex_unlock(&data->update_lock);
0401 return ret;
0402 }
0403
0404 static const struct hwmon_channel_info *max6620_info[] = {
0405 HWMON_CHANNEL_INFO(fan,
0406 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
0407 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
0408 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM,
0409 HWMON_F_INPUT | HWMON_F_DIV | HWMON_F_TARGET | HWMON_F_ALARM),
0410 NULL
0411 };
0412
0413 static const struct hwmon_ops max6620_hwmon_ops = {
0414 .read = max6620_read,
0415 .write = max6620_write,
0416 .is_visible = max6620_is_visible,
0417 };
0418
0419 static const struct hwmon_chip_info max6620_chip_info = {
0420 .ops = &max6620_hwmon_ops,
0421 .info = max6620_info,
0422 };
0423
0424 static int max6620_init_client(struct max6620_data *data)
0425 {
0426 struct i2c_client *client = data->client;
0427 int config;
0428 int err;
0429 int i;
0430 int reg;
0431
0432 config = i2c_smbus_read_byte_data(client, MAX6620_REG_CONFIG);
0433 if (config < 0) {
0434 dev_err(&client->dev, "Error reading config, aborting.\n");
0435 return config;
0436 }
0437
0438
0439
0440
0441
0442 err = i2c_smbus_write_byte_data(client, MAX6620_REG_CONFIG, config | 0x10);
0443 if (err < 0) {
0444 dev_err(&client->dev, "Config write error, aborting.\n");
0445 return err;
0446 }
0447
0448 for (i = 0; i < 4; i++) {
0449 reg = i2c_smbus_read_byte_data(client, config_reg[i]);
0450 if (reg < 0)
0451 return reg;
0452 data->fancfg[i] = reg;
0453
0454
0455 data->fancfg[i] |= 0xa8;
0456 err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]);
0457 if (err < 0)
0458 return err;
0459
0460
0461 data->fandyn[i] = 0x30;
0462 err = i2c_smbus_write_byte_data(client, dyn_reg[i], data->fandyn[i]);
0463 if (err < 0)
0464 return err;
0465 }
0466 return 0;
0467 }
0468
0469 static int max6620_probe(struct i2c_client *client)
0470 {
0471 struct device *dev = &client->dev;
0472 struct max6620_data *data;
0473 struct device *hwmon_dev;
0474 int err;
0475
0476 data = devm_kzalloc(dev, sizeof(struct max6620_data), GFP_KERNEL);
0477 if (!data)
0478 return -ENOMEM;
0479
0480 data->client = client;
0481 mutex_init(&data->update_lock);
0482
0483 err = max6620_init_client(data);
0484 if (err)
0485 return err;
0486
0487 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
0488 data,
0489 &max6620_chip_info,
0490 NULL);
0491
0492 return PTR_ERR_OR_ZERO(hwmon_dev);
0493 }
0494
0495 static const struct i2c_device_id max6620_id[] = {
0496 { "max6620", 0 },
0497 { }
0498 };
0499 MODULE_DEVICE_TABLE(i2c, max6620_id);
0500
0501 static struct i2c_driver max6620_driver = {
0502 .class = I2C_CLASS_HWMON,
0503 .driver = {
0504 .name = "max6620",
0505 },
0506 .probe_new = max6620_probe,
0507 .id_table = max6620_id,
0508 };
0509
0510 module_i2c_driver(max6620_driver);
0511
0512 MODULE_AUTHOR("Lucas Grunenberg");
0513 MODULE_DESCRIPTION("MAX6620 sensor driver");
0514 MODULE_LICENSE("GPL");