drivers/hwmon/max31790.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * max31790.c - Part of lm_sensors, Linux kernel modules for hardware
0004  *             monitoring.
0005  *
0006  * (C) 2015 by Il Han <corone.il.han@gmail.com>
0007  */
0008
0009 #include <linux/err.h>
0010 #include <linux/hwmon.h>
0011 #include <linux/i2c.h>
0012 #include <linux/init.h>
0013 #include <linux/jiffies.h>
0014 #include <linux/module.h>
0015 #include <linux/slab.h>
0016
0017 /* MAX31790 registers */
0018 #define MAX31790_REG_GLOBAL_CONFIG  0x00
0019 #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch))
0020 #define MAX31790_REG_FAN_DYNAMICS(ch)   (0x08 + (ch))
0021 #define MAX31790_REG_FAN_FAULT_STATUS2  0x10
0022 #define MAX31790_REG_FAN_FAULT_STATUS1  0x11
0023 #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2)
0024 #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2)
0025 #define MAX31790_REG_PWMOUT(ch)     (0x40 + (ch) * 2)
0026 #define MAX31790_REG_TARGET_COUNT(ch)   (0x50 + (ch) * 2)
0027
0028 /* Fan Config register bits */
0029 #define MAX31790_FAN_CFG_RPM_MODE   0x80
0030 #define MAX31790_FAN_CFG_CTRL_MON   0x10
0031 #define MAX31790_FAN_CFG_TACH_INPUT_EN  0x08
0032 #define MAX31790_FAN_CFG_TACH_INPUT 0x01
0033
0034 /* Fan Dynamics register bits */
0035 #define MAX31790_FAN_DYN_SR_SHIFT   5
0036 #define MAX31790_FAN_DYN_SR_MASK    0xE0
0037 #define SR_FROM_REG(reg)        (((reg) & MAX31790_FAN_DYN_SR_MASK) \
0038                      >> MAX31790_FAN_DYN_SR_SHIFT)
0039
0040 #define FAN_RPM_MIN         120
0041 #define FAN_RPM_MAX         7864320
0042
0043 #define FAN_COUNT_REG_MAX       0xffe0
0044
0045 #define RPM_FROM_REG(reg, sr)       (((reg) >> 4) ? \
0046                      ((60 * (sr) * 8192) / ((reg) >> 4)) : \
0047                      FAN_RPM_MAX)
0048 #define RPM_TO_REG(rpm, sr)     ((60 * (sr) * 8192) / ((rpm) * 2))
0049
0050 #define NR_CHANNEL          6
0051
0052 /*
0053  * Client data (each client gets its own)
0054  */
0055 struct max31790_data {
0056     struct i2c_client *client;
0057     struct mutex update_lock;
0058     bool valid; /* zero until following fields are valid */
0059     unsigned long last_updated; /* in jiffies */
0060
0061     /* register values */
0062     u8 fan_config[NR_CHANNEL];
0063     u8 fan_dynamics[NR_CHANNEL];
0064     u16 fault_status;
0065     u16 tach[NR_CHANNEL * 2];
0066     u16 pwm[NR_CHANNEL];
0067     u16 target_count[NR_CHANNEL];
0068 };
0069
0070 static struct max31790_data *max31790_update_device(struct device *dev)
0071 {
0072     struct max31790_data *data = dev_get_drvdata(dev);
0073     struct i2c_client *client = data->client;
0074     struct max31790_data *ret = data;
0075     int i;
0076     int rv;
0077
0078     mutex_lock(&data->update_lock);
0079
0080     if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
0081         rv = i2c_smbus_read_byte_data(client,
0082                 MAX31790_REG_FAN_FAULT_STATUS1);
0083         if (rv < 0)
0084             goto abort;
0085         data->fault_status |= rv & 0x3F;
0086
0087         rv = i2c_smbus_read_byte_data(client,
0088                 MAX31790_REG_FAN_FAULT_STATUS2);
0089         if (rv < 0)
0090             goto abort;
0091         data->fault_status |= (rv & 0x3F) << 6;
0092
0093         for (i = 0; i < NR_CHANNEL; i++) {
0094             rv = i2c_smbus_read_word_swapped(client,
0095                     MAX31790_REG_TACH_COUNT(i));
0096             if (rv < 0)
0097                 goto abort;
0098             data->tach[i] = rv;
0099
0100             if (data->fan_config[i]
0101                 & MAX31790_FAN_CFG_TACH_INPUT) {
0102                 rv = i2c_smbus_read_word_swapped(client,
0103                     MAX31790_REG_TACH_COUNT(NR_CHANNEL
0104                                 + i));
0105                 if (rv < 0)
0106                     goto abort;
0107                 data->tach[NR_CHANNEL + i] = rv;
0108             } else {
0109                 rv = i2c_smbus_read_word_swapped(client,
0110                         MAX31790_REG_PWM_DUTY_CYCLE(i));
0111                 if (rv < 0)
0112                     goto abort;
0113                 data->pwm[i] = rv;
0114
0115                 rv = i2c_smbus_read_word_swapped(client,
0116                         MAX31790_REG_TARGET_COUNT(i));
0117                 if (rv < 0)
0118                     goto abort;
0119                 data->target_count[i] = rv;
0120             }
0121         }
0122
0123         data->last_updated = jiffies;
0124         data->valid = true;
0125     }
0126     goto done;
0127
0128 abort:
0129     data->valid = false;
0130     ret = ERR_PTR(rv);
0131
0132 done:
0133     mutex_unlock(&data->update_lock);
0134
0135     return ret;
0136 }
0137
0138 static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 };
0139
0140 static u8 get_tach_period(u8 fan_dynamics)
0141 {
0142     return tach_period[SR_FROM_REG(fan_dynamics)];
0143 }
0144
0145 static u8 bits_for_tach_period(int rpm)
0146 {
0147     u8 bits;
0148
0149     if (rpm < 500)
0150         bits = 0x0;
0151     else if (rpm < 1000)
0152         bits = 0x1;
0153     else if (rpm < 2000)
0154         bits = 0x2;
0155     else if (rpm < 4000)
0156         bits = 0x3;
0157     else if (rpm < 8000)
0158         bits = 0x4;
0159     else
0160         bits = 0x5;
0161
0162     return bits;
0163 }
0164
0165 static int max31790_read_fan(struct device *dev, u32 attr, int channel,
0166                  long *val)
0167 {
0168     struct max31790_data *data = max31790_update_device(dev);
0169     int sr, rpm;
0170
0171     if (IS_ERR(data))
0172         return PTR_ERR(data);
0173
0174     switch (attr) {
0175     case hwmon_fan_input:
0176         sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]);
0177         if (data->tach[channel] == FAN_COUNT_REG_MAX)
0178             rpm = 0;
0179         else
0180             rpm = RPM_FROM_REG(data->tach[channel], sr);
0181         *val = rpm;
0182         return 0;
0183     case hwmon_fan_target:
0184         sr = get_tach_period(data->fan_dynamics[channel]);
0185         rpm = RPM_FROM_REG(data->target_count[channel], sr);
0186         *val = rpm;
0187         return 0;
0188     case hwmon_fan_fault:
0189         mutex_lock(&data->update_lock);
0190         *val = !!(data->fault_status & (1 << channel));
0191         data->fault_status &= ~(1 << channel);
0192         /*
0193          * If a fault bit is set, we need to write into one of the fan
0194          * configuration registers to clear it. Note that this also
0195          * clears the fault for the companion channel if enabled.
0196          */
0197         if (*val) {
0198             int reg = MAX31790_REG_TARGET_COUNT(channel % NR_CHANNEL);
0199
0200             i2c_smbus_write_byte_data(data->client, reg,
0201                           data->target_count[channel % NR_CHANNEL] >> 8);
0202         }
0203         mutex_unlock(&data->update_lock);
0204         return 0;
0205     default:
0206         return -EOPNOTSUPP;
0207     }
0208 }
0209
0210 static int max31790_write_fan(struct device *dev, u32 attr, int channel,
0211                   long val)
0212 {
0213     struct max31790_data *data = dev_get_drvdata(dev);
0214     struct i2c_client *client = data->client;
0215     int target_count;
0216     int err = 0;
0217     u8 bits;
0218     int sr;
0219
0220     mutex_lock(&data->update_lock);
0221
0222     switch (attr) {
0223     case hwmon_fan_target:
0224         val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX);
0225         bits = bits_for_tach_period(val);
0226         data->fan_dynamics[channel] =
0227             ((data->fan_dynamics[channel] &
0228               ~MAX31790_FAN_DYN_SR_MASK) |
0229              (bits << MAX31790_FAN_DYN_SR_SHIFT));
0230         err = i2c_smbus_write_byte_data(client,
0231                     MAX31790_REG_FAN_DYNAMICS(channel),
0232                     data->fan_dynamics[channel]);
0233         if (err < 0)
0234             break;
0235
0236         sr = get_tach_period(data->fan_dynamics[channel]);
0237         target_count = RPM_TO_REG(val, sr);
0238         target_count = clamp_val(target_count, 0x1, 0x7FF);
0239
0240         data->target_count[channel] = target_count << 5;
0241
0242         err = i2c_smbus_write_word_swapped(client,
0243                     MAX31790_REG_TARGET_COUNT(channel),
0244                     data->target_count[channel]);
0245         break;
0246     default:
0247         err = -EOPNOTSUPP;
0248         break;
0249     }
0250
0251     mutex_unlock(&data->update_lock);
0252
0253     return err;
0254 }
0255
0256 static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel)
0257 {
0258     const struct max31790_data *data = _data;
0259     u8 fan_config = data->fan_config[channel % NR_CHANNEL];
0260
0261     switch (attr) {
0262     case hwmon_fan_input:
0263     case hwmon_fan_fault:
0264         if (channel < NR_CHANNEL ||
0265             (fan_config & MAX31790_FAN_CFG_TACH_INPUT))
0266             return 0444;
0267         return 0;
0268     case hwmon_fan_target:
0269         if (channel < NR_CHANNEL &&
0270             !(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
0271             return 0644;
0272         return 0;
0273     default:
0274         return 0;
0275     }
0276 }
0277
0278 static int max31790_read_pwm(struct device *dev, u32 attr, int channel,
0279                  long *val)
0280 {
0281     struct max31790_data *data = max31790_update_device(dev);
0282     u8 fan_config;
0283
0284     if (IS_ERR(data))
0285         return PTR_ERR(data);
0286
0287     fan_config = data->fan_config[channel];
0288
0289     switch (attr) {
0290     case hwmon_pwm_input:
0291         *val = data->pwm[channel] >> 8;
0292         return 0;
0293     case hwmon_pwm_enable:
0294         if (fan_config & MAX31790_FAN_CFG_CTRL_MON)
0295             *val = 0;
0296         else if (fan_config & MAX31790_FAN_CFG_RPM_MODE)
0297             *val = 2;
0298         else
0299             *val = 1;
0300         return 0;
0301     default:
0302         return -EOPNOTSUPP;
0303     }
0304 }
0305
0306 static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
0307                   long val)
0308 {
0309     struct max31790_data *data = dev_get_drvdata(dev);
0310     struct i2c_client *client = data->client;
0311     u8 fan_config;
0312     int err = 0;
0313
0314     mutex_lock(&data->update_lock);
0315
0316     switch (attr) {
0317     case hwmon_pwm_input:
0318         if (val < 0 || val > 255) {
0319             err = -EINVAL;
0320             break;
0321         }
0322         data->valid = false;
0323         err = i2c_smbus_write_word_swapped(client,
0324                            MAX31790_REG_PWMOUT(channel),
0325                            val << 8);
0326         break;
0327     case hwmon_pwm_enable:
0328         fan_config = data->fan_config[channel];
0329         if (val == 0) {
0330             fan_config |= MAX31790_FAN_CFG_CTRL_MON;
0331             /*
0332              * Disable RPM mode; otherwise disabling fan speed
0333              * monitoring is not possible.
0334              */
0335             fan_config &= ~MAX31790_FAN_CFG_RPM_MODE;
0336         } else if (val == 1) {
0337             fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE);
0338         } else if (val == 2) {
0339             fan_config &= ~MAX31790_FAN_CFG_CTRL_MON;
0340             /*
0341              * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its
0342              * own if MAX31790_FAN_CFG_RPM_MODE is set.
0343              * Do it here as well to reflect the actual register
0344              * value in the cache.
0345              */
0346             fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN);
0347         } else {
0348             err = -EINVAL;
0349             break;
0350         }
0351         if (fan_config != data->fan_config[channel]) {
0352             err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel),
0353                             fan_config);
0354             if (!err)
0355                 data->fan_config[channel] = fan_config;
0356         }
0357         break;
0358     default:
0359         err = -EOPNOTSUPP;
0360         break;
0361     }
0362
0363     mutex_unlock(&data->update_lock);
0364
0365     return err;
0366 }
0367
0368 static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel)
0369 {
0370     const struct max31790_data *data = _data;
0371     u8 fan_config = data->fan_config[channel];
0372
0373     switch (attr) {
0374     case hwmon_pwm_input:
0375     case hwmon_pwm_enable:
0376         if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT))
0377             return 0644;
0378         return 0;
0379     default:
0380         return 0;
0381     }
0382 }
0383
0384 static int max31790_read(struct device *dev, enum hwmon_sensor_types type,
0385              u32 attr, int channel, long *val)
0386 {
0387     switch (type) {
0388     case hwmon_fan:
0389         return max31790_read_fan(dev, attr, channel, val);
0390     case hwmon_pwm:
0391         return max31790_read_pwm(dev, attr, channel, val);
0392     default:
0393         return -EOPNOTSUPP;
0394     }
0395 }
0396
0397 static int max31790_write(struct device *dev, enum hwmon_sensor_types type,
0398               u32 attr, int channel, long val)
0399 {
0400     switch (type) {
0401     case hwmon_fan:
0402         return max31790_write_fan(dev, attr, channel, val);
0403     case hwmon_pwm:
0404         return max31790_write_pwm(dev, attr, channel, val);
0405     default:
0406         return -EOPNOTSUPP;
0407     }
0408 }
0409
0410 static umode_t max31790_is_visible(const void *data,
0411                    enum hwmon_sensor_types type,
0412                    u32 attr, int channel)
0413 {
0414     switch (type) {
0415     case hwmon_fan:
0416         return max31790_fan_is_visible(data, attr, channel);
0417     case hwmon_pwm:
0418         return max31790_pwm_is_visible(data, attr, channel);
0419     default:
0420         return 0;
0421     }
0422 }
0423
0424 static const struct hwmon_channel_info *max31790_info[] = {
0425     HWMON_CHANNEL_INFO(fan,
0426                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0427                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0428                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0429                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0430                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0431                HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT,
0432                HWMON_F_INPUT | HWMON_F_FAULT,
0433                HWMON_F_INPUT | HWMON_F_FAULT,
0434                HWMON_F_INPUT | HWMON_F_FAULT,
0435                HWMON_F_INPUT | HWMON_F_FAULT,
0436                HWMON_F_INPUT | HWMON_F_FAULT,
0437                HWMON_F_INPUT | HWMON_F_FAULT),
0438     HWMON_CHANNEL_INFO(pwm,
0439                HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
0440                HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
0441                HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
0442                HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
0443                HWMON_PWM_INPUT | HWMON_PWM_ENABLE,
0444                HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
0445     NULL
0446 };
0447
0448 static const struct hwmon_ops max31790_hwmon_ops = {
0449     .is_visible = max31790_is_visible,
0450     .read = max31790_read,
0451     .write = max31790_write,
0452 };
0453
0454 static const struct hwmon_chip_info max31790_chip_info = {
0455     .ops = &max31790_hwmon_ops,
0456     .info = max31790_info,
0457 };
0458
0459 static int max31790_init_client(struct i2c_client *client,
0460                 struct max31790_data *data)
0461 {
0462     int i, rv;
0463
0464     for (i = 0; i < NR_CHANNEL; i++) {
0465         rv = i2c_smbus_read_byte_data(client,
0466                 MAX31790_REG_FAN_CONFIG(i));
0467         if (rv < 0)
0468             return rv;
0469         data->fan_config[i] = rv;
0470
0471         rv = i2c_smbus_read_byte_data(client,
0472                 MAX31790_REG_FAN_DYNAMICS(i));
0473         if (rv < 0)
0474             return rv;
0475         data->fan_dynamics[i] = rv;
0476     }
0477
0478     return 0;
0479 }
0480
0481 static int max31790_probe(struct i2c_client *client)
0482 {
0483     struct i2c_adapter *adapter = client->adapter;
0484     struct device *dev = &client->dev;
0485     struct max31790_data *data;
0486     struct device *hwmon_dev;
0487     int err;
0488
0489     if (!i2c_check_functionality(adapter,
0490             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
0491         return -ENODEV;
0492
0493     data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL);
0494     if (!data)
0495         return -ENOMEM;
0496
0497     data->client = client;
0498     mutex_init(&data->update_lock);
0499
0500     /*
0501      * Initialize the max31790 chip
0502      */
0503     err = max31790_init_client(client, data);
0504     if (err)
0505         return err;
0506
0507     hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
0508                              data,
0509                              &max31790_chip_info,
0510                              NULL);
0511
0512     return PTR_ERR_OR_ZERO(hwmon_dev);
0513 }
0514
0515 static const struct i2c_device_id max31790_id[] = {
0516     { "max31790", 0 },
0517     { }
0518 };
0519 MODULE_DEVICE_TABLE(i2c, max31790_id);
0520
0521 static struct i2c_driver max31790_driver = {
0522     .class      = I2C_CLASS_HWMON,
0523     .probe_new  = max31790_probe,
0524     .driver = {
0525         .name   = "max31790",
0526     },
0527     .id_table   = max31790_id,
0528 };
0529
0530 module_i2c_driver(max31790_driver);
0531
0532 MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>");
0533 MODULE_DESCRIPTION("MAX31790 sensor driver");
0534 MODULE_LICENSE("GPL");