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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
0004  *          monitoring
0005  * Copyright (C) 2003-2010  Jean Delvare <jdelvare@suse.de>
0006  *
0007  * Based on the lm83 driver. The LM90 is a sensor chip made by National
0008  * Semiconductor. It reports up to two temperatures (its own plus up to
0009  * one external one) with a 0.125 deg resolution (1 deg for local
0010  * temperature) and a 3-4 deg accuracy.
0011  *
0012  * This driver also supports the LM89 and LM99, two other sensor chips
0013  * made by National Semiconductor. Both have an increased remote
0014  * temperature measurement accuracy (1 degree), and the LM99
0015  * additionally shifts remote temperatures (measured and limits) by 16
0016  * degrees, which allows for higher temperatures measurement.
0017  * Note that there is no way to differentiate between both chips.
0018  * When device is auto-detected, the driver will assume an LM99.
0019  *
0020  * This driver also supports the LM86, another sensor chip made by
0021  * National Semiconductor. It is exactly similar to the LM90 except it
0022  * has a higher accuracy.
0023  *
0024  * This driver also supports the ADM1032, a sensor chip made by Analog
0025  * Devices. That chip is similar to the LM90, with a few differences
0026  * that are not handled by this driver. Among others, it has a higher
0027  * accuracy than the LM90, much like the LM86 does.
0028  *
0029  * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
0030  * chips made by Maxim. These chips are similar to the LM86.
0031  * Note that there is no easy way to differentiate between the three
0032  * variants. We use the device address to detect MAX6659, which will result
0033  * in a detection as max6657 if it is on address 0x4c. The extra address
0034  * and features of the MAX6659 are only supported if the chip is configured
0035  * explicitly as max6659, or if its address is not 0x4c.
0036  * These chips lack the remote temperature offset feature.
0037  *
0038  * This driver also supports the MAX6654 chip made by Maxim. This chip can be
0039  * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
0040  * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
0041  * limits. Extended range is available by setting the configuration register
0042  * accordingly, and is done during initialization. Extended precision is only
0043  * available at conversion rates of 1 Hz and slower. Note that extended
0044  * precision is not enabled by default, as this driver initializes all chips
0045  * to 2 Hz by design. The driver also supports MAX6690, which is practically
0046  * identical to MAX6654.
0047  *
0048  * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
0049  * MAX6692 chips made by Maxim.  These are again similar to the LM86,
0050  * but they use unsigned temperature values and can report temperatures
0051  * from 0 to 145 degrees.
0052  *
0053  * This driver also supports the MAX6680 and MAX6681, two other sensor
0054  * chips made by Maxim. These are quite similar to the other Maxim
0055  * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
0056  * be treated identically.
0057  *
0058  * This driver also supports the MAX6695 and MAX6696, two other sensor
0059  * chips made by Maxim. These are also quite similar to other Maxim
0060  * chips, but support three temperature sensors instead of two. MAX6695
0061  * and MAX6696 only differ in the pinout so they can be treated identically.
0062  *
0063  * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
0064  * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
0065  * and extended mode. They are mostly compatible with LM90 except for a data
0066  * format difference for the temperature value registers.
0067  *
0068  * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
0069  * / ON Semiconductor. The chips are similar to ADT7461 but support two external
0070  * temperature sensors.
0071  *
0072  * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
0073  * The chips are similar to ADT7461/ADT7461A but have full PEC support
0074  * (undocumented).
0075  *
0076  * This driver also supports the SA56004 from Philips. This device is
0077  * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
0078  *
0079  * This driver also supports the G781 from GMT. This device is compatible
0080  * with the ADM1032.
0081  *
0082  * This driver also supports TMP451 and TMP461 from Texas Instruments.
0083  * Those devices are supported in both compatibility and extended mode.
0084  * They are mostly compatible with ADT7461 except for local temperature
0085  * low byte register and max conversion rate.
0086  *
0087  * This driver also supports MAX1617 and various clones such as G767
0088  * and NE1617. Such clones will be detected as MAX1617.
0089  *
0090  * This driver also supports NE1618 from Philips. It is similar to NE1617
0091  * but supports 11 bit external temperature values.
0092  *
0093  * Since the LM90 was the first chipset supported by this driver, most
0094  * comments will refer to this chipset, but are actually general and
0095  * concern all supported chipsets, unless mentioned otherwise.
0096  */
0097 
0098 #include <linux/bits.h>
0099 #include <linux/device.h>
0100 #include <linux/err.h>
0101 #include <linux/i2c.h>
0102 #include <linux/init.h>
0103 #include <linux/interrupt.h>
0104 #include <linux/jiffies.h>
0105 #include <linux/hwmon.h>
0106 #include <linux/module.h>
0107 #include <linux/mutex.h>
0108 #include <linux/of_device.h>
0109 #include <linux/regulator/consumer.h>
0110 #include <linux/slab.h>
0111 #include <linux/workqueue.h>
0112 
0113 /* The maximum number of channels currently supported */
0114 #define MAX_CHANNELS    3
0115 
0116 /*
0117  * Addresses to scan
0118  * Address is fully defined internally and cannot be changed except for
0119  * MAX6659, MAX6680 and MAX6681.
0120  * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
0121  * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
0122  * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
0123  * have address 0x4d.
0124  * MAX6647 has address 0x4e.
0125  * MAX6659 can have address 0x4c, 0x4d or 0x4e.
0126  * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
0127  * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
0128  * SA56004 can have address 0x48 through 0x4F.
0129  */
0130 
0131 static const unsigned short normal_i2c[] = {
0132     0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
0133     0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
0134 
0135 enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
0136     g781, lm84, lm90, lm99,
0137     max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
0138     nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,
0139 };
0140 
0141 /*
0142  * The LM90 registers
0143  */
0144 
0145 #define LM90_REG_MAN_ID         0xFE
0146 #define LM90_REG_CHIP_ID        0xFF
0147 #define LM90_REG_CONFIG1        0x03
0148 #define LM90_REG_CONFIG2        0xBF
0149 #define LM90_REG_CONVRATE       0x04
0150 #define LM90_REG_STATUS         0x02
0151 #define LM90_REG_LOCAL_TEMP     0x00
0152 #define LM90_REG_LOCAL_HIGH     0x05
0153 #define LM90_REG_LOCAL_LOW      0x06
0154 #define LM90_REG_LOCAL_CRIT     0x20
0155 #define LM90_REG_REMOTE_TEMPH       0x01
0156 #define LM90_REG_REMOTE_TEMPL       0x10
0157 #define LM90_REG_REMOTE_OFFSH       0x11
0158 #define LM90_REG_REMOTE_OFFSL       0x12
0159 #define LM90_REG_REMOTE_HIGHH       0x07
0160 #define LM90_REG_REMOTE_HIGHL       0x13
0161 #define LM90_REG_REMOTE_LOWH        0x08
0162 #define LM90_REG_REMOTE_LOWL        0x14
0163 #define LM90_REG_REMOTE_CRIT        0x19
0164 #define LM90_REG_TCRIT_HYST     0x21
0165 
0166 /* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
0167 
0168 #define MAX6657_REG_LOCAL_TEMPL     0x11
0169 #define MAX6696_REG_STATUS2     0x12
0170 #define MAX6659_REG_REMOTE_EMERG    0x16
0171 #define MAX6659_REG_LOCAL_EMERG     0x17
0172 
0173 /*  SA56004 registers */
0174 
0175 #define SA56004_REG_LOCAL_TEMPL     0x22
0176 
0177 #define LM90_MAX_CONVRATE_MS    16000   /* Maximum conversion rate in ms */
0178 
0179 /* TMP451/TMP461 registers */
0180 #define TMP451_REG_LOCAL_TEMPL      0x15
0181 #define TMP451_REG_CONALERT     0x22
0182 
0183 #define TMP461_REG_CHEN         0x16
0184 #define TMP461_REG_DFC          0x24
0185 
0186 /* ADT7481 registers */
0187 #define ADT7481_REG_STATUS2     0x23
0188 #define ADT7481_REG_CONFIG2     0x24
0189 
0190 #define ADT7481_REG_MAN_ID      0x3e
0191 #define ADT7481_REG_CHIP_ID     0x3d
0192 
0193 /* Device features */
0194 #define LM90_HAVE_EXTENDED_TEMP BIT(0)  /* extended temperature support */
0195 #define LM90_HAVE_OFFSET    BIT(1)  /* temperature offset register  */
0196 #define LM90_HAVE_UNSIGNED_TEMP BIT(2)  /* temperatures are unsigned    */
0197 #define LM90_HAVE_REM_LIMIT_EXT BIT(3)  /* extended remote limit    */
0198 #define LM90_HAVE_EMERGENCY BIT(4)  /* 3rd upper (emergency) limit  */
0199 #define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm      */
0200 #define LM90_HAVE_TEMP3     BIT(6)  /* 3rd temperature sensor   */
0201 #define LM90_HAVE_BROKEN_ALERT  BIT(7)  /* Broken alert         */
0202 #define LM90_PAUSE_FOR_CONFIG   BIT(8)  /* Pause conversion for config  */
0203 #define LM90_HAVE_CRIT      BIT(9)  /* Chip supports CRIT/OVERT register    */
0204 #define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped  */
0205 #define LM90_HAVE_PEC       BIT(11) /* Chip supports PEC        */
0206 #define LM90_HAVE_PARTIAL_PEC   BIT(12) /* Partial PEC support (adm1032)*/
0207 #define LM90_HAVE_ALARMS    BIT(13) /* Create 'alarms' attribute    */
0208 #define LM90_HAVE_EXT_UNSIGNED  BIT(14) /* extended unsigned temperature*/
0209 #define LM90_HAVE_LOW       BIT(15) /* low limits           */
0210 #define LM90_HAVE_CONVRATE  BIT(16) /* conversion rate      */
0211 #define LM90_HAVE_REMOTE_EXT    BIT(17) /* extended remote temperature  */
0212 #define LM90_HAVE_FAULTQUEUE    BIT(18) /* configurable samples count   */
0213 
0214 /* LM90 status */
0215 #define LM90_STATUS_LTHRM   BIT(0)  /* local THERM limit tripped */
0216 #define LM90_STATUS_RTHRM   BIT(1)  /* remote THERM limit tripped */
0217 #define LM90_STATUS_ROPEN   BIT(2)  /* remote is an open circuit */
0218 #define LM90_STATUS_RLOW    BIT(3)  /* remote low temp limit tripped */
0219 #define LM90_STATUS_RHIGH   BIT(4)  /* remote high temp limit tripped */
0220 #define LM90_STATUS_LLOW    BIT(5)  /* local low temp limit tripped */
0221 #define LM90_STATUS_LHIGH   BIT(6)  /* local high temp limit tripped */
0222 #define LM90_STATUS_BUSY    BIT(7)  /* conversion is ongoing */
0223 
0224 /* MAX6695/6696 and ADT7481 2nd status register */
0225 #define MAX6696_STATUS2_R2THRM  BIT(1)  /* remote2 THERM limit tripped */
0226 #define MAX6696_STATUS2_R2OPEN  BIT(2)  /* remote2 is an open circuit */
0227 #define MAX6696_STATUS2_R2LOW   BIT(3)  /* remote2 low temp limit tripped */
0228 #define MAX6696_STATUS2_R2HIGH  BIT(4)  /* remote2 high temp limit tripped */
0229 #define MAX6696_STATUS2_ROT2    BIT(5)  /* remote emergency limit tripped */
0230 #define MAX6696_STATUS2_R2OT2   BIT(6)  /* remote2 emergency limit tripped */
0231 #define MAX6696_STATUS2_LOT2    BIT(7)  /* local emergency limit tripped */
0232 
0233 /*
0234  * Driver data (common to all clients)
0235  */
0236 
0237 static const struct i2c_device_id lm90_id[] = {
0238     { "adm1020", max1617 },
0239     { "adm1021", max1617 },
0240     { "adm1023", adm1023 },
0241     { "adm1032", adm1032 },
0242     { "adt7421", adt7461a },
0243     { "adt7461", adt7461 },
0244     { "adt7461a", adt7461a },
0245     { "adt7481", adt7481 },
0246     { "adt7482", adt7481 },
0247     { "adt7483a", adt7481 },
0248     { "g781", g781 },
0249     { "gl523sm", max1617 },
0250     { "lm84", lm84 },
0251     { "lm86", lm90 },
0252     { "lm89", lm90 },
0253     { "lm90", lm90 },
0254     { "lm99", lm99 },
0255     { "max1617", max1617 },
0256     { "max6642", max6642 },
0257     { "max6646", max6646 },
0258     { "max6647", max6646 },
0259     { "max6648", max6648 },
0260     { "max6649", max6646 },
0261     { "max6654", max6654 },
0262     { "max6657", max6657 },
0263     { "max6658", max6657 },
0264     { "max6659", max6659 },
0265     { "max6680", max6680 },
0266     { "max6681", max6680 },
0267     { "max6690", max6654 },
0268     { "max6692", max6648 },
0269     { "max6695", max6696 },
0270     { "max6696", max6696 },
0271     { "mc1066", max1617 },
0272     { "nct1008", adt7461a },
0273     { "nct210", nct210 },
0274     { "nct214", nct72 },
0275     { "nct218", nct72 },
0276     { "nct72", nct72 },
0277     { "ne1618", ne1618 },
0278     { "w83l771", w83l771 },
0279     { "sa56004", sa56004 },
0280     { "thmc10", max1617 },
0281     { "tmp451", tmp451 },
0282     { "tmp461", tmp461 },
0283     { }
0284 };
0285 MODULE_DEVICE_TABLE(i2c, lm90_id);
0286 
0287 static const struct of_device_id __maybe_unused lm90_of_match[] = {
0288     {
0289         .compatible = "adi,adm1032",
0290         .data = (void *)adm1032
0291     },
0292     {
0293         .compatible = "adi,adt7461",
0294         .data = (void *)adt7461
0295     },
0296     {
0297         .compatible = "adi,adt7461a",
0298         .data = (void *)adt7461a
0299     },
0300     {
0301         .compatible = "adi,adt7481",
0302         .data = (void *)adt7481
0303     },
0304     {
0305         .compatible = "gmt,g781",
0306         .data = (void *)g781
0307     },
0308     {
0309         .compatible = "national,lm90",
0310         .data = (void *)lm90
0311     },
0312     {
0313         .compatible = "national,lm86",
0314         .data = (void *)lm90
0315     },
0316     {
0317         .compatible = "national,lm89",
0318         .data = (void *)lm90
0319     },
0320     {
0321         .compatible = "national,lm99",
0322         .data = (void *)lm99
0323     },
0324     {
0325         .compatible = "dallas,max6646",
0326         .data = (void *)max6646
0327     },
0328     {
0329         .compatible = "dallas,max6647",
0330         .data = (void *)max6646
0331     },
0332     {
0333         .compatible = "dallas,max6649",
0334         .data = (void *)max6646
0335     },
0336     {
0337         .compatible = "dallas,max6654",
0338         .data = (void *)max6654
0339     },
0340     {
0341         .compatible = "dallas,max6657",
0342         .data = (void *)max6657
0343     },
0344     {
0345         .compatible = "dallas,max6658",
0346         .data = (void *)max6657
0347     },
0348     {
0349         .compatible = "dallas,max6659",
0350         .data = (void *)max6659
0351     },
0352     {
0353         .compatible = "dallas,max6680",
0354         .data = (void *)max6680
0355     },
0356     {
0357         .compatible = "dallas,max6681",
0358         .data = (void *)max6680
0359     },
0360     {
0361         .compatible = "dallas,max6695",
0362         .data = (void *)max6696
0363     },
0364     {
0365         .compatible = "dallas,max6696",
0366         .data = (void *)max6696
0367     },
0368     {
0369         .compatible = "onnn,nct1008",
0370         .data = (void *)adt7461a
0371     },
0372     {
0373         .compatible = "onnn,nct214",
0374         .data = (void *)nct72
0375     },
0376     {
0377         .compatible = "onnn,nct218",
0378         .data = (void *)nct72
0379     },
0380     {
0381         .compatible = "onnn,nct72",
0382         .data = (void *)nct72
0383     },
0384     {
0385         .compatible = "winbond,w83l771",
0386         .data = (void *)w83l771
0387     },
0388     {
0389         .compatible = "nxp,sa56004",
0390         .data = (void *)sa56004
0391     },
0392     {
0393         .compatible = "ti,tmp451",
0394         .data = (void *)tmp451
0395     },
0396     {
0397         .compatible = "ti,tmp461",
0398         .data = (void *)tmp461
0399     },
0400     { },
0401 };
0402 MODULE_DEVICE_TABLE(of, lm90_of_match);
0403 
0404 /*
0405  * chip type specific parameters
0406  */
0407 struct lm90_params {
0408     u32 flags;      /* Capabilities */
0409     u16 alert_alarms;   /* Which alarm bits trigger ALERT# */
0410                 /* Upper 8 bits for max6695/96 */
0411     u8 max_convrate;    /* Maximum conversion rate register value */
0412     u8 resolution;      /* 16-bit resolution (default 11 bit) */
0413     u8 reg_status2;     /* 2nd status register (optional) */
0414     u8 reg_local_ext;   /* Extended local temp register (optional) */
0415     u8 faultqueue_mask; /* fault queue bit mask */
0416     u8 faultqueue_depth;    /* fault queue depth if mask is used */
0417 };
0418 
0419 static const struct lm90_params lm90_params[] = {
0420     [adm1023] = {
0421         .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
0422           | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0423           | LM90_HAVE_REMOTE_EXT,
0424         .alert_alarms = 0x7c,
0425         .resolution = 8,
0426         .max_convrate = 7,
0427     },
0428     [adm1032] = {
0429         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0430           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
0431           | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
0432           | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0433           | LM90_HAVE_FAULTQUEUE,
0434         .alert_alarms = 0x7c,
0435         .max_convrate = 10,
0436     },
0437     [adt7461] = {
0438         /*
0439          * Standard temperature range is supposed to be unsigned,
0440          * but that does not match reality. Negative temperatures
0441          * are always reported.
0442          */
0443         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0444           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
0445           | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
0446           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0447           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0448         .alert_alarms = 0x7c,
0449         .max_convrate = 10,
0450         .resolution = 10,
0451     },
0452     [adt7461a] = {
0453         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0454           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
0455           | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
0456           | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0457           | LM90_HAVE_FAULTQUEUE,
0458         .alert_alarms = 0x7c,
0459         .max_convrate = 10,
0460     },
0461     [adt7481] = {
0462         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0463           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
0464           | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
0465           | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
0466           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0467           | LM90_HAVE_FAULTQUEUE,
0468         .alert_alarms = 0x1c7c,
0469         .max_convrate = 11,
0470         .resolution = 10,
0471         .reg_status2 = ADT7481_REG_STATUS2,
0472     },
0473     [g781] = {
0474         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0475           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
0476           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0477           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0478         .alert_alarms = 0x7c,
0479         .max_convrate = 7,
0480     },
0481     [lm84] = {
0482         .flags = LM90_HAVE_ALARMS,
0483         .resolution = 8,
0484     },
0485     [lm90] = {
0486         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0487           | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
0488           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0489           | LM90_HAVE_FAULTQUEUE,
0490         .alert_alarms = 0x7b,
0491         .max_convrate = 9,
0492         .faultqueue_mask = BIT(0),
0493         .faultqueue_depth = 3,
0494     },
0495     [lm99] = {
0496         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0497           | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
0498           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0499           | LM90_HAVE_FAULTQUEUE,
0500         .alert_alarms = 0x7b,
0501         .max_convrate = 9,
0502         .faultqueue_mask = BIT(0),
0503         .faultqueue_depth = 3,
0504     },
0505     [max1617] = {
0506         .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
0507           LM90_HAVE_LOW | LM90_HAVE_ALARMS,
0508         .alert_alarms = 0x78,
0509         .resolution = 8,
0510         .max_convrate = 7,
0511     },
0512     [max6642] = {
0513         .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
0514           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0515         .alert_alarms = 0x50,
0516         .resolution = 10,
0517         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0518         .faultqueue_mask = BIT(4),
0519         .faultqueue_depth = 2,
0520     },
0521     [max6646] = {
0522         .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
0523           | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
0524           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
0525         .alert_alarms = 0x7c,
0526         .max_convrate = 6,
0527         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0528     },
0529     [max6648] = {
0530         .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
0531           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
0532           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
0533         .alert_alarms = 0x7c,
0534         .max_convrate = 6,
0535         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0536     },
0537     [max6654] = {
0538         .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
0539           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
0540         .alert_alarms = 0x7c,
0541         .max_convrate = 7,
0542         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0543     },
0544     [max6657] = {
0545         .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
0546           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0547           | LM90_HAVE_REMOTE_EXT,
0548         .alert_alarms = 0x7c,
0549         .max_convrate = 8,
0550         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0551     },
0552     [max6659] = {
0553         .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
0554           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0555           | LM90_HAVE_REMOTE_EXT,
0556         .alert_alarms = 0x7c,
0557         .max_convrate = 8,
0558         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0559     },
0560     [max6680] = {
0561         /*
0562          * Apparent temperatures of 128 degrees C or higher are reported
0563          * and treated as negative temperatures (meaning min_alarm will
0564          * be set).
0565          */
0566         .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
0567           | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
0568           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0569           | LM90_HAVE_REMOTE_EXT,
0570         .alert_alarms = 0x7c,
0571         .max_convrate = 7,
0572     },
0573     [max6696] = {
0574         .flags = LM90_HAVE_EMERGENCY
0575           | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
0576           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0577           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0578         .alert_alarms = 0x1c7c,
0579         .max_convrate = 6,
0580         .reg_status2 = MAX6696_REG_STATUS2,
0581         .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
0582         .faultqueue_mask = BIT(5),
0583         .faultqueue_depth = 4,
0584     },
0585     [nct72] = {
0586         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0587           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
0588           | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
0589           | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
0590           | LM90_HAVE_FAULTQUEUE,
0591         .alert_alarms = 0x7c,
0592         .max_convrate = 10,
0593         .resolution = 10,
0594     },
0595     [nct210] = {
0596         .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
0597           | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0598           | LM90_HAVE_REMOTE_EXT,
0599         .alert_alarms = 0x7c,
0600         .resolution = 11,
0601         .max_convrate = 7,
0602     },
0603     [ne1618] = {
0604         .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
0605           | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
0606         .alert_alarms = 0x7c,
0607         .resolution = 11,
0608         .max_convrate = 7,
0609     },
0610     [w83l771] = {
0611         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
0612           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0613           | LM90_HAVE_REMOTE_EXT,
0614         .alert_alarms = 0x7c,
0615         .max_convrate = 8,
0616     },
0617     [sa56004] = {
0618         /*
0619          * Apparent temperatures of 128 degrees C or higher are reported
0620          * and treated as negative temperatures (meaning min_alarm will
0621          * be set).
0622          */
0623         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
0624           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0625           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0626         .alert_alarms = 0x7b,
0627         .max_convrate = 9,
0628         .reg_local_ext = SA56004_REG_LOCAL_TEMPL,
0629         .faultqueue_mask = BIT(0),
0630         .faultqueue_depth = 3,
0631     },
0632     [tmp451] = {
0633         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0634           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
0635           | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
0636           | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0637         .alert_alarms = 0x7c,
0638         .max_convrate = 9,
0639         .resolution = 12,
0640         .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
0641     },
0642     [tmp461] = {
0643         .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
0644           | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
0645           | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
0646           | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
0647         .alert_alarms = 0x7c,
0648         .max_convrate = 9,
0649         .resolution = 12,
0650         .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
0651     },
0652 };
0653 
0654 /*
0655  * temperature register index
0656  */
0657 enum lm90_temp_reg_index {
0658     LOCAL_LOW = 0,
0659     LOCAL_HIGH,
0660     LOCAL_CRIT,
0661     REMOTE_CRIT,
0662     LOCAL_EMERG,    /* max6659 and max6695/96 */
0663     REMOTE_EMERG,   /* max6659 and max6695/96 */
0664     REMOTE2_CRIT,   /* max6695/96 only */
0665     REMOTE2_EMERG,  /* max6695/96 only */
0666 
0667     REMOTE_TEMP,
0668     REMOTE_LOW,
0669     REMOTE_HIGH,
0670     REMOTE_OFFSET,  /* except max6646, max6657/58/59, and max6695/96 */
0671     LOCAL_TEMP,
0672     REMOTE2_TEMP,   /* max6695/96 only */
0673     REMOTE2_LOW,    /* max6695/96 only */
0674     REMOTE2_HIGH,   /* max6695/96 only */
0675     REMOTE2_OFFSET,
0676 
0677     TEMP_REG_NUM
0678 };
0679 
0680 /*
0681  * Client data (each client gets its own)
0682  */
0683 
0684 struct lm90_data {
0685     struct i2c_client *client;
0686     struct device *hwmon_dev;
0687     u32 chip_config[2];
0688     u32 channel_config[MAX_CHANNELS + 1];
0689     const char *channel_label[MAX_CHANNELS];
0690     struct hwmon_channel_info chip_info;
0691     struct hwmon_channel_info temp_info;
0692     const struct hwmon_channel_info *info[3];
0693     struct hwmon_chip_info chip;
0694     struct mutex update_lock;
0695     struct delayed_work alert_work;
0696     struct work_struct report_work;
0697     bool valid;     /* true if register values are valid */
0698     bool alarms_valid;  /* true if status register values are valid */
0699     unsigned long last_updated; /* in jiffies */
0700     unsigned long alarms_updated; /* in jiffies */
0701     int kind;
0702     u32 flags;
0703 
0704     unsigned int update_interval; /* in milliseconds */
0705 
0706     u8 config;      /* Current configuration register value */
0707     u8 config_orig;     /* Original configuration register value */
0708     u8 convrate_orig;   /* Original conversion rate register value */
0709     u8 resolution;      /* temperature resolution in bit */
0710     u16 alert_alarms;   /* Which alarm bits trigger ALERT# */
0711                 /* Upper 8 bits for max6695/96 */
0712     u8 max_convrate;    /* Maximum conversion rate */
0713     u8 reg_status2;     /* 2nd status register (optional) */
0714     u8 reg_local_ext;   /* local extension register offset */
0715     u8 reg_remote_ext;  /* remote temperature low byte */
0716     u8 faultqueue_mask; /* fault queue mask */
0717     u8 faultqueue_depth;    /* fault queue mask */
0718 
0719     /* registers values */
0720     u16 temp[TEMP_REG_NUM];
0721     u8 temp_hyst;
0722     u8 conalert;
0723     u16 reported_alarms;    /* alarms reported as sysfs/udev events */
0724     u16 current_alarms; /* current alarms, reported by chip */
0725     u16 alarms;     /* alarms not yet reported to user */
0726 };
0727 
0728 /*
0729  * Support functions
0730  */
0731 
0732 /*
0733  * If the chip supports PEC but not on write byte transactions, we need
0734  * to explicitly ask for a transaction without PEC.
0735  */
0736 static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
0737 {
0738     return i2c_smbus_xfer(client->adapter, client->addr,
0739                   client->flags & ~I2C_CLIENT_PEC,
0740                   I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
0741 }
0742 
0743 /*
0744  * It is assumed that client->update_lock is held (unless we are in
0745  * detection or initialization steps). This matters when PEC is enabled
0746  * for chips with partial PEC support, because we don't want the address
0747  * pointer to change between the write byte and the read byte transactions.
0748  */
0749 static int lm90_read_reg(struct i2c_client *client, u8 reg)
0750 {
0751     struct lm90_data *data = i2c_get_clientdata(client);
0752     bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
0753             (data->flags & LM90_HAVE_PARTIAL_PEC);
0754     int err;
0755 
0756     if (partial_pec) {
0757         err = lm90_write_no_pec(client, reg);
0758         if (err)
0759             return err;
0760         return i2c_smbus_read_byte(client);
0761     }
0762     return i2c_smbus_read_byte_data(client, reg);
0763 }
0764 
0765 /*
0766  * Return register write address
0767  *
0768  * The write address for registers 0x03 .. 0x08 is the read address plus 6.
0769  * For other registers the write address matches the read address.
0770  */
0771 static u8 lm90_write_reg_addr(u8 reg)
0772 {
0773     if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
0774         return reg + 6;
0775     return reg;
0776 }
0777 
0778 /*
0779  * Write into LM90 register.
0780  * Convert register address to write address if needed, then execute the
0781  * operation.
0782  */
0783 static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
0784 {
0785     return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
0786 }
0787 
0788 /*
0789  * Write into 16-bit LM90 register.
0790  * Convert register addresses to write address if needed, then execute the
0791  * operation.
0792  */
0793 static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
0794 {
0795     int ret;
0796 
0797     ret = lm90_write_reg(client, regh, val >> 8);
0798     if (ret < 0 || !regl)
0799         return ret;
0800     return lm90_write_reg(client, regl, val & 0xff);
0801 }
0802 
0803 static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
0804                bool is_volatile)
0805 {
0806     int oldh, newh, l;
0807 
0808     oldh = lm90_read_reg(client, regh);
0809     if (oldh < 0)
0810         return oldh;
0811 
0812     if (!regl)
0813         return oldh << 8;
0814 
0815     l = lm90_read_reg(client, regl);
0816     if (l < 0)
0817         return l;
0818 
0819     if (!is_volatile)
0820         return (oldh << 8) | l;
0821 
0822     /*
0823      * For volatile registers we have to use a trick.
0824      * We have to read two registers to have the sensor temperature,
0825      * but we have to beware a conversion could occur between the
0826      * readings. The datasheet says we should either use
0827      * the one-shot conversion register, which we don't want to do
0828      * (disables hardware monitoring) or monitor the busy bit, which is
0829      * impossible (we can't read the values and monitor that bit at the
0830      * exact same time). So the solution used here is to read the high
0831      * the high byte again. If the new high byte matches the old one,
0832      * then we have a valid reading. Otherwise we have to read the low
0833      * byte again, and now we believe we have a correct reading.
0834      */
0835     newh = lm90_read_reg(client, regh);
0836     if (newh < 0)
0837         return newh;
0838     if (oldh != newh) {
0839         l = lm90_read_reg(client, regl);
0840         if (l < 0)
0841             return l;
0842     }
0843     return (newh << 8) | l;
0844 }
0845 
0846 static int lm90_update_confreg(struct lm90_data *data, u8 config)
0847 {
0848     if (data->config != config) {
0849         int err;
0850 
0851         err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
0852         if (err)
0853             return err;
0854         data->config = config;
0855     }
0856     return 0;
0857 }
0858 
0859 /*
0860  * client->update_lock must be held when calling this function (unless we are
0861  * in detection or initialization steps), and while a remote channel other
0862  * than channel 0 is selected. Also, calling code must make sure to re-select
0863  * external channel 0 before releasing the lock. This is necessary because
0864  * various registers have different meanings as a result of selecting a
0865  * non-default remote channel.
0866  */
0867 static int lm90_select_remote_channel(struct lm90_data *data, bool second)
0868 {
0869     u8 config = data->config & ~0x08;
0870 
0871     if (second)
0872         config |= 0x08;
0873 
0874     return lm90_update_confreg(data, config);
0875 }
0876 
0877 static int lm90_write_convrate(struct lm90_data *data, int val)
0878 {
0879     u8 config = data->config;
0880     int err;
0881 
0882     /* Save config and pause conversion */
0883     if (data->flags & LM90_PAUSE_FOR_CONFIG) {
0884         err = lm90_update_confreg(data, config | 0x40);
0885         if (err < 0)
0886             return err;
0887     }
0888 
0889     /* Set conv rate */
0890     err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
0891 
0892     /* Revert change to config */
0893     lm90_update_confreg(data, config);
0894 
0895     return err;
0896 }
0897 
0898 /*
0899  * Set conversion rate.
0900  * client->update_lock must be held when calling this function (unless we are
0901  * in detection or initialization steps).
0902  */
0903 static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
0904                  unsigned int interval)
0905 {
0906     unsigned int update_interval;
0907     int i, err;
0908 
0909     /* Shift calculations to avoid rounding errors */
0910     interval <<= 6;
0911 
0912     /* find the nearest update rate */
0913     for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
0914          i < data->max_convrate; i++, update_interval >>= 1)
0915         if (interval >= update_interval * 3 / 4)
0916             break;
0917 
0918     err = lm90_write_convrate(data, i);
0919     data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
0920     return err;
0921 }
0922 
0923 static int lm90_set_faultqueue(struct i2c_client *client,
0924                    struct lm90_data *data, int val)
0925 {
0926     int err;
0927 
0928     if (data->faultqueue_mask) {
0929         err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
0930                       data->config & ~data->faultqueue_mask :
0931                       data->config | data->faultqueue_mask);
0932     } else {
0933         static const u8 values[4] = {0, 2, 6, 0x0e};
0934 
0935         data->conalert = (data->conalert & 0xf1) | values[val - 1];
0936         err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
0937                      data->conalert);
0938     }
0939 
0940     return err;
0941 }
0942 
0943 static int lm90_update_limits(struct device *dev)
0944 {
0945     struct lm90_data *data = dev_get_drvdata(dev);
0946     struct i2c_client *client = data->client;
0947     int val;
0948 
0949     if (data->flags & LM90_HAVE_CRIT) {
0950         val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
0951         if (val < 0)
0952             return val;
0953         data->temp[LOCAL_CRIT] = val << 8;
0954 
0955         val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
0956         if (val < 0)
0957             return val;
0958         data->temp[REMOTE_CRIT] = val << 8;
0959 
0960         val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
0961         if (val < 0)
0962             return val;
0963         data->temp_hyst = val;
0964     }
0965     if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
0966         val = lm90_read_reg(client, TMP451_REG_CONALERT);
0967         if (val < 0)
0968             return val;
0969         data->conalert = val;
0970     }
0971 
0972     val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
0973               (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
0974               false);
0975     if (val < 0)
0976         return val;
0977     data->temp[REMOTE_LOW] = val;
0978 
0979     val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
0980               (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
0981               false);
0982     if (val < 0)
0983         return val;
0984     data->temp[REMOTE_HIGH] = val;
0985 
0986     if (data->flags & LM90_HAVE_OFFSET) {
0987         val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
0988                   LM90_REG_REMOTE_OFFSL, false);
0989         if (val < 0)
0990             return val;
0991         data->temp[REMOTE_OFFSET] = val;
0992     }
0993 
0994     if (data->flags & LM90_HAVE_EMERGENCY) {
0995         val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
0996         if (val < 0)
0997             return val;
0998         data->temp[LOCAL_EMERG] = val << 8;
0999 
1000         val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1001         if (val < 0)
1002             return val;
1003         data->temp[REMOTE_EMERG] = val << 8;
1004     }
1005 
1006     if (data->flags & LM90_HAVE_TEMP3) {
1007         val = lm90_select_remote_channel(data, true);
1008         if (val < 0)
1009             return val;
1010 
1011         val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1012         if (val < 0)
1013             return val;
1014         data->temp[REMOTE2_CRIT] = val << 8;
1015 
1016         if (data->flags & LM90_HAVE_EMERGENCY) {
1017             val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1018             if (val < 0)
1019                 return val;
1020             data->temp[REMOTE2_EMERG] = val << 8;
1021         }
1022 
1023         val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
1024         if (val < 0)
1025             return val;
1026         data->temp[REMOTE2_LOW] = val << 8;
1027 
1028         val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
1029         if (val < 0)
1030             return val;
1031         data->temp[REMOTE2_HIGH] = val << 8;
1032 
1033         if (data->flags & LM90_HAVE_OFFSET) {
1034             val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1035                       LM90_REG_REMOTE_OFFSL, false);
1036             if (val < 0)
1037                 return val;
1038             data->temp[REMOTE2_OFFSET] = val;
1039         }
1040 
1041         lm90_select_remote_channel(data, false);
1042     }
1043 
1044     return 0;
1045 }
1046 
1047 static void lm90_report_alarms(struct work_struct *work)
1048 {
1049     struct lm90_data *data = container_of(work, struct lm90_data, report_work);
1050     u16 cleared_alarms, new_alarms, current_alarms;
1051     struct device *hwmon_dev = data->hwmon_dev;
1052     struct device *dev = &data->client->dev;
1053     int st, st2;
1054 
1055     current_alarms = data->current_alarms;
1056     cleared_alarms = data->reported_alarms & ~current_alarms;
1057     new_alarms = current_alarms & ~data->reported_alarms;
1058 
1059     if (!cleared_alarms && !new_alarms)
1060         return;
1061 
1062     st = new_alarms & 0xff;
1063     st2 = new_alarms >> 8;
1064 
1065     if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1066         (st2 & MAX6696_STATUS2_LOT2))
1067         dev_dbg(dev, "temp%d out of range, please check!\n", 1);
1068     if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1069         (st2 & MAX6696_STATUS2_ROT2))
1070         dev_dbg(dev, "temp%d out of range, please check!\n", 2);
1071     if (st & LM90_STATUS_ROPEN)
1072         dev_dbg(dev, "temp%d diode open, please check!\n", 2);
1073     if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1074            MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1075         dev_dbg(dev, "temp%d out of range, please check!\n", 3);
1076     if (st2 & MAX6696_STATUS2_R2OPEN)
1077         dev_dbg(dev, "temp%d diode open, please check!\n", 3);
1078 
1079     st |= cleared_alarms & 0xff;
1080     st2 |= cleared_alarms >> 8;
1081 
1082     if (st & LM90_STATUS_LLOW)
1083         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
1084     if (st & LM90_STATUS_RLOW)
1085         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
1086     if (st2 & MAX6696_STATUS2_R2LOW)
1087         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
1088 
1089     if (st & LM90_STATUS_LHIGH)
1090         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
1091     if (st & LM90_STATUS_RHIGH)
1092         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
1093     if (st2 & MAX6696_STATUS2_R2HIGH)
1094         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
1095 
1096     if (st & LM90_STATUS_LTHRM)
1097         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
1098     if (st & LM90_STATUS_RTHRM)
1099         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
1100     if (st2 & MAX6696_STATUS2_R2THRM)
1101         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
1102 
1103     if (st2 & MAX6696_STATUS2_LOT2)
1104         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
1105     if (st2 & MAX6696_STATUS2_ROT2)
1106         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
1107     if (st2 & MAX6696_STATUS2_R2OT2)
1108         hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
1109 
1110     data->reported_alarms = current_alarms;
1111 }
1112 
1113 static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
1114 {
1115     if (force || !data->alarms_valid ||
1116         time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
1117         struct i2c_client *client = data->client;
1118         bool check_enable;
1119         u16 alarms;
1120         int val;
1121 
1122         data->alarms_valid = false;
1123 
1124         val = lm90_read_reg(client, LM90_REG_STATUS);
1125         if (val < 0)
1126             return val;
1127         alarms = val & ~LM90_STATUS_BUSY;
1128 
1129         if (data->reg_status2) {
1130             val = lm90_read_reg(client, data->reg_status2);
1131             if (val < 0)
1132                 return val;
1133             alarms |= val << 8;
1134         }
1135         /*
1136          * If the update is forced (called from interrupt or alert
1137          * handler) and alarm data is valid, the alarms may have been
1138          * updated after the last update interval, and the status
1139          * register may still be cleared. Only add additional alarms
1140          * in this case. Alarms will be cleared later if appropriate.
1141          */
1142         if (force && data->alarms_valid)
1143             data->current_alarms |= alarms;
1144         else
1145             data->current_alarms = alarms;
1146         data->alarms |= alarms;
1147 
1148         check_enable = (client->irq || !(data->config_orig & 0x80)) &&
1149             (data->config & 0x80);
1150 
1151         if (force || check_enable)
1152             schedule_work(&data->report_work);
1153 
1154         /*
1155          * Re-enable ALERT# output if it was originally enabled, relevant
1156          * alarms are all clear, and alerts are currently disabled.
1157          * Otherwise (re)schedule worker if needed.
1158          */
1159         if (check_enable) {
1160             if (!(data->current_alarms & data->alert_alarms)) {
1161                 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
1162                 lm90_update_confreg(data, data->config & ~0x80);
1163                 /*
1164                  * We may have been called from the update handler.
1165                  * If so, the worker, if scheduled, is no longer
1166                  * needed. Cancel it. Don't synchronize because
1167                  * it may already be running.
1168                  */
1169                 cancel_delayed_work(&data->alert_work);
1170             } else {
1171                 schedule_delayed_work(&data->alert_work,
1172                     max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
1173             }
1174         }
1175         data->alarms_updated = jiffies;
1176         data->alarms_valid = true;
1177     }
1178     return 0;
1179 }
1180 
1181 static int lm90_update_alarms(struct lm90_data *data, bool force)
1182 {
1183     int err;
1184 
1185     mutex_lock(&data->update_lock);
1186     err = lm90_update_alarms_locked(data, force);
1187     mutex_unlock(&data->update_lock);
1188 
1189     return err;
1190 }
1191 
1192 static void lm90_alert_work(struct work_struct *__work)
1193 {
1194     struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
1195     struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
1196 
1197     /* Nothing to do if alerts are enabled */
1198     if (!(data->config & 0x80))
1199         return;
1200 
1201     lm90_update_alarms(data, true);
1202 }
1203 
1204 static int lm90_update_device(struct device *dev)
1205 {
1206     struct lm90_data *data = dev_get_drvdata(dev);
1207     struct i2c_client *client = data->client;
1208     unsigned long next_update;
1209     int val;
1210 
1211     if (!data->valid) {
1212         val = lm90_update_limits(dev);
1213         if (val < 0)
1214             return val;
1215     }
1216 
1217     next_update = data->last_updated +
1218               msecs_to_jiffies(data->update_interval);
1219     if (time_after(jiffies, next_update) || !data->valid) {
1220         dev_dbg(&client->dev, "Updating lm90 data.\n");
1221 
1222         data->valid = false;
1223 
1224         val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
1225         if (val < 0)
1226             return val;
1227         data->temp[LOCAL_LOW] = val << 8;
1228 
1229         val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
1230         if (val < 0)
1231             return val;
1232         data->temp[LOCAL_HIGH] = val << 8;
1233 
1234         val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
1235                   data->reg_local_ext, true);
1236         if (val < 0)
1237             return val;
1238         data->temp[LOCAL_TEMP] = val;
1239         val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1240                   data->reg_remote_ext, true);
1241         if (val < 0)
1242             return val;
1243         data->temp[REMOTE_TEMP] = val;
1244 
1245         if (data->flags & LM90_HAVE_TEMP3) {
1246             val = lm90_select_remote_channel(data, true);
1247             if (val < 0)
1248                 return val;
1249 
1250             val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1251                       data->reg_remote_ext, true);
1252             if (val < 0) {
1253                 lm90_select_remote_channel(data, false);
1254                 return val;
1255             }
1256             data->temp[REMOTE2_TEMP] = val;
1257 
1258             lm90_select_remote_channel(data, false);
1259         }
1260 
1261         val = lm90_update_alarms_locked(data, false);
1262         if (val < 0)
1263             return val;
1264 
1265         data->last_updated = jiffies;
1266         data->valid = true;
1267     }
1268 
1269     return 0;
1270 }
1271 
1272 /* pec used for devices with PEC support */
1273 static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
1274             char *buf)
1275 {
1276     struct i2c_client *client = to_i2c_client(dev);
1277 
1278     return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
1279 }
1280 
1281 static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
1282              const char *buf, size_t count)
1283 {
1284     struct i2c_client *client = to_i2c_client(dev);
1285     long val;
1286     int err;
1287 
1288     err = kstrtol(buf, 10, &val);
1289     if (err < 0)
1290         return err;
1291 
1292     switch (val) {
1293     case 0:
1294         client->flags &= ~I2C_CLIENT_PEC;
1295         break;
1296     case 1:
1297         client->flags |= I2C_CLIENT_PEC;
1298         break;
1299     default:
1300         return -EINVAL;
1301     }
1302 
1303     return count;
1304 }
1305 
1306 static DEVICE_ATTR_RW(pec);
1307 
1308 static int lm90_temp_get_resolution(struct lm90_data *data, int index)
1309 {
1310     switch (index) {
1311     case REMOTE_TEMP:
1312         if (data->reg_remote_ext)
1313             return data->resolution;
1314         return 8;
1315     case REMOTE_OFFSET:
1316     case REMOTE2_OFFSET:
1317     case REMOTE2_TEMP:
1318         return data->resolution;
1319     case LOCAL_TEMP:
1320         if (data->reg_local_ext)
1321             return data->resolution;
1322         return 8;
1323     case REMOTE_LOW:
1324     case REMOTE_HIGH:
1325     case REMOTE2_LOW:
1326     case REMOTE2_HIGH:
1327         if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1328             return data->resolution;
1329         return 8;
1330     default:
1331         return 8;
1332     }
1333 }
1334 
1335 static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
1336 {
1337     int val;
1338 
1339     if (flags & LM90_HAVE_EXTENDED_TEMP)
1340         val = regval - 0x4000;
1341     else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
1342         val = regval;
1343     else
1344         val = (s16)regval;
1345 
1346     return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
1347 }
1348 
1349 static int lm90_get_temp(struct lm90_data *data, int index, int channel)
1350 {
1351     int temp = lm90_temp_from_reg(data->flags, data->temp[index],
1352                       lm90_temp_get_resolution(data, index));
1353 
1354     /* +16 degrees offset for remote temperature on LM99 */
1355     if (data->kind == lm99 && channel)
1356         temp += 16000;
1357 
1358     return temp;
1359 }
1360 
1361 static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
1362 {
1363     int fraction = resolution > 8 ?
1364             1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
1365 
1366     if (flags & LM90_HAVE_EXTENDED_TEMP) {
1367         val = clamp_val(val, -64000, 191000 + fraction);
1368         val += 64000;
1369     } else if (flags & LM90_HAVE_EXT_UNSIGNED) {
1370         val = clamp_val(val, 0, 255000 + fraction);
1371     } else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
1372         val = clamp_val(val, 0, 127000 + fraction);
1373     } else {
1374         val = clamp_val(val, -128000, 127000 + fraction);
1375     }
1376 
1377     return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
1378 }
1379 
1380 static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
1381 {
1382     static const u8 regs[] = {
1383         [LOCAL_LOW] = LM90_REG_LOCAL_LOW,
1384         [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
1385         [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
1386         [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
1387         [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
1388         [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
1389         [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
1390         [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
1391         [REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
1392         [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
1393         [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
1394         [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
1395     };
1396     struct i2c_client *client = data->client;
1397     u8 regh = regs[index];
1398     u8 regl = 0;
1399     int err;
1400 
1401     if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
1402         if (index == REMOTE_LOW || index == REMOTE2_LOW)
1403             regl = LM90_REG_REMOTE_LOWL;
1404         else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
1405             regl = LM90_REG_REMOTE_HIGHL;
1406     }
1407 
1408     /* +16 degrees offset for remote temperature on LM99 */
1409     if (data->kind == lm99 && channel) {
1410         /* prevent integer underflow */
1411         val = max(val, -128000l);
1412         val -= 16000;
1413     }
1414 
1415     data->temp[index] = lm90_temp_to_reg(data->flags, val,
1416                          lm90_temp_get_resolution(data, index));
1417 
1418     if (channel > 1)
1419         lm90_select_remote_channel(data, true);
1420 
1421     err = lm90_write16(client, regh, regl, data->temp[index]);
1422 
1423     if (channel > 1)
1424         lm90_select_remote_channel(data, false);
1425 
1426     return err;
1427 }
1428 
1429 static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
1430 {
1431     int temp = lm90_get_temp(data, index, channel);
1432 
1433     return temp - data->temp_hyst * 1000;
1434 }
1435 
1436 static int lm90_set_temphyst(struct lm90_data *data, long val)
1437 {
1438     int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
1439 
1440     /* prevent integer overflow/underflow */
1441     val = clamp_val(val, -128000l, 255000l);
1442     data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
1443 
1444     return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
1445 }
1446 
1447 static int lm90_get_temp_offset(struct lm90_data *data, int index)
1448 {
1449     int res = lm90_temp_get_resolution(data, index);
1450 
1451     return lm90_temp_from_reg(0, data->temp[index], res);
1452 }
1453 
1454 static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
1455 {
1456     int err;
1457 
1458     val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
1459 
1460     /* For ADT7481 we can use the same registers for remote channel 1 and 2 */
1461     if (channel > 1)
1462         lm90_select_remote_channel(data, true);
1463 
1464     err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
1465 
1466     if (channel > 1)
1467         lm90_select_remote_channel(data, false);
1468 
1469     if (err)
1470         return err;
1471 
1472     data->temp[index] = val;
1473 
1474     return 0;
1475 }
1476 
1477 static const u8 lm90_temp_index[MAX_CHANNELS] = {
1478     LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1479 };
1480 
1481 static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1482     LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1483 };
1484 
1485 static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1486     LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1487 };
1488 
1489 static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1490     LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1491 };
1492 
1493 static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1494     LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1495 };
1496 
1497 static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1498     -1, REMOTE_OFFSET, REMOTE2_OFFSET
1499 };
1500 
1501 static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
1502 static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
1503 static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
1504 static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
1505 static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
1506 static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
1507 
1508 static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1509 {
1510     struct lm90_data *data = dev_get_drvdata(dev);
1511     int err;
1512     u16 bit;
1513 
1514     mutex_lock(&data->update_lock);
1515     err = lm90_update_device(dev);
1516     mutex_unlock(&data->update_lock);
1517     if (err)
1518         return err;
1519 
1520     switch (attr) {
1521     case hwmon_temp_input:
1522         *val = lm90_get_temp(data, lm90_temp_index[channel], channel);
1523         break;
1524     case hwmon_temp_min_alarm:
1525     case hwmon_temp_max_alarm:
1526     case hwmon_temp_crit_alarm:
1527     case hwmon_temp_emergency_alarm:
1528     case hwmon_temp_fault:
1529         switch (attr) {
1530         case hwmon_temp_min_alarm:
1531             bit = lm90_min_alarm_bits[channel];
1532             break;
1533         case hwmon_temp_max_alarm:
1534             bit = lm90_max_alarm_bits[channel];
1535             break;
1536         case hwmon_temp_crit_alarm:
1537             if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1538                 bit = lm90_crit_alarm_bits_swapped[channel];
1539             else
1540                 bit = lm90_crit_alarm_bits[channel];
1541             break;
1542         case hwmon_temp_emergency_alarm:
1543             bit = lm90_emergency_alarm_bits[channel];
1544             break;
1545         case hwmon_temp_fault:
1546             bit = lm90_fault_bits[channel];
1547             break;
1548         }
1549         *val = !!(data->alarms & bit);
1550         data->alarms &= ~bit;
1551         data->alarms |= data->current_alarms;
1552         break;
1553     case hwmon_temp_min:
1554         *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
1555         break;
1556     case hwmon_temp_max:
1557         *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
1558         break;
1559     case hwmon_temp_crit:
1560         *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
1561         break;
1562     case hwmon_temp_crit_hyst:
1563         *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
1564         break;
1565     case hwmon_temp_emergency:
1566         *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
1567         break;
1568     case hwmon_temp_emergency_hyst:
1569         *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
1570         break;
1571     case hwmon_temp_offset:
1572         *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
1573         break;
1574     default:
1575         return -EOPNOTSUPP;
1576     }
1577     return 0;
1578 }
1579 
1580 static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1581 {
1582     struct lm90_data *data = dev_get_drvdata(dev);
1583     int err;
1584 
1585     mutex_lock(&data->update_lock);
1586 
1587     err = lm90_update_device(dev);
1588     if (err)
1589         goto error;
1590 
1591     switch (attr) {
1592     case hwmon_temp_min:
1593         err = lm90_set_temp(data, lm90_temp_min_index[channel],
1594                     channel, val);
1595         break;
1596     case hwmon_temp_max:
1597         err = lm90_set_temp(data, lm90_temp_max_index[channel],
1598                     channel, val);
1599         break;
1600     case hwmon_temp_crit:
1601         err = lm90_set_temp(data, lm90_temp_crit_index[channel],
1602                     channel, val);
1603         break;
1604     case hwmon_temp_crit_hyst:
1605         err = lm90_set_temphyst(data, val);
1606         break;
1607     case hwmon_temp_emergency:
1608         err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
1609                     channel, val);
1610         break;
1611     case hwmon_temp_offset:
1612         err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
1613                        channel, val);
1614         break;
1615     default:
1616         err = -EOPNOTSUPP;
1617         break;
1618     }
1619 error:
1620     mutex_unlock(&data->update_lock);
1621 
1622     return err;
1623 }
1624 
1625 static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1626 {
1627     switch (attr) {
1628     case hwmon_temp_input:
1629     case hwmon_temp_min_alarm:
1630     case hwmon_temp_max_alarm:
1631     case hwmon_temp_crit_alarm:
1632     case hwmon_temp_emergency_alarm:
1633     case hwmon_temp_emergency_hyst:
1634     case hwmon_temp_fault:
1635     case hwmon_temp_label:
1636         return 0444;
1637     case hwmon_temp_min:
1638     case hwmon_temp_max:
1639     case hwmon_temp_crit:
1640     case hwmon_temp_emergency:
1641     case hwmon_temp_offset:
1642         return 0644;
1643     case hwmon_temp_crit_hyst:
1644         if (channel == 0)
1645             return 0644;
1646         return 0444;
1647     default:
1648         return 0;
1649     }
1650 }
1651 
1652 static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1653 {
1654     struct lm90_data *data = dev_get_drvdata(dev);
1655     int err;
1656 
1657     mutex_lock(&data->update_lock);
1658     err = lm90_update_device(dev);
1659     mutex_unlock(&data->update_lock);
1660     if (err)
1661         return err;
1662 
1663     switch (attr) {
1664     case hwmon_chip_update_interval:
1665         *val = data->update_interval;
1666         break;
1667     case hwmon_chip_alarms:
1668         *val = data->alarms;
1669         break;
1670     case hwmon_chip_temp_samples:
1671         if (data->faultqueue_mask) {
1672             *val = (data->config & data->faultqueue_mask) ?
1673                 data->faultqueue_depth : 1;
1674         } else {
1675             switch (data->conalert & 0x0e) {
1676             case 0x0:
1677             default:
1678                 *val = 1;
1679                 break;
1680             case 0x2:
1681                 *val = 2;
1682                 break;
1683             case 0x6:
1684                 *val = 3;
1685                 break;
1686             case 0xe:
1687                 *val = 4;
1688                 break;
1689             }
1690         }
1691         break;
1692     default:
1693         return -EOPNOTSUPP;
1694     }
1695 
1696     return 0;
1697 }
1698 
1699 static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1700 {
1701     struct lm90_data *data = dev_get_drvdata(dev);
1702     struct i2c_client *client = data->client;
1703     int err;
1704 
1705     mutex_lock(&data->update_lock);
1706 
1707     err = lm90_update_device(dev);
1708     if (err)
1709         goto error;
1710 
1711     switch (attr) {
1712     case hwmon_chip_update_interval:
1713         err = lm90_set_convrate(client, data,
1714                     clamp_val(val, 0, 100000));
1715         break;
1716     case hwmon_chip_temp_samples:
1717         err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
1718         break;
1719     default:
1720         err = -EOPNOTSUPP;
1721         break;
1722     }
1723 error:
1724     mutex_unlock(&data->update_lock);
1725 
1726     return err;
1727 }
1728 
1729 static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1730 {
1731     switch (attr) {
1732     case hwmon_chip_update_interval:
1733     case hwmon_chip_temp_samples:
1734         return 0644;
1735     case hwmon_chip_alarms:
1736         return 0444;
1737     default:
1738         return 0;
1739     }
1740 }
1741 
1742 static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1743              u32 attr, int channel, long *val)
1744 {
1745     switch (type) {
1746     case hwmon_chip:
1747         return lm90_chip_read(dev, attr, channel, val);
1748     case hwmon_temp:
1749         return lm90_temp_read(dev, attr, channel, val);
1750     default:
1751         return -EOPNOTSUPP;
1752     }
1753 }
1754 
1755 static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
1756                 u32 attr, int channel, const char **str)
1757 {
1758     struct lm90_data *data = dev_get_drvdata(dev);
1759 
1760     *str = data->channel_label[channel];
1761 
1762     return 0;
1763 }
1764 
1765 static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1766               u32 attr, int channel, long val)
1767 {
1768     switch (type) {
1769     case hwmon_chip:
1770         return lm90_chip_write(dev, attr, channel, val);
1771     case hwmon_temp:
1772         return lm90_temp_write(dev, attr, channel, val);
1773     default:
1774         return -EOPNOTSUPP;
1775     }
1776 }
1777 
1778 static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1779                    u32 attr, int channel)
1780 {
1781     switch (type) {
1782     case hwmon_chip:
1783         return lm90_chip_is_visible(data, attr, channel);
1784     case hwmon_temp:
1785         return lm90_temp_is_visible(data, attr, channel);
1786     default:
1787         return 0;
1788     }
1789 }
1790 
1791 static const char *lm90_detect_lm84(struct i2c_client *client)
1792 {
1793     static const u8 regs[] = {
1794         LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
1795         LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
1796     };
1797     int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1798     int reg1, reg2, reg3, reg4;
1799     bool nonzero = false;
1800     u8 ff = 0xff;
1801     int i;
1802 
1803     if (status < 0 || (status & 0xab))
1804         return NULL;
1805 
1806     /*
1807      * For LM84, undefined registers return the most recent value.
1808      * Repeat several times, each time checking against a different
1809      * (presumably) existing register.
1810      */
1811     for (i = 0; i < ARRAY_SIZE(regs); i++) {
1812         reg1 = i2c_smbus_read_byte_data(client, regs[i]);
1813         reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
1814         reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1815         reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1816 
1817         if (reg1 < 0)
1818             return NULL;
1819 
1820         /* If any register has a different value, this is not an LM84 */
1821         if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
1822             return NULL;
1823 
1824         nonzero |= reg1 || reg2 || reg3 || reg4;
1825         ff &= reg1;
1826     }
1827     /*
1828      * If all registers always returned 0 or 0xff, all bets are off,
1829      * and we can not make any predictions about the chip type.
1830      */
1831     return nonzero && ff != 0xff ? "lm84" : NULL;
1832 }
1833 
1834 static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
1835 {
1836     int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1837     int llo, rlo, lhi, rhi;
1838 
1839     if (status < 0 || (status & 0x03))
1840         return NULL;
1841 
1842     if (config1 & 0x3f)
1843         return NULL;
1844 
1845     /*
1846      * Fail if unsupported registers return anything but 0xff.
1847      * The calling code already checked man_id and chip_id.
1848      * A byte read operation repeats the most recent read operation
1849      * and should also return 0xff.
1850      */
1851     if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
1852         i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
1853         i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
1854         i2c_smbus_read_byte(client) != 0xff)
1855         return NULL;
1856 
1857     llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1858     rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1859 
1860     lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
1861     rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
1862 
1863     if (llo < 0 || rlo < 0)
1864         return NULL;
1865 
1866     /*
1867      * A byte read operation repeats the most recent read and should
1868      * return the same value.
1869      */
1870     if (i2c_smbus_read_byte(client) != rhi)
1871         return NULL;
1872 
1873     /*
1874      * The following two checks are marginal since the checked values
1875      * are strictly speaking valid.
1876      */
1877 
1878     /* fail for negative high limits; this also catches read errors */
1879     if ((s8)lhi < 0 || (s8)rhi < 0)
1880         return NULL;
1881 
1882     /* fail if low limits are larger than or equal to high limits */
1883     if ((s8)llo >= lhi || (s8)rlo >= rhi)
1884         return NULL;
1885 
1886     if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1887         /*
1888          * Word read operations return 0xff in second byte
1889          */
1890         if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
1891                         0xffff)
1892             return NULL;
1893         if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
1894                         (config1 | 0xff00))
1895             return NULL;
1896         if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
1897                         (lhi | 0xff00))
1898             return NULL;
1899     }
1900 
1901     return "max1617";
1902 }
1903 
1904 static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
1905                     int config1, int convrate)
1906 {
1907     int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
1908     int address = client->addr;
1909     const char *name = NULL;
1910 
1911     if (config2 < 0)
1912         return NULL;
1913 
1914     if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
1915         return NULL;
1916 
1917     if (address != 0x4c && address != 0x4d)
1918         return NULL;
1919 
1920     switch (chip_id & 0xf0) {
1921     case 0x10:  /* LM86 */
1922         if (address == 0x4c)
1923             name = "lm86";
1924         break;
1925     case 0x20:  /* LM90 */
1926         if (address == 0x4c)
1927             name = "lm90";
1928         break;
1929     case 0x30:  /* LM89/LM99 */
1930         name = "lm99";  /* detect LM89 as LM99 */
1931         break;
1932     default:
1933         break;
1934     }
1935 
1936     return name;
1937 }
1938 
1939 static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
1940                   int convrate)
1941 {
1942     int address = client->addr;
1943     const char *name = NULL;
1944 
1945     switch (chip_id) {
1946     case 0xca:      /* NCT218 */
1947         if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
1948             convrate <= 0x0a)
1949             name = "nct218";
1950         break;
1951     default:
1952         break;
1953     }
1954     return name;
1955 }
1956 
1957 static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
1958                       int chip_id, int config1, int convrate)
1959 {
1960     int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1961     int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
1962     int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
1963     int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
1964     int address = client->addr;
1965     const char *name = NULL;
1966 
1967     if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
1968         return NULL;
1969 
1970     /*
1971      * The following chips should be detected by this function. Known
1972      * register values are listed. Registers 0x3d .. 0x3e are undocumented
1973      * for most of the chips, yet appear to return a well defined value.
1974      * Register 0xff is undocumented for some of the chips. Register 0x3f
1975      * is undocumented for all chips, but also returns a well defined value.
1976      * Values are as reported from real chips unless mentioned otherwise.
1977      * The code below checks values for registers 0x3d, 0x3e, and 0xff,
1978      * but not for register 0x3f.
1979      *
1980      * Chip         Register
1981      *      3d  3e  3f  fe  ff  Notes
1982      * ----------------------------------------------------------
1983      * adm1020  00  00  00  41  39
1984      * adm1021  00  00  00  41  03
1985      * adm1021a 00  00  00  41  3c
1986      * adm1023  00  00  00  41  3c  same as adm1021a
1987      * adm1032  00  00  00  41  42
1988      *
1989      * adt7421  21  41  04  41  04
1990      * adt7461  00  00  00  41  51
1991      * adt7461a 61  41  05  41  57
1992      * adt7481  81  41  02  41  62
1993      * adt7482  -   -   -   41  65  datasheet
1994      *      82  41  05  41  75  real chip
1995      * adt7483  83  41  04  41  94
1996      *
1997      * nct72    61  41  07  41  55
1998      * nct210   00  00  00  41  3f
1999      * nct214   61  41  08  41  5a
2000      * nct1008  -   -   -   41  57  datasheet rev. 3
2001      *      61  41  06  41  54  real chip
2002      *
2003      * nvt210   -   -   -   41  -   datasheet
2004      * nvt211   -   -   -   41  -   datasheet
2005      */
2006     switch (chip_id) {
2007     case 0x00 ... 0x03: /* ADM1021 */
2008     case 0x05 ... 0x0f:
2009         if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2010             !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2011             name = "adm1021";
2012         break;
2013     case 0x04:      /* ADT7421 (undocumented) */
2014         if (man_id2 == 0x41 && chip_id2 == 0x21 &&
2015             (address == 0x4c || address == 0x4d) &&
2016             (config1 & 0x0b) == 0x08 && convrate <= 0x0a)
2017             name = "adt7421";
2018         break;
2019     case 0x30 ... 0x38: /* ADM1021A, ADM1023 */
2020     case 0x3a ... 0x3e:
2021         /*
2022          * ADM1021A and compatible chips will be mis-detected as
2023          * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
2024          * found to have a Chip ID of 0x3c.
2025          * ADM1021A does not officially support low byte registers
2026          * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
2027          * Official support for the temperature offset high byte
2028          * register (0x11) was added to revision F of the ADM1021A
2029          * datasheet.
2030          * It is currently unknown if there is a means to distinguish
2031          * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
2032          * which differ in functionality from ADM1023.
2033          */
2034         if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2035             !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2036             name = "adm1023";
2037         break;
2038     case 0x39:      /* ADM1020 (undocumented) */
2039         if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2040             (address == 0x4c || address == 0x4d || address == 0x4e) &&
2041             !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2042             name = "adm1020";
2043         break;
2044     case 0x3f:      /* NCT210 */
2045         if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2046             !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2047             name = "nct210";
2048         break;
2049     case 0x40 ... 0x4f: /* ADM1032 */
2050         if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2051             (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
2052             convrate <= 0x0a)
2053             name = "adm1032";
2054         break;
2055     case 0x51:  /* ADT7461 */
2056         if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2057             (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2058             convrate <= 0x0a)
2059             name = "adt7461";
2060         break;
2061     case 0x54:  /* NCT1008 */
2062         if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2063             (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2064             convrate <= 0x0a)
2065             name = "nct1008";
2066         break;
2067     case 0x55:  /* NCT72 */
2068         if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2069             (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2070             convrate <= 0x0a)
2071             name = "nct72";
2072         break;
2073     case 0x57:  /* ADT7461A, NCT1008 (datasheet rev. 3) */
2074         if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2075             (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2076             convrate <= 0x0a)
2077             name = "adt7461a";
2078         break;
2079     case 0x5a:  /* NCT214 */
2080         if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2081             common_address && !(config1 & 0x1b) && convrate <= 0x0a)
2082             name = "nct214";
2083         break;
2084     case 0x62:  /* ADT7481, undocumented */
2085         if (man_id2 == 0x41 && chip_id2 == 0x81 &&
2086             (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
2087             !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
2088             name = "adt7481";
2089         }
2090         break;
2091     case 0x65:  /* ADT7482, datasheet */
2092     case 0x75:  /* ADT7482, real chip */
2093         if (man_id2 == 0x41 && chip_id2 == 0x82 &&
2094             address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
2095             convrate <= 0x0a)
2096             name = "adt7482";
2097         break;
2098     case 0x94:  /* ADT7483 */
2099         if (man_id2 == 0x41 && chip_id2 == 0x83 &&
2100             common_address &&
2101             ((address >= 0x18 && address <= 0x1a) ||
2102              (address >= 0x29 && address <= 0x2b) ||
2103              (address >= 0x4c && address <= 0x4e)) &&
2104             !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
2105             name = "adt7483a";
2106         break;
2107     default:
2108         break;
2109     }
2110 
2111     return name;
2112 }
2113 
2114 static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
2115                      int chip_id, int config1, int convrate)
2116 {
2117     int man_id, emerg, emerg2, status2;
2118     int address = client->addr;
2119     const char *name = NULL;
2120 
2121     switch (chip_id) {
2122     case 0x01:
2123         if (!common_address)
2124             break;
2125 
2126         /*
2127          * We read MAX6659_REG_REMOTE_EMERG twice, and re-read
2128          * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
2129          * exists, both readings will reflect the same value. Otherwise,
2130          * the readings will be different.
2131          */
2132         emerg = i2c_smbus_read_byte_data(client,
2133                          MAX6659_REG_REMOTE_EMERG);
2134         man_id = i2c_smbus_read_byte_data(client,
2135                           LM90_REG_MAN_ID);
2136         emerg2 = i2c_smbus_read_byte_data(client,
2137                           MAX6659_REG_REMOTE_EMERG);
2138         status2 = i2c_smbus_read_byte_data(client,
2139                            MAX6696_REG_STATUS2);
2140         if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
2141             return NULL;
2142 
2143         /*
2144          * Even though MAX6695 and MAX6696 do not have a chip ID
2145          * register, reading it returns 0x01. Bit 4 of the config1
2146          * register is unused and should return zero when read. Bit 0 of
2147          * the status2 register is unused and should return zero when
2148          * read.
2149          *
2150          * MAX6695 and MAX6696 have an additional set of temperature
2151          * limit registers. We can detect those chips by checking if
2152          * one of those registers exists.
2153          */
2154         if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
2155             convrate <= 0x07)
2156             name = "max6696";
2157         /*
2158          * The chip_id register of the MAX6680 and MAX6681 holds the
2159          * revision of the chip. The lowest bit of the config1 register
2160          * is unused and should return zero when read, so should the
2161          * second to last bit of config1 (software reset). Register
2162          * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
2163          * should differ from emerg2, and emerg2 should match man_id
2164          * since it does not exist.
2165          */
2166         else if (!(config1 & 0x03) && convrate <= 0x07 &&
2167              emerg2 == man_id && emerg2 != status2)
2168             name = "max6680";
2169         /*
2170          * MAX1617A does not have any extended registers (register
2171          * address 0x10 or higher) except for manufacturer and
2172          * device ID registers. Unlike other chips of this series,
2173          * unsupported registers were observed to return a fixed value
2174          * of 0x01.
2175          * Note: Multiple chips with different markings labeled as
2176          * "MAX1617" (no "A") were observed to report manufacturer ID
2177          * 0x4d and device ID 0x01. It is unknown if other variants of
2178          * MAX1617/MAX617A with different behavior exist. The detection
2179          * code below works for those chips.
2180          */
2181         else if (!(config1 & 0x03f) && convrate <= 0x07 &&
2182              emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
2183             name = "max1617";
2184         break;
2185     case 0x08:
2186         /*
2187          * The chip_id of the MAX6654 holds the revision of the chip.
2188          * The lowest 3 bits of the config1 register are unused and
2189          * should return zero when read.
2190          */
2191         if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2192             name = "max6654";
2193         break;
2194     case 0x09:
2195         /*
2196          * The chip_id of the MAX6690 holds the revision of the chip.
2197          * The lowest 3 bits of the config1 register are unused and
2198          * should return zero when read.
2199          * Note that MAX6654 and MAX6690 are practically the same chips.
2200          * The only diference is the rated accuracy. Rev. 1 of the
2201          * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
2202          * MAX6654 was observed to have a chip ID of 0x09.
2203          */
2204         if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2205             name = "max6690";
2206         break;
2207     case 0x4d:
2208         /*
2209          * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
2210          * register. Reading from that address will return the last
2211          * read value, which in our case is those of the man_id
2212          * register, or 0x4d.
2213          * MAX6642 does not have a conversion rate register, nor low
2214          * limit registers. Reading from those registers returns the
2215          * last read value.
2216          *
2217          * For MAX6657, MAX6658 and MAX6659, the config1 register lacks
2218          * a low nibble, so the value will be those of the previous
2219          * read, so in our case again those of the man_id register.
2220          * MAX6659 has a third set of upper temperature limit registers.
2221          * Those registers also return values on MAX6657 and MAX6658,
2222          * thus the only way to detect MAX6659 is by its address.
2223          * For this reason it will be mis-detected as MAX6657 if its
2224          * address is 0x4c.
2225          */
2226         if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
2227             !(config1 & 0x0f)) {
2228             int regval;
2229 
2230             /*
2231              * We know that this is not a MAX6657/58/59 because its
2232              * configuration register has the wrong value and it does
2233              * not appear to have a conversion rate register.
2234              */
2235 
2236             /* re-read manufacturer ID to have a good baseline */
2237             if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
2238                 break;
2239 
2240             /* check various non-existing registers */
2241             if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
2242                 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
2243                 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
2244                 break;
2245 
2246             /* check for unused status register bits */
2247             regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
2248             if (regval < 0 || (regval & 0x2b))
2249                 break;
2250 
2251             /* re-check unsupported registers */
2252             if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
2253                 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
2254                 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
2255                 break;
2256 
2257             name = "max6642";
2258         } else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
2259                (config1 & 0x1f) == 0x0d && convrate <= 0x09) {
2260             if (address == 0x4c)
2261                 name = "max6657";
2262             else
2263                 name = "max6659";
2264         }
2265         break;
2266     case 0x59:
2267         /*
2268          * The chip_id register of the MAX6646/6647/6649 holds the
2269          * revision of the chip. The lowest 6 bits of the config1
2270          * register are unused and should return zero when read.
2271          * The I2C address of MAX6648/6692 is fixed at 0x4c.
2272          * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
2273          * and MAX6649 is at address 0x4c. A slight difference between
2274          * the two sets of chips is that the remote temperature register
2275          * reports different values if the DXP pin is open or shorted.
2276          * We can use that information to help distinguish between the
2277          * chips. MAX6648 will be mis-detected as MAX6649 if the remote
2278          * diode is connected, but there isn't really anything we can
2279          * do about that.
2280          */
2281         if (!(config1 & 0x3f) && convrate <= 0x07) {
2282             int temp;
2283 
2284             switch (address) {
2285             case 0x4c:
2286                 /*
2287                  * MAX6649 reports an external temperature
2288                  * value of 0xff if DXP is open or shorted.
2289                  * MAX6648 reports 0x80 in that case.
2290                  */
2291                 temp = i2c_smbus_read_byte_data(client,
2292                                 LM90_REG_REMOTE_TEMPH);
2293                 if (temp == 0x80)
2294                     name = "max6648";
2295                 else
2296                     name = "max6649";
2297                 break;
2298             case 0x4d:
2299                 name = "max6646";
2300                 break;
2301             case 0x4e:
2302                 name = "max6647";
2303                 break;
2304             default:
2305                 break;
2306             }
2307         }
2308         break;
2309     default:
2310         break;
2311     }
2312 
2313     return name;
2314 }
2315 
2316 static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
2317                        int config1, int convrate)
2318 {
2319     int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2320     int address = client->addr;
2321     const char *name = NULL;
2322 
2323     if (config2 < 0)
2324         return NULL;
2325 
2326     if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
2327         if (chip_id == 0x01 && convrate <= 0x09) {
2328             /* W83L771W/G */
2329             name = "w83l771";
2330         } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
2331             /* W83L771AWG/ASG */
2332             name = "w83l771";
2333         }
2334     }
2335     return name;
2336 }
2337 
2338 static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
2339                    int chip_id, int config1, int convrate)
2340 {
2341     int address = client->addr;
2342     const char *name = NULL;
2343     int config2;
2344 
2345     switch (chip_id) {
2346     case 0x00:
2347         config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2348         if (config2 < 0)
2349             return NULL;
2350         if (address >= 0x48 && address <= 0x4f &&
2351             !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
2352             name = "sa56004";
2353         break;
2354     case 0x80:
2355         if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
2356             name = "ne1618";
2357         break;
2358     default:
2359         break;
2360     }
2361     return name;
2362 }
2363 
2364 static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
2365                    int config1, int convrate)
2366 {
2367     int address = client->addr;
2368 
2369     /*
2370      * According to the datasheet, G781 is supposed to be at I2C Address
2371      * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
2372      * address 0x4d and have a chip ID of 0x03. However, when support
2373      * for G781 was added, chips at 0x4c and 0x4d were found to have a
2374      * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
2375      * chip ID 0x03.
2376      * To avoid detection failures, accept chip ID 0x01 and 0x03 at both
2377      * addresses.
2378      * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
2379      * datasheet is not available. Extensive testing suggests that
2380      * the chip appears to be fully compatible with G781.
2381      * Available register dumps show that G751 also reports manufacturer
2382      * ID 0x47 and chip ID 0x01 even though that chip does not officially
2383      * support those registers. This makes chip detection somewhat
2384      * vulnerable. To improve detection quality, read the offset low byte
2385      * and alert fault queue registers and verify that only expected bits
2386      * are set.
2387      */
2388     if ((chip_id == 0x01 || chip_id == 0x03) &&
2389         (address == 0x4c || address == 0x4d) &&
2390         !(config1 & 0x3f) && convrate <= 0x08) {
2391         int reg;
2392 
2393         reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
2394         if (reg < 0 || reg & 0x1f)
2395             return NULL;
2396         reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
2397         if (reg < 0 || reg & 0xf1)
2398             return NULL;
2399 
2400         return "g781";
2401     }
2402 
2403     return NULL;
2404 }
2405 
2406 static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
2407                     int chip_id, int config1, int convrate)
2408 {
2409     if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
2410         /* THMC10: Unsupported registers return 0xff */
2411         if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
2412             i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
2413             return "thmc10";
2414     }
2415     return NULL;
2416 }
2417 
2418 static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
2419                   int config1, int convrate)
2420 {
2421     int address = client->addr;
2422     const char *name = NULL;
2423 
2424     if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
2425         int local_ext, conalert, chen, dfc;
2426 
2427         local_ext = i2c_smbus_read_byte_data(client,
2428                              TMP451_REG_LOCAL_TEMPL);
2429         conalert = i2c_smbus_read_byte_data(client,
2430                             TMP451_REG_CONALERT);
2431         chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
2432         dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
2433 
2434         if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
2435             (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
2436             if (address == 0x4c && !(chen & 0x03))
2437                 name = "tmp451";
2438             else if (address >= 0x48 && address <= 0x4f)
2439                 name = "tmp461";
2440         }
2441     }
2442 
2443     return name;
2444 }
2445 
2446 /* Return 0 if detection is successful, -ENODEV otherwise */
2447 static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
2448 {
2449     struct i2c_adapter *adapter = client->adapter;
2450     int man_id, chip_id, config1, convrate, lhigh;
2451     const char *name = NULL;
2452     int address = client->addr;
2453     bool common_address =
2454             (address >= 0x18 && address <= 0x1a) ||
2455             (address >= 0x29 && address <= 0x2b) ||
2456             (address >= 0x4c && address <= 0x4e);
2457 
2458     if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2459         return -ENODEV;
2460 
2461     /*
2462      * Get well defined register value for chips with neither man_id nor
2463      * chip_id registers.
2464      */
2465     lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
2466 
2467     /* detection and identification */
2468     man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2469     chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2470     config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
2471     convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2472     if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
2473         return -ENODEV;
2474 
2475     /* Bail out immediately if all register report the same value */
2476     if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
2477         return -ENODEV;
2478 
2479     /*
2480      * If reading man_id and chip_id both return the same value as lhigh,
2481      * the chip may not support those registers and return the most recent read
2482      * value. Check again with a different register and handle accordingly.
2483      */
2484     if (man_id == lhigh && chip_id == lhigh) {
2485         convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2486         man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2487         chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2488         if (convrate < 0 || man_id < 0 || chip_id < 0)
2489             return -ENODEV;
2490         if (man_id == convrate && chip_id == convrate)
2491             man_id = -1;
2492     }
2493     switch (man_id) {
2494     case -1:    /* Chip does not support man_id / chip_id */
2495         if (common_address && !convrate && !(config1 & 0x7f))
2496             name = lm90_detect_lm84(client);
2497         break;
2498     case 0x01:  /* National Semiconductor */
2499         name = lm90_detect_national(client, chip_id, config1, convrate);
2500         break;
2501     case 0x1a:  /* ON */
2502         name = lm90_detect_on(client, chip_id, config1, convrate);
2503         break;
2504     case 0x23:  /* Genesys Logic */
2505         if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2506             name = "gl523sm";
2507         break;
2508     case 0x41:  /* Analog Devices */
2509         name = lm90_detect_analog(client, common_address, chip_id, config1,
2510                       convrate);
2511         break;
2512     case 0x47:  /* GMT */
2513         name = lm90_detect_gmt(client, chip_id, config1, convrate);
2514         break;
2515     case 0x49:  /* TI */
2516         name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
2517         break;
2518     case 0x4d:  /* Maxim Integrated */
2519         name = lm90_detect_maxim(client, common_address, chip_id,
2520                      config1, convrate);
2521         break;
2522     case 0x54:  /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
2523         if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2524             name = "mc1066";
2525         break;
2526     case 0x55:  /* TI */
2527         name = lm90_detect_ti(client, chip_id, config1, convrate);
2528         break;
2529     case 0x5c:  /* Winbond/Nuvoton */
2530         name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
2531         break;
2532     case 0xa1:  /*  NXP Semiconductor/Philips */
2533         name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
2534         break;
2535     case 0xff:  /* MAX1617, G767, NE1617 */
2536         if (common_address && chip_id == 0xff && convrate < 8)
2537             name = lm90_detect_max1617(client, config1);
2538         break;
2539     default:
2540         break;
2541     }
2542 
2543     if (!name) {    /* identification failed */
2544         dev_dbg(&adapter->dev,
2545             "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
2546             client->addr, man_id, chip_id);
2547         return -ENODEV;
2548     }
2549 
2550     strlcpy(info->type, name, I2C_NAME_SIZE);
2551 
2552     return 0;
2553 }
2554 
2555 static void lm90_restore_conf(void *_data)
2556 {
2557     struct lm90_data *data = _data;
2558     struct i2c_client *client = data->client;
2559 
2560     cancel_delayed_work_sync(&data->alert_work);
2561     cancel_work_sync(&data->report_work);
2562 
2563     /* Restore initial configuration */
2564     if (data->flags & LM90_HAVE_CONVRATE)
2565         lm90_write_convrate(data, data->convrate_orig);
2566     lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
2567 }
2568 
2569 static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
2570 {
2571     struct device_node *np = client->dev.of_node;
2572     int config, convrate;
2573 
2574     if (data->flags & LM90_HAVE_CONVRATE) {
2575         convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
2576         if (convrate < 0)
2577             return convrate;
2578         data->convrate_orig = convrate;
2579         lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
2580     } else {
2581         data->update_interval = 500;
2582     }
2583 
2584     /*
2585      * Start the conversions.
2586      */
2587     config = lm90_read_reg(client, LM90_REG_CONFIG1);
2588     if (config < 0)
2589         return config;
2590     data->config_orig = config;
2591     data->config = config;
2592 
2593     /* Check Temperature Range Select */
2594     if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
2595         if (of_property_read_bool(np, "ti,extended-range-enable"))
2596             config |= 0x04;
2597         if (!(config & 0x04))
2598             data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
2599     }
2600 
2601     /*
2602      * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
2603      * 0.125 degree resolution) and range (0x08, extend range
2604      * to -64 degree) mode for the remote temperature sensor.
2605      * Note that expeciments with an actual chip do not show a difference
2606      * if bit 3 is set or not.
2607      */
2608     if (data->kind == max6680)
2609         config |= 0x18;
2610 
2611     /*
2612      * Put MAX6654 into extended range (0x20, extend minimum range from
2613      * 0 degrees to -64 degrees). Note that extended resolution is not
2614      * possible on the MAX6654 unless conversion rate is set to 1 Hz or
2615      * slower, which is intentionally not done by default.
2616      */
2617     if (data->kind == max6654)
2618         config |= 0x20;
2619 
2620     /*
2621      * Select external channel 0 for devices with three sensors
2622      */
2623     if (data->flags & LM90_HAVE_TEMP3)
2624         config &= ~0x08;
2625 
2626     /*
2627      * Interrupt is enabled by default on reset, but it may be disabled
2628      * by bootloader, unmask it.
2629      */
2630     if (client->irq)
2631         config &= ~0x80;
2632 
2633     config &= 0xBF; /* run */
2634     lm90_update_confreg(data, config);
2635 
2636     return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
2637 }
2638 
2639 static bool lm90_is_tripped(struct i2c_client *client)
2640 {
2641     struct lm90_data *data = i2c_get_clientdata(client);
2642     int ret;
2643 
2644     ret = lm90_update_alarms(data, true);
2645     if (ret < 0)
2646         return false;
2647 
2648     return !!data->current_alarms;
2649 }
2650 
2651 static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
2652 {
2653     struct i2c_client *client = dev_id;
2654 
2655     if (lm90_is_tripped(client))
2656         return IRQ_HANDLED;
2657     else
2658         return IRQ_NONE;
2659 }
2660 
2661 static void lm90_remove_pec(void *dev)
2662 {
2663     device_remove_file(dev, &dev_attr_pec);
2664 }
2665 
2666 static void lm90_regulator_disable(void *regulator)
2667 {
2668     regulator_disable(regulator);
2669 }
2670 
2671 static int lm90_probe_channel_from_dt(struct i2c_client *client,
2672                       struct device_node *child,
2673                       struct lm90_data *data)
2674 {
2675     u32 id;
2676     s32 val;
2677     int err;
2678     struct device *dev = &client->dev;
2679 
2680     err = of_property_read_u32(child, "reg", &id);
2681     if (err) {
2682         dev_err(dev, "missing reg property of %pOFn\n", child);
2683         return err;
2684     }
2685 
2686     if (id >= MAX_CHANNELS) {
2687         dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
2688         return -EINVAL;
2689     }
2690 
2691     err = of_property_read_string(child, "label", &data->channel_label[id]);
2692     if (err == -ENODATA || err == -EILSEQ) {
2693         dev_err(dev, "invalid label property in %pOFn\n", child);
2694         return err;
2695     }
2696 
2697     if (data->channel_label[id])
2698         data->channel_config[id] |= HWMON_T_LABEL;
2699 
2700     err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
2701     if (!err) {
2702         if (id == 0) {
2703             dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
2704             return -EINVAL;
2705         }
2706 
2707         err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
2708         if (err) {
2709             dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
2710                 val, id, err);
2711             return err;
2712         }
2713     }
2714 
2715     return 0;
2716 }
2717 
2718 static int lm90_parse_dt_channel_info(struct i2c_client *client,
2719                       struct lm90_data *data)
2720 {
2721     int err;
2722     struct device_node *child;
2723     struct device *dev = &client->dev;
2724     const struct device_node *np = dev->of_node;
2725 
2726     for_each_child_of_node(np, child) {
2727         if (strcmp(child->name, "channel"))
2728             continue;
2729 
2730         err = lm90_probe_channel_from_dt(client, child, data);
2731         if (err) {
2732             of_node_put(child);
2733             return err;
2734         }
2735     }
2736 
2737     return 0;
2738 }
2739 
2740 static const struct hwmon_ops lm90_ops = {
2741     .is_visible = lm90_is_visible,
2742     .read = lm90_read,
2743     .read_string = lm90_read_string,
2744     .write = lm90_write,
2745 };
2746 
2747 static int lm90_probe(struct i2c_client *client)
2748 {
2749     struct device *dev = &client->dev;
2750     struct i2c_adapter *adapter = client->adapter;
2751     struct hwmon_channel_info *info;
2752     struct regulator *regulator;
2753     struct device *hwmon_dev;
2754     struct lm90_data *data;
2755     int err;
2756 
2757     regulator = devm_regulator_get(dev, "vcc");
2758     if (IS_ERR(regulator))
2759         return PTR_ERR(regulator);
2760 
2761     err = regulator_enable(regulator);
2762     if (err < 0) {
2763         dev_err(dev, "Failed to enable regulator: %d\n", err);
2764         return err;
2765     }
2766 
2767     err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
2768     if (err)
2769         return err;
2770 
2771     data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
2772     if (!data)
2773         return -ENOMEM;
2774 
2775     data->client = client;
2776     i2c_set_clientdata(client, data);
2777     mutex_init(&data->update_lock);
2778     INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
2779     INIT_WORK(&data->report_work, lm90_report_alarms);
2780 
2781     /* Set the device type */
2782     if (client->dev.of_node)
2783         data->kind = (enum chips)of_device_get_match_data(&client->dev);
2784     else
2785         data->kind = i2c_match_id(lm90_id, client)->driver_data;
2786 
2787     /*
2788      * Different devices have different alarm bits triggering the
2789      * ALERT# output
2790      */
2791     data->alert_alarms = lm90_params[data->kind].alert_alarms;
2792     data->resolution = lm90_params[data->kind].resolution ? : 11;
2793 
2794     /* Set chip capabilities */
2795     data->flags = lm90_params[data->kind].flags;
2796 
2797     if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
2798         !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
2799         data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
2800 
2801     if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
2802         !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
2803         data->flags &= ~LM90_HAVE_PARTIAL_PEC;
2804 
2805     data->chip.ops = &lm90_ops;
2806     data->chip.info = data->info;
2807 
2808     data->info[0] = &data->chip_info;
2809     info = &data->chip_info;
2810     info->type = hwmon_chip;
2811     info->config = data->chip_config;
2812 
2813     data->chip_config[0] = HWMON_C_REGISTER_TZ;
2814     if (data->flags & LM90_HAVE_ALARMS)
2815         data->chip_config[0] |= HWMON_C_ALARMS;
2816     if (data->flags & LM90_HAVE_CONVRATE)
2817         data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
2818     if (data->flags & LM90_HAVE_FAULTQUEUE)
2819         data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
2820     data->info[1] = &data->temp_info;
2821 
2822     info = &data->temp_info;
2823     info->type = hwmon_temp;
2824     info->config = data->channel_config;
2825 
2826     data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
2827         HWMON_T_MAX_ALARM;
2828     data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
2829         HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2830 
2831     if (data->flags & LM90_HAVE_LOW) {
2832         data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2833         data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2834     }
2835 
2836     if (data->flags & LM90_HAVE_CRIT) {
2837         data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2838         data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2839     }
2840 
2841     if (data->flags & LM90_HAVE_OFFSET)
2842         data->channel_config[1] |= HWMON_T_OFFSET;
2843 
2844     if (data->flags & LM90_HAVE_EMERGENCY) {
2845         data->channel_config[0] |= HWMON_T_EMERGENCY |
2846             HWMON_T_EMERGENCY_HYST;
2847         data->channel_config[1] |= HWMON_T_EMERGENCY |
2848             HWMON_T_EMERGENCY_HYST;
2849     }
2850 
2851     if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2852         data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2853         data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2854     }
2855 
2856     if (data->flags & LM90_HAVE_TEMP3) {
2857         data->channel_config[2] = HWMON_T_INPUT |
2858             HWMON_T_MIN | HWMON_T_MAX |
2859             HWMON_T_CRIT | HWMON_T_CRIT_HYST |
2860             HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2861             HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
2862         if (data->flags & LM90_HAVE_EMERGENCY) {
2863             data->channel_config[2] |= HWMON_T_EMERGENCY |
2864                 HWMON_T_EMERGENCY_HYST;
2865         }
2866         if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
2867             data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
2868         if (data->flags & LM90_HAVE_OFFSET)
2869             data->channel_config[2] |= HWMON_T_OFFSET;
2870     }
2871 
2872     data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
2873     data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
2874     data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
2875     if (data->flags & LM90_HAVE_REMOTE_EXT)
2876         data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
2877     data->reg_status2 = lm90_params[data->kind].reg_status2;
2878 
2879     /* Set maximum conversion rate */
2880     data->max_convrate = lm90_params[data->kind].max_convrate;
2881 
2882     /* Parse device-tree channel information */
2883     if (client->dev.of_node) {
2884         err = lm90_parse_dt_channel_info(client, data);
2885         if (err)
2886             return err;
2887     }
2888 
2889     /* Initialize the LM90 chip */
2890     err = lm90_init_client(client, data);
2891     if (err < 0) {
2892         dev_err(dev, "Failed to initialize device\n");
2893         return err;
2894     }
2895 
2896     /*
2897      * The 'pec' attribute is attached to the i2c device and thus created
2898      * separately.
2899      */
2900     if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) {
2901         err = device_create_file(dev, &dev_attr_pec);
2902         if (err)
2903             return err;
2904         err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
2905         if (err)
2906             return err;
2907     }
2908 
2909     hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2910                              data, &data->chip,
2911                              NULL);
2912     if (IS_ERR(hwmon_dev))
2913         return PTR_ERR(hwmon_dev);
2914 
2915     data->hwmon_dev = hwmon_dev;
2916 
2917     if (client->irq) {
2918         dev_dbg(dev, "IRQ: %d\n", client->irq);
2919         err = devm_request_threaded_irq(dev, client->irq,
2920                         NULL, lm90_irq_thread,
2921                         IRQF_ONESHOT, "lm90", client);
2922         if (err < 0) {
2923             dev_err(dev, "cannot request IRQ %d\n", client->irq);
2924             return err;
2925         }
2926     }
2927 
2928     return 0;
2929 }
2930 
2931 static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2932                unsigned int flag)
2933 {
2934     if (type != I2C_PROTOCOL_SMBUS_ALERT)
2935         return;
2936 
2937     if (lm90_is_tripped(client)) {
2938         /*
2939          * Disable ALERT# output, because these chips don't implement
2940          * SMBus alert correctly; they should only hold the alert line
2941          * low briefly.
2942          */
2943         struct lm90_data *data = i2c_get_clientdata(client);
2944 
2945         if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2946             (data->current_alarms & data->alert_alarms)) {
2947             if (!(data->config & 0x80)) {
2948                 dev_dbg(&client->dev, "Disabling ALERT#\n");
2949                 lm90_update_confreg(data, data->config | 0x80);
2950             }
2951             schedule_delayed_work(&data->alert_work,
2952                 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
2953         }
2954     } else {
2955         dev_dbg(&client->dev, "Everything OK\n");
2956     }
2957 }
2958 
2959 static int __maybe_unused lm90_suspend(struct device *dev)
2960 {
2961     struct lm90_data *data = dev_get_drvdata(dev);
2962     struct i2c_client *client = data->client;
2963 
2964     if (client->irq)
2965         disable_irq(client->irq);
2966 
2967     return 0;
2968 }
2969 
2970 static int __maybe_unused lm90_resume(struct device *dev)
2971 {
2972     struct lm90_data *data = dev_get_drvdata(dev);
2973     struct i2c_client *client = data->client;
2974 
2975     if (client->irq)
2976         enable_irq(client->irq);
2977 
2978     return 0;
2979 }
2980 
2981 static SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2982 
2983 static struct i2c_driver lm90_driver = {
2984     .class      = I2C_CLASS_HWMON,
2985     .driver = {
2986         .name   = "lm90",
2987         .of_match_table = of_match_ptr(lm90_of_match),
2988         .pm = &lm90_pm_ops,
2989     },
2990     .probe_new  = lm90_probe,
2991     .alert      = lm90_alert,
2992     .id_table   = lm90_id,
2993     .detect     = lm90_detect,
2994     .address_list   = normal_i2c,
2995 };
2996 
2997 module_i2c_driver(lm90_driver);
2998 
2999 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
3000 MODULE_DESCRIPTION("LM90/ADM1032 driver");
3001 MODULE_LICENSE("GPL");