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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * INA3221 Triple Current/Voltage Monitor
0004  *
0005  * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
0006  *  Andrew F. Davis <afd@ti.com>
0007  */
0008 
0009 #include <linux/hwmon.h>
0010 #include <linux/hwmon-sysfs.h>
0011 #include <linux/i2c.h>
0012 #include <linux/module.h>
0013 #include <linux/mutex.h>
0014 #include <linux/of.h>
0015 #include <linux/pm_runtime.h>
0016 #include <linux/regmap.h>
0017 #include <linux/util_macros.h>
0018 
0019 #define INA3221_DRIVER_NAME     "ina3221"
0020 
0021 #define INA3221_CONFIG          0x00
0022 #define INA3221_SHUNT1          0x01
0023 #define INA3221_BUS1            0x02
0024 #define INA3221_SHUNT2          0x03
0025 #define INA3221_BUS2            0x04
0026 #define INA3221_SHUNT3          0x05
0027 #define INA3221_BUS3            0x06
0028 #define INA3221_CRIT1           0x07
0029 #define INA3221_WARN1           0x08
0030 #define INA3221_CRIT2           0x09
0031 #define INA3221_WARN2           0x0a
0032 #define INA3221_CRIT3           0x0b
0033 #define INA3221_WARN3           0x0c
0034 #define INA3221_SHUNT_SUM       0x0d
0035 #define INA3221_CRIT_SUM        0x0e
0036 #define INA3221_MASK_ENABLE     0x0f
0037 
0038 #define INA3221_CONFIG_MODE_MASK    GENMASK(2, 0)
0039 #define INA3221_CONFIG_MODE_POWERDOWN   0
0040 #define INA3221_CONFIG_MODE_SHUNT   BIT(0)
0041 #define INA3221_CONFIG_MODE_BUS     BIT(1)
0042 #define INA3221_CONFIG_MODE_CONTINUOUS  BIT(2)
0043 #define INA3221_CONFIG_VSH_CT_SHIFT 3
0044 #define INA3221_CONFIG_VSH_CT_MASK  GENMASK(5, 3)
0045 #define INA3221_CONFIG_VSH_CT(x)    (((x) & GENMASK(5, 3)) >> 3)
0046 #define INA3221_CONFIG_VBUS_CT_SHIFT    6
0047 #define INA3221_CONFIG_VBUS_CT_MASK GENMASK(8, 6)
0048 #define INA3221_CONFIG_VBUS_CT(x)   (((x) & GENMASK(8, 6)) >> 6)
0049 #define INA3221_CONFIG_AVG_SHIFT    9
0050 #define INA3221_CONFIG_AVG_MASK     GENMASK(11, 9)
0051 #define INA3221_CONFIG_AVG(x)       (((x) & GENMASK(11, 9)) >> 9)
0052 #define INA3221_CONFIG_CHs_EN_MASK  GENMASK(14, 12)
0053 #define INA3221_CONFIG_CHx_EN(x)    BIT(14 - (x))
0054 
0055 #define INA3221_MASK_ENABLE_SCC_MASK    GENMASK(14, 12)
0056 
0057 #define INA3221_CONFIG_DEFAULT      0x7127
0058 #define INA3221_RSHUNT_DEFAULT      10000
0059 
0060 enum ina3221_fields {
0061     /* Configuration */
0062     F_RST,
0063 
0064     /* Status Flags */
0065     F_CVRF,
0066 
0067     /* Warning Flags */
0068     F_WF3, F_WF2, F_WF1,
0069 
0070     /* Alert Flags: SF is the summation-alert flag */
0071     F_SF, F_CF3, F_CF2, F_CF1,
0072 
0073     /* sentinel */
0074     F_MAX_FIELDS
0075 };
0076 
0077 static const struct reg_field ina3221_reg_fields[] = {
0078     [F_RST] = REG_FIELD(INA3221_CONFIG, 15, 15),
0079 
0080     [F_CVRF] = REG_FIELD(INA3221_MASK_ENABLE, 0, 0),
0081     [F_WF3] = REG_FIELD(INA3221_MASK_ENABLE, 3, 3),
0082     [F_WF2] = REG_FIELD(INA3221_MASK_ENABLE, 4, 4),
0083     [F_WF1] = REG_FIELD(INA3221_MASK_ENABLE, 5, 5),
0084     [F_SF] = REG_FIELD(INA3221_MASK_ENABLE, 6, 6),
0085     [F_CF3] = REG_FIELD(INA3221_MASK_ENABLE, 7, 7),
0086     [F_CF2] = REG_FIELD(INA3221_MASK_ENABLE, 8, 8),
0087     [F_CF1] = REG_FIELD(INA3221_MASK_ENABLE, 9, 9),
0088 };
0089 
0090 enum ina3221_channels {
0091     INA3221_CHANNEL1,
0092     INA3221_CHANNEL2,
0093     INA3221_CHANNEL3,
0094     INA3221_NUM_CHANNELS
0095 };
0096 
0097 /**
0098  * struct ina3221_input - channel input source specific information
0099  * @label: label of channel input source
0100  * @shunt_resistor: shunt resistor value of channel input source
0101  * @disconnected: connection status of channel input source
0102  */
0103 struct ina3221_input {
0104     const char *label;
0105     int shunt_resistor;
0106     bool disconnected;
0107 };
0108 
0109 /**
0110  * struct ina3221_data - device specific information
0111  * @pm_dev: Device pointer for pm runtime
0112  * @regmap: Register map of the device
0113  * @fields: Register fields of the device
0114  * @inputs: Array of channel input source specific structures
0115  * @lock: mutex lock to serialize sysfs attribute accesses
0116  * @reg_config: Register value of INA3221_CONFIG
0117  * @summation_shunt_resistor: equivalent shunt resistor value for summation
0118  * @single_shot: running in single-shot operating mode
0119  */
0120 struct ina3221_data {
0121     struct device *pm_dev;
0122     struct regmap *regmap;
0123     struct regmap_field *fields[F_MAX_FIELDS];
0124     struct ina3221_input inputs[INA3221_NUM_CHANNELS];
0125     struct mutex lock;
0126     u32 reg_config;
0127     int summation_shunt_resistor;
0128 
0129     bool single_shot;
0130 };
0131 
0132 static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel)
0133 {
0134     /* Summation channel checks shunt resistor values */
0135     if (channel > INA3221_CHANNEL3)
0136         return ina->summation_shunt_resistor != 0;
0137 
0138     return pm_runtime_active(ina->pm_dev) &&
0139            (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
0140 }
0141 
0142 /*
0143  * Helper function to return the resistor value for current summation.
0144  *
0145  * There is a condition to calculate current summation -- all the shunt
0146  * resistor values should be the same, so as to simply fit the formula:
0147  *     current summation = shunt voltage summation / shunt resistor
0148  *
0149  * Returns the equivalent shunt resistor value on success or 0 on failure
0150  */
0151 static inline int ina3221_summation_shunt_resistor(struct ina3221_data *ina)
0152 {
0153     struct ina3221_input *input = ina->inputs;
0154     int i, shunt_resistor = 0;
0155 
0156     for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
0157         if (input[i].disconnected || !input[i].shunt_resistor)
0158             continue;
0159         if (!shunt_resistor) {
0160             /* Found the reference shunt resistor value */
0161             shunt_resistor = input[i].shunt_resistor;
0162         } else {
0163             /* No summation if resistor values are different */
0164             if (shunt_resistor != input[i].shunt_resistor)
0165                 return 0;
0166         }
0167     }
0168 
0169     return shunt_resistor;
0170 }
0171 
0172 /* Lookup table for Bus and Shunt conversion times in usec */
0173 static const u16 ina3221_conv_time[] = {
0174     140, 204, 332, 588, 1100, 2116, 4156, 8244,
0175 };
0176 
0177 /* Lookup table for number of samples using in averaging mode */
0178 static const int ina3221_avg_samples[] = {
0179     1, 4, 16, 64, 128, 256, 512, 1024,
0180 };
0181 
0182 /* Converting update_interval in msec to conversion time in usec */
0183 static inline u32 ina3221_interval_ms_to_conv_time(u16 config, int interval)
0184 {
0185     u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
0186     u32 samples_idx = INA3221_CONFIG_AVG(config);
0187     u32 samples = ina3221_avg_samples[samples_idx];
0188 
0189     /* Bisect the result to Bus and Shunt conversion times */
0190     return DIV_ROUND_CLOSEST(interval * 1000 / 2, channels * samples);
0191 }
0192 
0193 /* Converting CONFIG register value to update_interval in usec */
0194 static inline u32 ina3221_reg_to_interval_us(u16 config)
0195 {
0196     u32 channels = hweight16(config & INA3221_CONFIG_CHs_EN_MASK);
0197     u32 vbus_ct_idx = INA3221_CONFIG_VBUS_CT(config);
0198     u32 vsh_ct_idx = INA3221_CONFIG_VSH_CT(config);
0199     u32 vbus_ct = ina3221_conv_time[vbus_ct_idx];
0200     u32 vsh_ct = ina3221_conv_time[vsh_ct_idx];
0201 
0202     /* Calculate total conversion time */
0203     return channels * (vbus_ct + vsh_ct);
0204 }
0205 
0206 static inline int ina3221_wait_for_data(struct ina3221_data *ina)
0207 {
0208     u32 wait, cvrf;
0209 
0210     wait = ina3221_reg_to_interval_us(ina->reg_config);
0211 
0212     /* Polling the CVRF bit to make sure read data is ready */
0213     return regmap_field_read_poll_timeout(ina->fields[F_CVRF],
0214                           cvrf, cvrf, wait, wait * 2);
0215 }
0216 
0217 static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
0218                   int *val)
0219 {
0220     unsigned int regval;
0221     int ret;
0222 
0223     ret = regmap_read(ina->regmap, reg, &regval);
0224     if (ret)
0225         return ret;
0226 
0227     /*
0228      * Shunt Voltage Sum register has 14-bit value with 1-bit shift
0229      * Other Shunt Voltage registers have 12 bits with 3-bit shift
0230      */
0231     if (reg == INA3221_SHUNT_SUM)
0232         *val = sign_extend32(regval >> 1, 14);
0233     else
0234         *val = sign_extend32(regval >> 3, 12);
0235 
0236     return 0;
0237 }
0238 
0239 static const u8 ina3221_in_reg[] = {
0240     INA3221_BUS1,
0241     INA3221_BUS2,
0242     INA3221_BUS3,
0243     INA3221_SHUNT1,
0244     INA3221_SHUNT2,
0245     INA3221_SHUNT3,
0246     INA3221_SHUNT_SUM,
0247 };
0248 
0249 static int ina3221_read_chip(struct device *dev, u32 attr, long *val)
0250 {
0251     struct ina3221_data *ina = dev_get_drvdata(dev);
0252     int regval;
0253 
0254     switch (attr) {
0255     case hwmon_chip_samples:
0256         regval = INA3221_CONFIG_AVG(ina->reg_config);
0257         *val = ina3221_avg_samples[regval];
0258         return 0;
0259     case hwmon_chip_update_interval:
0260         /* Return in msec */
0261         *val = ina3221_reg_to_interval_us(ina->reg_config);
0262         *val = DIV_ROUND_CLOSEST(*val, 1000);
0263         return 0;
0264     default:
0265         return -EOPNOTSUPP;
0266     }
0267 }
0268 
0269 static int ina3221_read_in(struct device *dev, u32 attr, int channel, long *val)
0270 {
0271     const bool is_shunt = channel > INA3221_CHANNEL3;
0272     struct ina3221_data *ina = dev_get_drvdata(dev);
0273     u8 reg = ina3221_in_reg[channel];
0274     int regval, ret;
0275 
0276     /*
0277      * Translate shunt channel index to sensor channel index except
0278      * the 7th channel (6 since being 0-aligned) is for summation.
0279      */
0280     if (channel != 6)
0281         channel %= INA3221_NUM_CHANNELS;
0282 
0283     switch (attr) {
0284     case hwmon_in_input:
0285         if (!ina3221_is_enabled(ina, channel))
0286             return -ENODATA;
0287 
0288         /* Write CONFIG register to trigger a single-shot measurement */
0289         if (ina->single_shot) {
0290             regmap_write(ina->regmap, INA3221_CONFIG,
0291                      ina->reg_config);
0292 
0293             ret = ina3221_wait_for_data(ina);
0294             if (ret)
0295                 return ret;
0296         }
0297 
0298         ret = ina3221_read_value(ina, reg, &regval);
0299         if (ret)
0300             return ret;
0301 
0302         /*
0303          * Scale of shunt voltage (uV): LSB is 40uV
0304          * Scale of bus voltage (mV): LSB is 8mV
0305          */
0306         *val = regval * (is_shunt ? 40 : 8);
0307         return 0;
0308     case hwmon_in_enable:
0309         *val = ina3221_is_enabled(ina, channel);
0310         return 0;
0311     default:
0312         return -EOPNOTSUPP;
0313     }
0314 }
0315 
0316 static const u8 ina3221_curr_reg[][INA3221_NUM_CHANNELS + 1] = {
0317     [hwmon_curr_input] = { INA3221_SHUNT1, INA3221_SHUNT2,
0318                    INA3221_SHUNT3, INA3221_SHUNT_SUM },
0319     [hwmon_curr_max] = { INA3221_WARN1, INA3221_WARN2, INA3221_WARN3, 0 },
0320     [hwmon_curr_crit] = { INA3221_CRIT1, INA3221_CRIT2,
0321                   INA3221_CRIT3, INA3221_CRIT_SUM },
0322     [hwmon_curr_max_alarm] = { F_WF1, F_WF2, F_WF3, 0 },
0323     [hwmon_curr_crit_alarm] = { F_CF1, F_CF2, F_CF3, F_SF },
0324 };
0325 
0326 static int ina3221_read_curr(struct device *dev, u32 attr,
0327                  int channel, long *val)
0328 {
0329     struct ina3221_data *ina = dev_get_drvdata(dev);
0330     struct ina3221_input *input = ina->inputs;
0331     u8 reg = ina3221_curr_reg[attr][channel];
0332     int resistance_uo, voltage_nv;
0333     int regval, ret;
0334 
0335     if (channel > INA3221_CHANNEL3)
0336         resistance_uo = ina->summation_shunt_resistor;
0337     else
0338         resistance_uo = input[channel].shunt_resistor;
0339 
0340     switch (attr) {
0341     case hwmon_curr_input:
0342         if (!ina3221_is_enabled(ina, channel))
0343             return -ENODATA;
0344 
0345         /* Write CONFIG register to trigger a single-shot measurement */
0346         if (ina->single_shot) {
0347             regmap_write(ina->regmap, INA3221_CONFIG,
0348                      ina->reg_config);
0349 
0350             ret = ina3221_wait_for_data(ina);
0351             if (ret)
0352                 return ret;
0353         }
0354 
0355         fallthrough;
0356     case hwmon_curr_crit:
0357     case hwmon_curr_max:
0358         if (!resistance_uo)
0359             return -ENODATA;
0360 
0361         ret = ina3221_read_value(ina, reg, &regval);
0362         if (ret)
0363             return ret;
0364 
0365         /* Scale of shunt voltage: LSB is 40uV (40000nV) */
0366         voltage_nv = regval * 40000;
0367         /* Return current in mA */
0368         *val = DIV_ROUND_CLOSEST(voltage_nv, resistance_uo);
0369         return 0;
0370     case hwmon_curr_crit_alarm:
0371     case hwmon_curr_max_alarm:
0372         /* No actual register read if channel is disabled */
0373         if (!ina3221_is_enabled(ina, channel)) {
0374             /* Return 0 for alert flags */
0375             *val = 0;
0376             return 0;
0377         }
0378         ret = regmap_field_read(ina->fields[reg], &regval);
0379         if (ret)
0380             return ret;
0381         *val = regval;
0382         return 0;
0383     default:
0384         return -EOPNOTSUPP;
0385     }
0386 }
0387 
0388 static int ina3221_write_chip(struct device *dev, u32 attr, long val)
0389 {
0390     struct ina3221_data *ina = dev_get_drvdata(dev);
0391     int ret, idx;
0392     u32 tmp;
0393 
0394     switch (attr) {
0395     case hwmon_chip_samples:
0396         idx = find_closest(val, ina3221_avg_samples,
0397                    ARRAY_SIZE(ina3221_avg_samples));
0398 
0399         tmp = (ina->reg_config & ~INA3221_CONFIG_AVG_MASK) |
0400               (idx << INA3221_CONFIG_AVG_SHIFT);
0401         ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
0402         if (ret)
0403             return ret;
0404 
0405         /* Update reg_config accordingly */
0406         ina->reg_config = tmp;
0407         return 0;
0408     case hwmon_chip_update_interval:
0409         tmp = ina3221_interval_ms_to_conv_time(ina->reg_config, val);
0410         idx = find_closest(tmp, ina3221_conv_time,
0411                    ARRAY_SIZE(ina3221_conv_time));
0412 
0413         /* Update Bus and Shunt voltage conversion times */
0414         tmp = INA3221_CONFIG_VBUS_CT_MASK | INA3221_CONFIG_VSH_CT_MASK;
0415         tmp = (ina->reg_config & ~tmp) |
0416               (idx << INA3221_CONFIG_VBUS_CT_SHIFT) |
0417               (idx << INA3221_CONFIG_VSH_CT_SHIFT);
0418         ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
0419         if (ret)
0420             return ret;
0421 
0422         /* Update reg_config accordingly */
0423         ina->reg_config = tmp;
0424         return 0;
0425     default:
0426         return -EOPNOTSUPP;
0427     }
0428 }
0429 
0430 static int ina3221_write_curr(struct device *dev, u32 attr,
0431                   int channel, long val)
0432 {
0433     struct ina3221_data *ina = dev_get_drvdata(dev);
0434     struct ina3221_input *input = ina->inputs;
0435     u8 reg = ina3221_curr_reg[attr][channel];
0436     int resistance_uo, current_ma, voltage_uv;
0437     int regval;
0438 
0439     if (channel > INA3221_CHANNEL3)
0440         resistance_uo = ina->summation_shunt_resistor;
0441     else
0442         resistance_uo = input[channel].shunt_resistor;
0443 
0444     if (!resistance_uo)
0445         return -EOPNOTSUPP;
0446 
0447     /* clamp current */
0448     current_ma = clamp_val(val,
0449                    INT_MIN / resistance_uo,
0450                    INT_MAX / resistance_uo);
0451 
0452     voltage_uv = DIV_ROUND_CLOSEST(current_ma * resistance_uo, 1000);
0453 
0454     /* clamp voltage */
0455     voltage_uv = clamp_val(voltage_uv, -163800, 163800);
0456 
0457     /*
0458      * Formula to convert voltage_uv to register value:
0459      *     regval = (voltage_uv / scale) << shift
0460      * Note:
0461      *     The scale is 40uV for all shunt voltage registers
0462      *     Shunt Voltage Sum register left-shifts 1 bit
0463      *     All other Shunt Voltage registers shift 3 bits
0464      * Results:
0465      *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
0466      *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
0467      */
0468     if (reg == INA3221_SHUNT_SUM)
0469         regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
0470     else
0471         regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;
0472 
0473     return regmap_write(ina->regmap, reg, regval);
0474 }
0475 
0476 static int ina3221_write_enable(struct device *dev, int channel, bool enable)
0477 {
0478     struct ina3221_data *ina = dev_get_drvdata(dev);
0479     u16 config, mask = INA3221_CONFIG_CHx_EN(channel);
0480     u16 config_old = ina->reg_config & mask;
0481     u32 tmp;
0482     int ret;
0483 
0484     config = enable ? mask : 0;
0485 
0486     /* Bypass if enable status is not being changed */
0487     if (config_old == config)
0488         return 0;
0489 
0490     /* For enabling routine, increase refcount and resume() at first */
0491     if (enable) {
0492         ret = pm_runtime_resume_and_get(ina->pm_dev);
0493         if (ret < 0) {
0494             dev_err(dev, "Failed to get PM runtime\n");
0495             return ret;
0496         }
0497     }
0498 
0499     /* Enable or disable the channel */
0500     tmp = (ina->reg_config & ~mask) | (config & mask);
0501     ret = regmap_write(ina->regmap, INA3221_CONFIG, tmp);
0502     if (ret)
0503         goto fail;
0504 
0505     /* Cache the latest config register value */
0506     ina->reg_config = tmp;
0507 
0508     /* For disabling routine, decrease refcount or suspend() at last */
0509     if (!enable)
0510         pm_runtime_put_sync(ina->pm_dev);
0511 
0512     return 0;
0513 
0514 fail:
0515     if (enable) {
0516         dev_err(dev, "Failed to enable channel %d: error %d\n",
0517             channel, ret);
0518         pm_runtime_put_sync(ina->pm_dev);
0519     }
0520 
0521     return ret;
0522 }
0523 
0524 static int ina3221_read(struct device *dev, enum hwmon_sensor_types type,
0525             u32 attr, int channel, long *val)
0526 {
0527     struct ina3221_data *ina = dev_get_drvdata(dev);
0528     int ret;
0529 
0530     mutex_lock(&ina->lock);
0531 
0532     switch (type) {
0533     case hwmon_chip:
0534         ret = ina3221_read_chip(dev, attr, val);
0535         break;
0536     case hwmon_in:
0537         /* 0-align channel ID */
0538         ret = ina3221_read_in(dev, attr, channel - 1, val);
0539         break;
0540     case hwmon_curr:
0541         ret = ina3221_read_curr(dev, attr, channel, val);
0542         break;
0543     default:
0544         ret = -EOPNOTSUPP;
0545         break;
0546     }
0547 
0548     mutex_unlock(&ina->lock);
0549 
0550     return ret;
0551 }
0552 
0553 static int ina3221_write(struct device *dev, enum hwmon_sensor_types type,
0554              u32 attr, int channel, long val)
0555 {
0556     struct ina3221_data *ina = dev_get_drvdata(dev);
0557     int ret;
0558 
0559     mutex_lock(&ina->lock);
0560 
0561     switch (type) {
0562     case hwmon_chip:
0563         ret = ina3221_write_chip(dev, attr, val);
0564         break;
0565     case hwmon_in:
0566         /* 0-align channel ID */
0567         ret = ina3221_write_enable(dev, channel - 1, val);
0568         break;
0569     case hwmon_curr:
0570         ret = ina3221_write_curr(dev, attr, channel, val);
0571         break;
0572     default:
0573         ret = -EOPNOTSUPP;
0574         break;
0575     }
0576 
0577     mutex_unlock(&ina->lock);
0578 
0579     return ret;
0580 }
0581 
0582 static int ina3221_read_string(struct device *dev, enum hwmon_sensor_types type,
0583                    u32 attr, int channel, const char **str)
0584 {
0585     struct ina3221_data *ina = dev_get_drvdata(dev);
0586     int index = channel - 1;
0587 
0588     if (channel == 7)
0589         *str = "sum of shunt voltages";
0590     else
0591         *str = ina->inputs[index].label;
0592 
0593     return 0;
0594 }
0595 
0596 static umode_t ina3221_is_visible(const void *drvdata,
0597                   enum hwmon_sensor_types type,
0598                   u32 attr, int channel)
0599 {
0600     const struct ina3221_data *ina = drvdata;
0601     const struct ina3221_input *input = NULL;
0602 
0603     switch (type) {
0604     case hwmon_chip:
0605         switch (attr) {
0606         case hwmon_chip_samples:
0607         case hwmon_chip_update_interval:
0608             return 0644;
0609         default:
0610             return 0;
0611         }
0612     case hwmon_in:
0613         /* Ignore in0_ */
0614         if (channel == 0)
0615             return 0;
0616 
0617         switch (attr) {
0618         case hwmon_in_label:
0619             if (channel - 1 <= INA3221_CHANNEL3)
0620                 input = &ina->inputs[channel - 1];
0621             else if (channel == 7)
0622                 return 0444;
0623             /* Hide label node if label is not provided */
0624             return (input && input->label) ? 0444 : 0;
0625         case hwmon_in_input:
0626             return 0444;
0627         case hwmon_in_enable:
0628             return 0644;
0629         default:
0630             return 0;
0631         }
0632     case hwmon_curr:
0633         switch (attr) {
0634         case hwmon_curr_input:
0635         case hwmon_curr_crit_alarm:
0636         case hwmon_curr_max_alarm:
0637             return 0444;
0638         case hwmon_curr_crit:
0639         case hwmon_curr_max:
0640             return 0644;
0641         default:
0642             return 0;
0643         }
0644     default:
0645         return 0;
0646     }
0647 }
0648 
0649 #define INA3221_HWMON_CURR_CONFIG (HWMON_C_INPUT | \
0650                    HWMON_C_CRIT | HWMON_C_CRIT_ALARM | \
0651                    HWMON_C_MAX | HWMON_C_MAX_ALARM)
0652 
0653 static const struct hwmon_channel_info *ina3221_info[] = {
0654     HWMON_CHANNEL_INFO(chip,
0655                HWMON_C_SAMPLES,
0656                HWMON_C_UPDATE_INTERVAL),
0657     HWMON_CHANNEL_INFO(in,
0658                /* 0: dummy, skipped in is_visible */
0659                HWMON_I_INPUT,
0660                /* 1-3: input voltage Channels */
0661                HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
0662                HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
0663                HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
0664                /* 4-6: shunt voltage Channels */
0665                HWMON_I_INPUT,
0666                HWMON_I_INPUT,
0667                HWMON_I_INPUT,
0668                /* 7: summation of shunt voltage channels */
0669                HWMON_I_INPUT | HWMON_I_LABEL),
0670     HWMON_CHANNEL_INFO(curr,
0671                /* 1-3: current channels*/
0672                INA3221_HWMON_CURR_CONFIG,
0673                INA3221_HWMON_CURR_CONFIG,
0674                INA3221_HWMON_CURR_CONFIG,
0675                /* 4: summation of current channels */
0676                HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM),
0677     NULL
0678 };
0679 
0680 static const struct hwmon_ops ina3221_hwmon_ops = {
0681     .is_visible = ina3221_is_visible,
0682     .read_string = ina3221_read_string,
0683     .read = ina3221_read,
0684     .write = ina3221_write,
0685 };
0686 
0687 static const struct hwmon_chip_info ina3221_chip_info = {
0688     .ops = &ina3221_hwmon_ops,
0689     .info = ina3221_info,
0690 };
0691 
0692 /* Extra attribute groups */
0693 static ssize_t ina3221_shunt_show(struct device *dev,
0694                   struct device_attribute *attr, char *buf)
0695 {
0696     struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
0697     struct ina3221_data *ina = dev_get_drvdata(dev);
0698     unsigned int channel = sd_attr->index;
0699     struct ina3221_input *input = &ina->inputs[channel];
0700 
0701     return sysfs_emit(buf, "%d\n", input->shunt_resistor);
0702 }
0703 
0704 static ssize_t ina3221_shunt_store(struct device *dev,
0705                    struct device_attribute *attr,
0706                    const char *buf, size_t count)
0707 {
0708     struct sensor_device_attribute *sd_attr = to_sensor_dev_attr(attr);
0709     struct ina3221_data *ina = dev_get_drvdata(dev);
0710     unsigned int channel = sd_attr->index;
0711     struct ina3221_input *input = &ina->inputs[channel];
0712     int val;
0713     int ret;
0714 
0715     ret = kstrtoint(buf, 0, &val);
0716     if (ret)
0717         return ret;
0718 
0719     val = clamp_val(val, 1, INT_MAX);
0720 
0721     input->shunt_resistor = val;
0722 
0723     /* Update summation_shunt_resistor for summation channel */
0724     ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
0725 
0726     return count;
0727 }
0728 
0729 /* shunt resistance */
0730 static SENSOR_DEVICE_ATTR_RW(shunt1_resistor, ina3221_shunt, INA3221_CHANNEL1);
0731 static SENSOR_DEVICE_ATTR_RW(shunt2_resistor, ina3221_shunt, INA3221_CHANNEL2);
0732 static SENSOR_DEVICE_ATTR_RW(shunt3_resistor, ina3221_shunt, INA3221_CHANNEL3);
0733 
0734 static struct attribute *ina3221_attrs[] = {
0735     &sensor_dev_attr_shunt1_resistor.dev_attr.attr,
0736     &sensor_dev_attr_shunt2_resistor.dev_attr.attr,
0737     &sensor_dev_attr_shunt3_resistor.dev_attr.attr,
0738     NULL,
0739 };
0740 ATTRIBUTE_GROUPS(ina3221);
0741 
0742 static const struct regmap_range ina3221_yes_ranges[] = {
0743     regmap_reg_range(INA3221_CONFIG, INA3221_BUS3),
0744     regmap_reg_range(INA3221_SHUNT_SUM, INA3221_SHUNT_SUM),
0745     regmap_reg_range(INA3221_MASK_ENABLE, INA3221_MASK_ENABLE),
0746 };
0747 
0748 static const struct regmap_access_table ina3221_volatile_table = {
0749     .yes_ranges = ina3221_yes_ranges,
0750     .n_yes_ranges = ARRAY_SIZE(ina3221_yes_ranges),
0751 };
0752 
0753 static const struct regmap_config ina3221_regmap_config = {
0754     .reg_bits = 8,
0755     .val_bits = 16,
0756 
0757     .cache_type = REGCACHE_RBTREE,
0758     .volatile_table = &ina3221_volatile_table,
0759 };
0760 
0761 static int ina3221_probe_child_from_dt(struct device *dev,
0762                        struct device_node *child,
0763                        struct ina3221_data *ina)
0764 {
0765     struct ina3221_input *input;
0766     u32 val;
0767     int ret;
0768 
0769     ret = of_property_read_u32(child, "reg", &val);
0770     if (ret) {
0771         dev_err(dev, "missing reg property of %pOFn\n", child);
0772         return ret;
0773     } else if (val > INA3221_CHANNEL3) {
0774         dev_err(dev, "invalid reg %d of %pOFn\n", val, child);
0775         return ret;
0776     }
0777 
0778     input = &ina->inputs[val];
0779 
0780     /* Log the disconnected channel input */
0781     if (!of_device_is_available(child)) {
0782         input->disconnected = true;
0783         return 0;
0784     }
0785 
0786     /* Save the connected input label if available */
0787     of_property_read_string(child, "label", &input->label);
0788 
0789     /* Overwrite default shunt resistor value optionally */
0790     if (!of_property_read_u32(child, "shunt-resistor-micro-ohms", &val)) {
0791         if (val < 1 || val > INT_MAX) {
0792             dev_err(dev, "invalid shunt resistor value %u of %pOFn\n",
0793                 val, child);
0794             return -EINVAL;
0795         }
0796         input->shunt_resistor = val;
0797     }
0798 
0799     return 0;
0800 }
0801 
0802 static int ina3221_probe_from_dt(struct device *dev, struct ina3221_data *ina)
0803 {
0804     const struct device_node *np = dev->of_node;
0805     struct device_node *child;
0806     int ret;
0807 
0808     /* Compatible with non-DT platforms */
0809     if (!np)
0810         return 0;
0811 
0812     ina->single_shot = of_property_read_bool(np, "ti,single-shot");
0813 
0814     for_each_child_of_node(np, child) {
0815         ret = ina3221_probe_child_from_dt(dev, child, ina);
0816         if (ret) {
0817             of_node_put(child);
0818             return ret;
0819         }
0820     }
0821 
0822     return 0;
0823 }
0824 
0825 static int ina3221_probe(struct i2c_client *client)
0826 {
0827     struct device *dev = &client->dev;
0828     struct ina3221_data *ina;
0829     struct device *hwmon_dev;
0830     int i, ret;
0831 
0832     ina = devm_kzalloc(dev, sizeof(*ina), GFP_KERNEL);
0833     if (!ina)
0834         return -ENOMEM;
0835 
0836     ina->regmap = devm_regmap_init_i2c(client, &ina3221_regmap_config);
0837     if (IS_ERR(ina->regmap)) {
0838         dev_err(dev, "Unable to allocate register map\n");
0839         return PTR_ERR(ina->regmap);
0840     }
0841 
0842     for (i = 0; i < F_MAX_FIELDS; i++) {
0843         ina->fields[i] = devm_regmap_field_alloc(dev,
0844                              ina->regmap,
0845                              ina3221_reg_fields[i]);
0846         if (IS_ERR(ina->fields[i])) {
0847             dev_err(dev, "Unable to allocate regmap fields\n");
0848             return PTR_ERR(ina->fields[i]);
0849         }
0850     }
0851 
0852     for (i = 0; i < INA3221_NUM_CHANNELS; i++)
0853         ina->inputs[i].shunt_resistor = INA3221_RSHUNT_DEFAULT;
0854 
0855     ret = ina3221_probe_from_dt(dev, ina);
0856     if (ret) {
0857         dev_err(dev, "Unable to probe from device tree\n");
0858         return ret;
0859     }
0860 
0861     /* The driver will be reset, so use reset value */
0862     ina->reg_config = INA3221_CONFIG_DEFAULT;
0863 
0864     /* Clear continuous bit to use single-shot mode */
0865     if (ina->single_shot)
0866         ina->reg_config &= ~INA3221_CONFIG_MODE_CONTINUOUS;
0867 
0868     /* Disable channels if their inputs are disconnected */
0869     for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
0870         if (ina->inputs[i].disconnected)
0871             ina->reg_config &= ~INA3221_CONFIG_CHx_EN(i);
0872     }
0873 
0874     /* Initialize summation_shunt_resistor for summation channel control */
0875     ina->summation_shunt_resistor = ina3221_summation_shunt_resistor(ina);
0876 
0877     ina->pm_dev = dev;
0878     mutex_init(&ina->lock);
0879     dev_set_drvdata(dev, ina);
0880 
0881     /* Enable PM runtime -- status is suspended by default */
0882     pm_runtime_enable(ina->pm_dev);
0883 
0884     /* Initialize (resume) the device */
0885     for (i = 0; i < INA3221_NUM_CHANNELS; i++) {
0886         if (ina->inputs[i].disconnected)
0887             continue;
0888         /* Match the refcount with number of enabled channels */
0889         ret = pm_runtime_get_sync(ina->pm_dev);
0890         if (ret < 0)
0891             goto fail;
0892     }
0893 
0894     hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, ina,
0895                              &ina3221_chip_info,
0896                              ina3221_groups);
0897     if (IS_ERR(hwmon_dev)) {
0898         dev_err(dev, "Unable to register hwmon device\n");
0899         ret = PTR_ERR(hwmon_dev);
0900         goto fail;
0901     }
0902 
0903     return 0;
0904 
0905 fail:
0906     pm_runtime_disable(ina->pm_dev);
0907     pm_runtime_set_suspended(ina->pm_dev);
0908     /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
0909     for (i = 0; i < INA3221_NUM_CHANNELS; i++)
0910         pm_runtime_put_noidle(ina->pm_dev);
0911     mutex_destroy(&ina->lock);
0912 
0913     return ret;
0914 }
0915 
0916 static int ina3221_remove(struct i2c_client *client)
0917 {
0918     struct ina3221_data *ina = dev_get_drvdata(&client->dev);
0919     int i;
0920 
0921     pm_runtime_disable(ina->pm_dev);
0922     pm_runtime_set_suspended(ina->pm_dev);
0923 
0924     /* pm_runtime_put_noidle() will decrease the PM refcount until 0 */
0925     for (i = 0; i < INA3221_NUM_CHANNELS; i++)
0926         pm_runtime_put_noidle(ina->pm_dev);
0927 
0928     mutex_destroy(&ina->lock);
0929 
0930     return 0;
0931 }
0932 
0933 static int __maybe_unused ina3221_suspend(struct device *dev)
0934 {
0935     struct ina3221_data *ina = dev_get_drvdata(dev);
0936     int ret;
0937 
0938     /* Save config register value and enable cache-only */
0939     ret = regmap_read(ina->regmap, INA3221_CONFIG, &ina->reg_config);
0940     if (ret)
0941         return ret;
0942 
0943     /* Set to power-down mode for power saving */
0944     ret = regmap_update_bits(ina->regmap, INA3221_CONFIG,
0945                  INA3221_CONFIG_MODE_MASK,
0946                  INA3221_CONFIG_MODE_POWERDOWN);
0947     if (ret)
0948         return ret;
0949 
0950     regcache_cache_only(ina->regmap, true);
0951     regcache_mark_dirty(ina->regmap);
0952 
0953     return 0;
0954 }
0955 
0956 static int __maybe_unused ina3221_resume(struct device *dev)
0957 {
0958     struct ina3221_data *ina = dev_get_drvdata(dev);
0959     int ret;
0960 
0961     regcache_cache_only(ina->regmap, false);
0962 
0963     /* Software reset the chip */
0964     ret = regmap_field_write(ina->fields[F_RST], true);
0965     if (ret) {
0966         dev_err(dev, "Unable to reset device\n");
0967         return ret;
0968     }
0969 
0970     /* Restore cached register values to hardware */
0971     ret = regcache_sync(ina->regmap);
0972     if (ret)
0973         return ret;
0974 
0975     /* Restore config register value to hardware */
0976     ret = regmap_write(ina->regmap, INA3221_CONFIG, ina->reg_config);
0977     if (ret)
0978         return ret;
0979 
0980     /* Initialize summation channel control */
0981     if (ina->summation_shunt_resistor) {
0982         /*
0983          * Take all three channels into summation by default
0984          * Shunt measurements of disconnected channels should
0985          * be 0, so it does not matter for summation.
0986          */
0987         ret = regmap_update_bits(ina->regmap, INA3221_MASK_ENABLE,
0988                      INA3221_MASK_ENABLE_SCC_MASK,
0989                      INA3221_MASK_ENABLE_SCC_MASK);
0990         if (ret) {
0991             dev_err(dev, "Unable to control summation channel\n");
0992             return ret;
0993         }
0994     }
0995 
0996     return 0;
0997 }
0998 
0999 static const struct dev_pm_ops ina3221_pm = {
1000     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1001                 pm_runtime_force_resume)
1002     SET_RUNTIME_PM_OPS(ina3221_suspend, ina3221_resume, NULL)
1003 };
1004 
1005 static const struct of_device_id ina3221_of_match_table[] = {
1006     { .compatible = "ti,ina3221", },
1007     { /* sentinel */ }
1008 };
1009 MODULE_DEVICE_TABLE(of, ina3221_of_match_table);
1010 
1011 static const struct i2c_device_id ina3221_ids[] = {
1012     { "ina3221", 0 },
1013     { /* sentinel */ }
1014 };
1015 MODULE_DEVICE_TABLE(i2c, ina3221_ids);
1016 
1017 static struct i2c_driver ina3221_i2c_driver = {
1018     .probe_new = ina3221_probe,
1019     .remove = ina3221_remove,
1020     .driver = {
1021         .name = INA3221_DRIVER_NAME,
1022         .of_match_table = ina3221_of_match_table,
1023         .pm = &ina3221_pm,
1024     },
1025     .id_table = ina3221_ids,
1026 };
1027 module_i2c_driver(ina3221_i2c_driver);
1028 
1029 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
1030 MODULE_DESCRIPTION("Texas Instruments INA3221 HWMon Driver");
1031 MODULE_LICENSE("GPL v2");
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