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0008 #include <linux/bitops.h>
0009 #include <linux/module.h>
0010 #include <linux/init.h>
0011 #include <linux/slab.h>
0012 #include <linux/jiffies.h>
0013 #include <linux/device.h>
0014 #include <linux/pci.h>
0015 #include <linux/hwmon.h>
0016 #include <linux/err.h>
0017 #include <linux/mutex.h>
0018
0019
0020 #define REG_TSTHRCATA 0xE2
0021 #define REG_TSCTRL 0xE8
0022 #define REG_TSTHRRPEX 0xEB
0023 #define REG_TSTHRLO 0xEC
0024 #define REG_TSTHRHI 0xEE
0025 #define REG_CTHINT 0xF0
0026 #define REG_TSFSC 0xF3
0027 #define REG_CTSTS 0xF4
0028 #define REG_TSTHRRQPI 0xF5
0029 #define REG_CTCTRL 0xF7
0030 #define REG_TSTIMER 0xF8
0031
0032 static umode_t i5500_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr,
0033 int channel)
0034 {
0035 return 0444;
0036 }
0037
0038 static int i5500_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel,
0039 long *val)
0040 {
0041 struct pci_dev *pdev = to_pci_dev(dev->parent);
0042 u16 tsthr;
0043 s8 tsfsc;
0044 u8 ctsts;
0045
0046 switch (type) {
0047 case hwmon_temp:
0048 switch (attr) {
0049
0050 case hwmon_temp_input:
0051 pci_read_config_word(pdev, REG_TSTHRHI, &tsthr);
0052 pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
0053 *val = (tsthr - tsfsc) * 500;
0054 return 0;
0055 case hwmon_temp_max:
0056 pci_read_config_word(pdev, REG_TSTHRHI, &tsthr);
0057 *val = tsthr * 500;
0058 return 0;
0059 case hwmon_temp_max_hyst:
0060 pci_read_config_word(pdev, REG_TSTHRLO, &tsthr);
0061 *val = tsthr * 500;
0062 return 0;
0063 case hwmon_temp_crit:
0064 pci_read_config_word(pdev, REG_TSTHRCATA, &tsthr);
0065 *val = tsthr * 500;
0066 return 0;
0067 case hwmon_temp_max_alarm:
0068 pci_read_config_byte(pdev, REG_CTSTS, &ctsts);
0069 *val = !!(ctsts & BIT(1));
0070 return 0;
0071 case hwmon_temp_crit_alarm:
0072 pci_read_config_byte(pdev, REG_CTSTS, &ctsts);
0073 *val = !!(ctsts & BIT(0));
0074 return 0;
0075 default:
0076 break;
0077 }
0078 break;
0079 default:
0080 break;
0081 }
0082
0083 return -EOPNOTSUPP;
0084 }
0085
0086 static const struct hwmon_ops i5500_ops = {
0087 .is_visible = i5500_is_visible,
0088 .read = i5500_read,
0089 };
0090
0091 static const struct hwmon_channel_info *i5500_info[] = {
0092 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
0093 HWMON_CHANNEL_INFO(temp,
0094 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
0095 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM
0096 ),
0097 NULL
0098 };
0099
0100 static const struct hwmon_chip_info i5500_chip_info = {
0101 .ops = &i5500_ops,
0102 .info = i5500_info,
0103 };
0104
0105 static const struct pci_device_id i5500_temp_ids[] = {
0106 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x3438) },
0107 { 0 },
0108 };
0109
0110 MODULE_DEVICE_TABLE(pci, i5500_temp_ids);
0111
0112 static int i5500_temp_probe(struct pci_dev *pdev,
0113 const struct pci_device_id *id)
0114 {
0115 int err;
0116 struct device *hwmon_dev;
0117 u32 tstimer;
0118 s8 tsfsc;
0119
0120 err = pci_enable_device(pdev);
0121 if (err) {
0122 dev_err(&pdev->dev, "Failed to enable device\n");
0123 return err;
0124 }
0125
0126 pci_read_config_byte(pdev, REG_TSFSC, &tsfsc);
0127 pci_read_config_dword(pdev, REG_TSTIMER, &tstimer);
0128 if (tsfsc == 0x7F && tstimer == 0x07D30D40) {
0129 dev_notice(&pdev->dev, "Sensor seems to be disabled\n");
0130 return -ENODEV;
0131 }
0132
0133 hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev, "intel5500", NULL,
0134 &i5500_chip_info, NULL);
0135 return PTR_ERR_OR_ZERO(hwmon_dev);
0136 }
0137
0138 static struct pci_driver i5500_temp_driver = {
0139 .name = "i5500_temp",
0140 .id_table = i5500_temp_ids,
0141 .probe = i5500_temp_probe,
0142 };
0143
0144 module_pci_driver(i5500_temp_driver);
0145
0146 MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
0147 MODULE_DESCRIPTION("Intel 5500/5520/X58 chipset thermal sensor driver");
0148 MODULE_LICENSE("GPL");