drivers/hwmon/hwmon-vid.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * hwmon-vid.c - VID/VRM/VRD voltage conversions
0004  *
0005  * Copyright (c) 2004 Rudolf Marek <r.marek@assembler.cz>
0006  *
0007  * Partly imported from i2c-vid.h of the lm_sensors project
0008  * Copyright (c) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
0009  * With assistance from Trent Piepho <xyzzy@speakeasy.org>
0010  */
0011
0012 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
0013
0014 #include <linux/module.h>
0015 #include <linux/kernel.h>
0016 #include <linux/hwmon-vid.h>
0017
0018 /*
0019  * Common code for decoding VID pins.
0020  *
0021  * References:
0022  *
0023  * For VRM 8.4 to 9.1, "VRM x.y DC-DC Converter Design Guidelines",
0024  * available at http://developer.intel.com/.
0025  *
0026  * For VRD 10.0 and up, "VRD x.y Design Guide",
0027  * available at http://developer.intel.com/.
0028  *
0029  * AMD Athlon 64 and AMD Opteron Processors, AMD Publication 26094,
0030  * http://support.amd.com/us/Processor_TechDocs/26094.PDF
0031  * Table 74. VID Code Voltages
0032  * This corresponds to an arbitrary VRM code of 24 in the functions below.
0033  * These CPU models (K8 revision <= E) have 5 VID pins. See also:
0034  * Revision Guide for AMD Athlon 64 and AMD Opteron Processors, AMD Publication 25759,
0035  * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25759.pdf
0036  *
0037  * AMD NPT Family 0Fh Processors, AMD Publication 32559,
0038  * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf
0039  * Table 71. VID Code Voltages
0040  * This corresponds to an arbitrary VRM code of 25 in the functions below.
0041  * These CPU models (K8 revision >= F) have 6 VID pins. See also:
0042  * Revision Guide for AMD NPT Family 0Fh Processors, AMD Publication 33610,
0043  * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/33610.pdf
0044  *
0045  * The 17 specification is in fact Intel Mobile Voltage Positioning -
0046  * (IMVP-II). You can find more information in the datasheet of Max1718
0047  * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/2452
0048  *
0049  * The 13 specification corresponds to the Intel Pentium M series. There
0050  * doesn't seem to be any named specification for these. The conversion
0051  * tables are detailed directly in the various Pentium M datasheets:
0052  * https://www.intel.com/design/intarch/pentiumm/docs_pentiumm.htm
0053  *
0054  * The 14 specification corresponds to Intel Core series. There
0055  * doesn't seem to be any named specification for these. The conversion
0056  * tables are detailed directly in the various Pentium Core datasheets:
0057  * https://www.intel.com/design/mobile/datashts/309221.htm
0058  *
0059  * The 110 (VRM 11) specification corresponds to Intel Conroe based series.
0060  * https://www.intel.com/design/processor/applnots/313214.htm
0061  */
0062
0063 /*
0064  * vrm is the VRM/VRD document version multiplied by 10.
0065  * val is the 4-bit or more VID code.
0066  * Returned value is in mV to avoid floating point in the kernel.
0067  * Some VID have some bits in uV scale, this is rounded to mV.
0068  */
0069 int vid_from_reg(int val, u8 vrm)
0070 {
0071     int vid;
0072
0073     switch (vrm) {
0074
0075     case 100:       /* VRD 10.0 */
0076         /* compute in uV, round to mV */
0077         val &= 0x3f;
0078         if ((val & 0x1f) == 0x1f)
0079             return 0;
0080         if ((val & 0x1f) <= 0x09 || val == 0x0a)
0081             vid = 1087500 - (val & 0x1f) * 25000;
0082         else
0083             vid = 1862500 - (val & 0x1f) * 25000;
0084         if (val & 0x20)
0085             vid -= 12500;
0086         return (vid + 500) / 1000;
0087
0088     case 110:       /* Intel Conroe */
0089                 /* compute in uV, round to mV */
0090         val &= 0xff;
0091         if (val < 0x02 || val > 0xb2)
0092             return 0;
0093         return (1600000 - (val - 2) * 6250 + 500) / 1000;
0094
0095     case 24:        /* Athlon64 & Opteron */
0096         val &= 0x1f;
0097         if (val == 0x1f)
0098             return 0;
0099         fallthrough;
0100     case 25:        /* AMD NPT 0Fh */
0101         val &= 0x3f;
0102         return (val < 32) ? 1550 - 25 * val
0103             : 775 - (25 * (val - 31)) / 2;
0104
0105     case 26:        /* AMD family 10h to 15h, serial VID */
0106         val &= 0x7f;
0107         if (val >= 0x7c)
0108             return 0;
0109         return DIV_ROUND_CLOSEST(15500 - 125 * val, 10);
0110
0111     case 91:        /* VRM 9.1 */
0112     case 90:        /* VRM 9.0 */
0113         val &= 0x1f;
0114         return val == 0x1f ? 0 :
0115                      1850 - val * 25;
0116
0117     case 85:        /* VRM 8.5 */
0118         val &= 0x1f;
0119         return (val & 0x10  ? 25 : 0) +
0120                ((val & 0x0f) > 0x04 ? 2050 : 1250) -
0121                ((val & 0x0f) * 50);
0122
0123     case 84:        /* VRM 8.4 */
0124         val &= 0x0f;
0125         fallthrough;
0126     case 82:        /* VRM 8.2 */
0127         val &= 0x1f;
0128         return val == 0x1f ? 0 :
0129                val & 0x10  ? 5100 - (val) * 100 :
0130                      2050 - (val) * 50;
0131     case 17:        /* Intel IMVP-II */
0132         val &= 0x1f;
0133         return val & 0x10 ? 975 - (val & 0xF) * 25 :
0134                     1750 - val * 50;
0135     case 13:
0136     case 131:
0137         val &= 0x3f;
0138         /* Exception for Eden ULV 500 MHz */
0139         if (vrm == 131 && val == 0x3f)
0140             val++;
0141         return 1708 - val * 16;
0142     case 14:        /* Intel Core */
0143                 /* compute in uV, round to mV */
0144         val &= 0x7f;
0145         return val > 0x77 ? 0 : (1500000 - (val * 12500) + 500) / 1000;
0146     default:        /* report 0 for unknown */
0147         if (vrm)
0148             pr_warn("Requested unsupported VRM version (%u)\n",
0149                 (unsigned int)vrm);
0150         return 0;
0151     }
0152 }
0153 EXPORT_SYMBOL(vid_from_reg);
0154
0155 /*
0156  * After this point is the code to automatically determine which
0157  * VRM/VRD specification should be used depending on the CPU.
0158  */
0159
0160 struct vrm_model {
0161     u8 vendor;
0162     u8 family;
0163     u8 model_from;
0164     u8 model_to;
0165     u8 stepping_to;
0166     u8 vrm_type;
0167 };
0168
0169 #define ANY 0xFF
0170
0171 #ifdef CONFIG_X86
0172
0173 /*
0174  * The stepping_to parameter is highest acceptable stepping for current line.
0175  * The model match must be exact for 4-bit values. For model values 0x10
0176  * and above (extended model), all models below the parameter will match.
0177  */
0178
0179 static struct vrm_model vrm_models[] = {
0180     {X86_VENDOR_AMD, 0x6, 0x0, ANY, ANY, 90},   /* Athlon Duron etc */
0181     {X86_VENDOR_AMD, 0xF, 0x0, 0x3F, ANY, 24},  /* Athlon 64, Opteron */
0182     /*
0183      * In theory, all NPT family 0Fh processors have 6 VID pins and should
0184      * thus use vrm 25, however in practice not all mainboards route the
0185      * 6th VID pin because it is never needed. So we use the 5 VID pin
0186      * variant (vrm 24) for the models which exist today.
0187      */
0188     {X86_VENDOR_AMD, 0xF, 0x40, 0x7F, ANY, 24}, /* NPT family 0Fh */
0189     {X86_VENDOR_AMD, 0xF, 0x80, ANY, ANY, 25},  /* future fam. 0Fh */
0190     {X86_VENDOR_AMD, 0x10, 0x0, ANY, ANY, 25},  /* NPT family 10h */
0191     {X86_VENDOR_AMD, 0x11, 0x0, ANY, ANY, 26},  /* family 11h */
0192     {X86_VENDOR_AMD, 0x12, 0x0, ANY, ANY, 26},  /* family 12h */
0193     {X86_VENDOR_AMD, 0x14, 0x0, ANY, ANY, 26},  /* family 14h */
0194     {X86_VENDOR_AMD, 0x15, 0x0, ANY, ANY, 26},  /* family 15h */
0195
0196     {X86_VENDOR_INTEL, 0x6, 0x0, 0x6, ANY, 82}, /* Pentium Pro,
0197                              * Pentium II, Xeon,
0198                              * Mobile Pentium,
0199                              * Celeron */
0200     {X86_VENDOR_INTEL, 0x6, 0x7, 0x7, ANY, 84}, /* Pentium III, Xeon */
0201     {X86_VENDOR_INTEL, 0x6, 0x8, 0x8, ANY, 82}, /* Pentium III, Xeon */
0202     {X86_VENDOR_INTEL, 0x6, 0x9, 0x9, ANY, 13}, /* Pentium M (130 nm) */
0203     {X86_VENDOR_INTEL, 0x6, 0xA, 0xA, ANY, 82}, /* Pentium III Xeon */
0204     {X86_VENDOR_INTEL, 0x6, 0xB, 0xB, ANY, 85}, /* Tualatin */
0205     {X86_VENDOR_INTEL, 0x6, 0xD, 0xD, ANY, 13}, /* Pentium M (90 nm) */
0206     {X86_VENDOR_INTEL, 0x6, 0xE, 0xE, ANY, 14}, /* Intel Core (65 nm) */
0207     {X86_VENDOR_INTEL, 0x6, 0xF, ANY, ANY, 110},    /* Intel Conroe and
0208                              * later */
0209     {X86_VENDOR_INTEL, 0xF, 0x0, 0x0, ANY, 90}, /* P4 */
0210     {X86_VENDOR_INTEL, 0xF, 0x1, 0x1, ANY, 90}, /* P4 Willamette */
0211     {X86_VENDOR_INTEL, 0xF, 0x2, 0x2, ANY, 90}, /* P4 Northwood */
0212     {X86_VENDOR_INTEL, 0xF, 0x3, ANY, ANY, 100},    /* Prescott and above
0213                              * assume VRD 10 */
0214
0215     {X86_VENDOR_CENTAUR, 0x6, 0x7, 0x7, ANY, 85},   /* Eden ESP/Ezra */
0216     {X86_VENDOR_CENTAUR, 0x6, 0x8, 0x8, 0x7, 85},   /* Ezra T */
0217     {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, 0x7, 85},   /* Nehemiah */
0218     {X86_VENDOR_CENTAUR, 0x6, 0x9, 0x9, ANY, 17},   /* C3-M, Eden-N */
0219     {X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, 0x7, 0},    /* No information */
0220     {X86_VENDOR_CENTAUR, 0x6, 0xA, 0xA, ANY, 13},   /* C7-M, C7,
0221                              * Eden (Esther) */
0222     {X86_VENDOR_CENTAUR, 0x6, 0xD, 0xD, ANY, 134},  /* C7-D, C7-M, C7,
0223                              * Eden (Esther) */
0224 };
0225
0226 /*
0227  * Special case for VIA model D: there are two different possible
0228  * VID tables, so we have to figure out first, which one must be
0229  * used. This resolves temporary drm value 134 to 14 (Intel Core
0230  * 7-bit VID), 13 (Pentium M 6-bit VID) or 131 (Pentium M 6-bit VID
0231  * + quirk for Eden ULV 500 MHz).
0232  * Note: something similar might be needed for model A, I'm not sure.
0233  */
0234 static u8 get_via_model_d_vrm(void)
0235 {
0236     unsigned int vid, brand, __maybe_unused dummy;
0237     static const char *brands[4] = {
0238         "C7-M", "C7", "Eden", "C7-D"
0239     };
0240
0241     rdmsr(0x198, dummy, vid);
0242     vid &= 0xff;
0243
0244     rdmsr(0x1154, brand, dummy);
0245     brand = ((brand >> 4) ^ (brand >> 2)) & 0x03;
0246
0247     if (vid > 0x3f) {
0248         pr_info("Using %d-bit VID table for VIA %s CPU\n",
0249             7, brands[brand]);
0250         return 14;
0251     } else {
0252         pr_info("Using %d-bit VID table for VIA %s CPU\n",
0253             6, brands[brand]);
0254         /* Enable quirk for Eden */
0255         return brand == 2 ? 131 : 13;
0256     }
0257 }
0258
0259 static u8 find_vrm(u8 family, u8 model, u8 stepping, u8 vendor)
0260 {
0261     int i;
0262
0263     for (i = 0; i < ARRAY_SIZE(vrm_models); i++) {
0264         if (vendor == vrm_models[i].vendor &&
0265             family == vrm_models[i].family &&
0266             model >= vrm_models[i].model_from &&
0267             model <= vrm_models[i].model_to &&
0268             stepping <= vrm_models[i].stepping_to)
0269             return vrm_models[i].vrm_type;
0270     }
0271
0272     return 0;
0273 }
0274
0275 u8 vid_which_vrm(void)
0276 {
0277     struct cpuinfo_x86 *c = &cpu_data(0);
0278     u8 vrm_ret;
0279
0280     if (c->x86 < 6)     /* Any CPU with family lower than 6 */
0281         return 0;   /* doesn't have VID */
0282
0283     vrm_ret = find_vrm(c->x86, c->x86_model, c->x86_stepping, c->x86_vendor);
0284     if (vrm_ret == 134)
0285         vrm_ret = get_via_model_d_vrm();
0286     if (vrm_ret == 0)
0287         pr_info("Unknown VRM version of your x86 CPU\n");
0288     return vrm_ret;
0289 }
0290
0291 /* and now for something completely different for the non-x86 world */
0292 #else
0293 u8 vid_which_vrm(void)
0294 {
0295     pr_info("Unknown VRM version of your CPU\n");
0296     return 0;
0297 }
0298 #endif
0299 EXPORT_SYMBOL(vid_which_vrm);
0300
0301 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
0302
0303 MODULE_DESCRIPTION("hwmon-vid driver");
0304 MODULE_LICENSE("GPL");